
pmu921.axf:     file format elf32-littlearm


Disassembly of section .text:

00000000 <g_pfnVectors>:
       0:	10002000 	andne	r2, r0, r0
       4:	00000103 	andeq	r0, r0, r3, lsl #2
       8:	000000d5 	ldrdeq	r0, [r0], -r5
       c:	000000d7 	ldrdeq	r0, [r0], -r7
	...
      2c:	000000d9 	ldrdeq	r0, [r0], -r9
	...
      38:	000000db 	ldrdeq	r0, [r0], -fp
      3c:	00000d4d 	andeq	r0, r0, sp, asr #26
      40:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      44:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      48:	00000000 	andeq	r0, r0, r0
      4c:	00000c9d 	muleq	r0, sp, ip
      50:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      54:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      60:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      64:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      68:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      6c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      70:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      74:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      78:	00000000 	andeq	r0, r0, r0
      7c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      a0:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      a4:	00000541 	andeq	r0, r0, r1, asr #10
      a8:	00000569 	andeq	r0, r0, r9, ror #10
      ac:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      b0:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      b4:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      b8:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      bc:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>

000000c0 <__data_section_table>:
      c0:	00001d08 	andeq	r1, r0, r8, lsl #26
      c4:	10000000 	andne	r0, r0, r0
      c8:	00000000 	andeq	r0, r0, r0

000000cc <__bss_section_table>:
      cc:	10000000 	andne	r0, r0, r0
      d0:	00000254 	andeq	r0, r0, r4, asr r2

000000d4 <NMI_Handler>:
      d4:	e7fe      	b.n	d4 <NMI_Handler>

000000d6 <HardFault_Handler>:
      d6:	e7fe      	b.n	d6 <HardFault_Handler>

000000d8 <SVC_Handler>:
      d8:	e7fe      	b.n	d8 <SVC_Handler>

000000da <PendSV_Handler>:
      da:	e7fe      	b.n	da <PendSV_Handler>
      dc:	e7fe      	b.n	dc <PendSV_Handler+0x2>

000000de <BOD_IRQHandler>:
      de:	e7fe      	b.n	de <BOD_IRQHandler>

000000e0 <data_init>:
      e0:	2300      	movs	r3, #0
      e2:	b510      	push	{r4, lr}
      e4:	4293      	cmp	r3, r2
      e6:	d203      	bcs.n	f0 <data_init+0x10>
      e8:	581c      	ldr	r4, [r3, r0]
      ea:	505c      	str	r4, [r3, r1]
      ec:	3304      	adds	r3, #4
      ee:	e7f9      	b.n	e4 <data_init+0x4>
      f0:	bd10      	pop	{r4, pc}

000000f2 <bss_init>:
      f2:	2300      	movs	r3, #0
      f4:	428b      	cmp	r3, r1
      f6:	d203      	bcs.n	100 <bss_init+0xe>
      f8:	2200      	movs	r2, #0
      fa:	501a      	str	r2, [r3, r0]
      fc:	3304      	adds	r3, #4
      fe:	e7f9      	b.n	f4 <bss_init+0x2>
     100:	4770      	bx	lr

00000102 <ResetISR>:
     102:	2388      	movs	r3, #136	; 0x88
     104:	b570      	push	{r4, r5, r6, lr}
     106:	4e10      	ldr	r6, [pc, #64]	; (148 <ResetISR+0x46>)
     108:	4d10      	ldr	r5, [pc, #64]	; (14c <ResetISR+0x4a>)
     10a:	4c11      	ldr	r4, [pc, #68]	; (150 <ResetISR+0x4e>)
     10c:	6033      	str	r3, [r6, #0]
     10e:	602b      	str	r3, [r5, #0]
     110:	4b10      	ldr	r3, [pc, #64]	; (154 <ResetISR+0x52>)
     112:	429c      	cmp	r4, r3
     114:	d206      	bcs.n	124 <ResetISR+0x22>
     116:	6820      	ldr	r0, [r4, #0]
     118:	6861      	ldr	r1, [r4, #4]
     11a:	68a2      	ldr	r2, [r4, #8]
     11c:	f7ff ffe0 	bl	e0 <data_init>
     120:	340c      	adds	r4, #12
     122:	e7f5      	b.n	110 <ResetISR+0xe>
     124:	4b0c      	ldr	r3, [pc, #48]	; (158 <ResetISR+0x56>)
     126:	429c      	cmp	r4, r3
     128:	d205      	bcs.n	136 <ResetISR+0x34>
     12a:	6820      	ldr	r0, [r4, #0]
     12c:	6861      	ldr	r1, [r4, #4]
     12e:	f7ff ffe0 	bl	f2 <bss_init>
     132:	3408      	adds	r4, #8
     134:	e7f6      	b.n	124 <ResetISR+0x22>
     136:	2388      	movs	r3, #136	; 0x88
     138:	6033      	str	r3, [r6, #0]
     13a:	602b      	str	r3, [r5, #0]
     13c:	f000 fd38 	bl	bb0 <SystemInit>
     140:	f001 fb20 	bl	1784 <__weak_main>
     144:	e7fe      	b.n	144 <ResetISR+0x42>
     146:	46c0      	nop			; (mov r8, r8)
     148:	40044058 	andmi	r4, r4, r8, asr r0
     14c:	4004405c 	andmi	r4, r4, ip, asr r0
     150:	000000c0 	andeq	r0, r0, r0, asr #1
     154:	000000cc 	andeq	r0, r0, ip, asr #1
     158:	000000d4 	ldrdeq	r0, [r0], -r4
     15c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     160:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     164:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     168:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     16c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     170:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     174:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     178:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     17c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     180:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     184:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     188:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     18c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     190:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     194:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     198:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     19c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     200:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     204:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     208:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     20c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     210:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     214:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     218:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     21c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     220:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     224:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     228:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     22c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     230:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     234:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     238:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     23c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     240:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     244:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     248:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     24c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     250:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     254:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     258:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     25c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     260:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     264:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     268:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     26c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     270:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     274:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     278:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     27c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     280:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     284:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     288:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     28c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     290:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     294:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     298:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     29c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

000002fc <CRP_WORD>:
     2fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

00000300 <shitfer>:
     300:	2308      	movs	r3, #8
     302:	2280      	movs	r2, #128	; 0x80
     304:	b530      	push	{r4, r5, lr}
     306:	1c04      	adds	r4, r0, #0
     308:	4014      	ands	r4, r2
     30a:	1e65      	subs	r5, r4, #1
     30c:	41ac      	sbcs	r4, r5
     30e:	0049      	lsls	r1, r1, #1
     310:	1909      	adds	r1, r1, r4
     312:	4c06      	ldr	r4, [pc, #24]	; (32c <shitfer+0x2c>)
     314:	0852      	lsrs	r2, r2, #1
     316:	42a1      	cmp	r1, r4
     318:	d902      	bls.n	320 <shitfer+0x20>
     31a:	4c05      	ldr	r4, [pc, #20]	; (330 <shitfer+0x30>)
     31c:	b289      	uxth	r1, r1
     31e:	4061      	eors	r1, r4
     320:	3b01      	subs	r3, #1
     322:	2b00      	cmp	r3, #0
     324:	d1ef      	bne.n	306 <shitfer+0x6>
     326:	b288      	uxth	r0, r1
     328:	bd30      	pop	{r4, r5, pc}
     32a:	46c0      	nop			; (mov r8, r8)
     32c:	0000ffff 	strdeq	pc, [r0], -pc	; <UNPREDICTABLE>
     330:	00001021 	andeq	r1, r0, r1, lsr #32

00000334 <crc16>:
     334:	b570      	push	{r4, r5, r6, lr}
     336:	1c0e      	adds	r6, r1, #0
     338:	1c05      	adds	r5, r0, #0
     33a:	1c04      	adds	r4, r0, #0
     33c:	2100      	movs	r1, #0
     33e:	1b33      	subs	r3, r6, r4
     340:	18eb      	adds	r3, r5, r3
     342:	2b00      	cmp	r3, #0
     344:	dd05      	ble.n	352 <crc16+0x1e>
     346:	7820      	ldrb	r0, [r4, #0]
     348:	f7ff ffda 	bl	300 <shitfer>
     34c:	3401      	adds	r4, #1
     34e:	1c01      	adds	r1, r0, #0
     350:	e7f5      	b.n	33e <crc16+0xa>
     352:	2000      	movs	r0, #0
     354:	f7ff ffd4 	bl	300 <shitfer>
     358:	1c01      	adds	r1, r0, #0
     35a:	2000      	movs	r0, #0
     35c:	f7ff ffd0 	bl	300 <shitfer>
     360:	bd70      	pop	{r4, r5, r6, pc}
	...

00000364 <adc_init>:
     364:	b538      	push	{r3, r4, r5, lr}
     366:	4829      	ldr	r0, [pc, #164]	; (40c <adc_init+0xa8>)
     368:	210f      	movs	r1, #15
     36a:	2200      	movs	r2, #0
     36c:	f000 ffc2 	bl	12f4 <Chip_IOCON_PinSetMode>
     370:	4826      	ldr	r0, [pc, #152]	; (40c <adc_init+0xa8>)
     372:	2110      	movs	r1, #16
     374:	2200      	movs	r2, #0
     376:	f000 ffbd 	bl	12f4 <Chip_IOCON_PinSetMode>
     37a:	4824      	ldr	r0, [pc, #144]	; (40c <adc_init+0xa8>)
     37c:	2112      	movs	r1, #18
     37e:	2200      	movs	r2, #0
     380:	f000 ffb8 	bl	12f4 <Chip_IOCON_PinSetMode>
     384:	4821      	ldr	r0, [pc, #132]	; (40c <adc_init+0xa8>)
     386:	2119      	movs	r1, #25
     388:	2200      	movs	r2, #0
     38a:	f000 ffb3 	bl	12f4 <Chip_IOCON_PinSetMode>
     38e:	481f      	ldr	r0, [pc, #124]	; (40c <adc_init+0xa8>)
     390:	211a      	movs	r1, #26
     392:	2200      	movs	r2, #0
     394:	f000 ffae 	bl	12f4 <Chip_IOCON_PinSetMode>
     398:	481d      	ldr	r0, [pc, #116]	; (410 <adc_init+0xac>)
     39a:	2100      	movs	r1, #0
     39c:	f001 f8fc 	bl	1598 <Chip_ADC_Init>
     3a0:	481b      	ldr	r0, [pc, #108]	; (410 <adc_init+0xac>)
     3a2:	f001 f90f 	bl	15c4 <Chip_ADC_StartCalibration>
     3a6:	4d1a      	ldr	r5, [pc, #104]	; (410 <adc_init+0xac>)
     3a8:	682b      	ldr	r3, [r5, #0]
     3aa:	005b      	lsls	r3, r3, #1
     3ac:	d4fb      	bmi.n	3a6 <adc_init+0x42>
     3ae:	f000 fe75 	bl	109c <Chip_Clock_GetSystemClockRate>
     3b2:	4918      	ldr	r1, [pc, #96]	; (414 <adc_init+0xb0>)
     3b4:	f001 f9ed 	bl	1792 <__aeabi_uidiv>
     3b8:	23ff      	movs	r3, #255	; 0xff
     3ba:	682c      	ldr	r4, [r5, #0]
     3bc:	3801      	subs	r0, #1
     3be:	b2c0      	uxtb	r0, r0
     3c0:	439c      	bics	r4, r3
     3c2:	4915      	ldr	r1, [pc, #84]	; (418 <adc_init+0xb4>)
     3c4:	4304      	orrs	r4, r0
     3c6:	602c      	str	r4, [r5, #0]
     3c8:	6fca      	ldr	r2, [r1, #124]	; 0x7c
     3ca:	4b14      	ldr	r3, [pc, #80]	; (41c <adc_init+0xb8>)
     3cc:	4814      	ldr	r0, [pc, #80]	; (420 <adc_init+0xbc>)
     3ce:	4013      	ands	r3, r2
     3d0:	2280      	movs	r2, #128	; 0x80
     3d2:	4313      	orrs	r3, r2
     3d4:	67cb      	str	r3, [r1, #124]	; 0x7c
     3d6:	23e0      	movs	r3, #224	; 0xe0
     3d8:	4a12      	ldr	r2, [pc, #72]	; (424 <adc_init+0xc0>)
     3da:	005b      	lsls	r3, r3, #1
     3dc:	58d4      	ldr	r4, [r2, r3]
     3de:	4020      	ands	r0, r4
     3e0:	50d0      	str	r0, [r2, r3]
     3e2:	58d4      	ldr	r4, [r2, r3]
     3e4:	4810      	ldr	r0, [pc, #64]	; (428 <adc_init+0xc4>)
     3e6:	4020      	ands	r0, r4
     3e8:	50d0      	str	r0, [r2, r3]
     3ea:	58d4      	ldr	r4, [r2, r3]
     3ec:	480f      	ldr	r0, [pc, #60]	; (42c <adc_init+0xc8>)
     3ee:	4020      	ands	r0, r4
     3f0:	50d0      	str	r0, [r2, r3]
     3f2:	58d4      	ldr	r4, [r2, r3]
     3f4:	480e      	ldr	r0, [pc, #56]	; (430 <adc_init+0xcc>)
     3f6:	4020      	ands	r0, r4
     3f8:	50d0      	str	r0, [r2, r3]
     3fa:	58d4      	ldr	r4, [r2, r3]
     3fc:	480d      	ldr	r0, [pc, #52]	; (434 <adc_init+0xd0>)
     3fe:	4020      	ands	r0, r4
     400:	50d0      	str	r0, [r2, r3]
     402:	6fca      	ldr	r2, [r1, #124]	; 0x7c
     404:	4b0c      	ldr	r3, [pc, #48]	; (438 <adc_init+0xd4>)
     406:	4013      	ands	r3, r2
     408:	67cb      	str	r3, [r1, #124]	; 0x7c
     40a:	bd38      	pop	{r3, r4, r5, pc}
     40c:	40044000 	andmi	r4, r4, r0
     410:	4001c000 	andmi	ip, r1, r0
     414:	01c9c380 	biceq	ip, r9, r0, lsl #7
     418:	40048004 	andmi	r8, r4, r4
     41c:	25efffff 	strbcs	pc, [pc, #4095]!	; 1423 <RingBuffer_InsertMult+0x81>	; <UNPREDICTABLE>
     420:	01ffdfff 	ldrsheq	sp, [pc, #255]	; 527 <vcore_disable+0xf>
     424:	4000c000 	andmi	ip, r0, r0
     428:	01ffbfff 	ldrsheq	fp, [pc, #255]	; 52f <vcore_disable+0x17>
     42c:	01ff7fff 	ldrsheq	r7, [pc, #255]	; 533 <vcore_disable+0x1b>
     430:	01feffff 	ldrsheq	pc, [lr, #255]!	; 0xff	; <UNPREDICTABLE>
     434:	01fdffff 	ldrsheq	pc, [sp, #255]!	; 0xff	; <UNPREDICTABLE>
     438:	25efff7f 	strbcs	pc, [pc, #3967]!	; 13bf <RingBuffer_InsertMult+0x1d>	; <UNPREDICTABLE>

0000043c <adc_read>:
     43c:	2201      	movs	r2, #1
     43e:	2380      	movs	r3, #128	; 0x80
     440:	4082      	lsls	r2, r0
     442:	b530      	push	{r4, r5, lr}
     444:	2580      	movs	r5, #128	; 0x80
     446:	02db      	lsls	r3, r3, #11
     448:	431a      	orrs	r2, r3
     44a:	4b0f      	ldr	r3, [pc, #60]	; (488 <adc_read+0x4c>)
     44c:	062d      	lsls	r5, r5, #24
     44e:	609a      	str	r2, [r3, #8]
     450:	689c      	ldr	r4, [r3, #8]
     452:	4a0e      	ldr	r2, [pc, #56]	; (48c <adc_read+0x50>)
     454:	4014      	ands	r4, r2
     456:	432c      	orrs	r4, r5
     458:	609c      	str	r4, [r3, #8]
     45a:	689c      	ldr	r4, [r3, #8]
     45c:	4022      	ands	r2, r4
     45e:	2480      	movs	r4, #128	; 0x80
     460:	04e4      	lsls	r4, r4, #19
     462:	4322      	orrs	r2, r4
     464:	609a      	str	r2, [r3, #8]
     466:	1c02      	adds	r2, r0, #0
     468:	3208      	adds	r2, #8
     46a:	0092      	lsls	r2, r2, #2
     46c:	589a      	ldr	r2, [r3, r2]
     46e:	0f94      	lsrs	r4, r2, #30
     470:	d0f9      	beq.n	466 <adc_read+0x2a>
     472:	2900      	cmp	r1, #0
     474:	d002      	beq.n	47c <adc_read+0x40>
     476:	0412      	lsls	r2, r2, #16
     478:	0d12      	lsrs	r2, r2, #20
     47a:	800a      	strh	r2, [r1, #0]
     47c:	6899      	ldr	r1, [r3, #8]
     47e:	4a04      	ldr	r2, [pc, #16]	; (490 <adc_read+0x54>)
     480:	400a      	ands	r2, r1
     482:	609a      	str	r2, [r3, #8]
     484:	bd30      	pop	{r4, r5, pc}
     486:	46c0      	nop			; (mov r8, r8)
     488:	4001c000 	andmi	ip, r1, r0
     48c:	fc0c7fff 	stc2	15, cr7, [ip], {255}	; 0xff
     490:	7c0c7fff 	stcvc	15, cr7, [ip], {255}	; 0xff

00000494 <ds4412_set_dac>:
     494:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
     496:	2348      	movs	r3, #72	; 0x48
     498:	aa01      	add	r2, sp, #4
     49a:	3808      	subs	r0, #8
     49c:	7051      	strb	r1, [r2, #1]
     49e:	7010      	strb	r0, [r2, #0]
     4a0:	a902      	add	r1, sp, #8
     4a2:	2002      	movs	r0, #2
     4a4:	738b      	strb	r3, [r1, #14]
     4a6:	2300      	movs	r3, #0
     4a8:	8108      	strh	r0, [r1, #8]
     4aa:	4804      	ldr	r0, [pc, #16]	; (4bc <ds4412_set_dac+0x28>)
     4ac:	818b      	strh	r3, [r1, #12]
     4ae:	814b      	strh	r3, [r1, #10]
     4b0:	9202      	str	r2, [sp, #8]
     4b2:	604b      	str	r3, [r1, #4]
     4b4:	f001 f92c 	bl	1710 <Chip_I2CM_XferBlocking>
     4b8:	b007      	add	sp, #28
     4ba:	bd00      	pop	{pc}
     4bc:	40050000 	andmi	r0, r5, r0

000004c0 <vcore_check_pg1_enable>:
     4c0:	2200      	movs	r2, #0
     4c2:	b508      	push	{r3, lr}
     4c4:	4b07      	ldr	r3, [pc, #28]	; (4e4 <vcore_check_pg1_enable+0x24>)
     4c6:	801a      	strh	r2, [r3, #0]
     4c8:	23a0      	movs	r3, #160	; 0xa0
     4ca:	061b      	lsls	r3, r3, #24
     4cc:	7e1a      	ldrb	r2, [r3, #24]
     4ce:	2a00      	cmp	r2, #0
     4d0:	d104      	bne.n	4dc <vcore_check_pg1_enable+0x1c>
     4d2:	3201      	adds	r2, #1
     4d4:	741a      	strb	r2, [r3, #16]
     4d6:	4b04      	ldr	r3, [pc, #16]	; (4e8 <vcore_check_pg1_enable+0x28>)
     4d8:	3201      	adds	r2, #1
     4da:	801a      	strh	r2, [r3, #0]
     4dc:	2002      	movs	r0, #2
     4de:	f000 fc97 	bl	e10 <timer_kill>
     4e2:	bd08      	pop	{r3, pc}
     4e4:	10000000 	andne	r0, r0, r0
     4e8:	10000004 	andne	r0, r0, r4

000004ec <vcore_check_pg2_enable>:
     4ec:	2200      	movs	r2, #0
     4ee:	b508      	push	{r3, lr}
     4f0:	4b07      	ldr	r3, [pc, #28]	; (510 <vcore_check_pg2_enable+0x24>)
     4f2:	801a      	strh	r2, [r3, #0]
     4f4:	23a0      	movs	r3, #160	; 0xa0
     4f6:	061b      	lsls	r3, r3, #24
     4f8:	7bda      	ldrb	r2, [r3, #15]
     4fa:	2a00      	cmp	r2, #0
     4fc:	d104      	bne.n	508 <vcore_check_pg2_enable+0x1c>
     4fe:	3201      	adds	r2, #1
     500:	76da      	strb	r2, [r3, #27]
     502:	4b04      	ldr	r3, [pc, #16]	; (514 <vcore_check_pg2_enable+0x28>)
     504:	3201      	adds	r2, #1
     506:	805a      	strh	r2, [r3, #2]
     508:	2003      	movs	r0, #3
     50a:	f000 fc81 	bl	e10 <timer_kill>
     50e:	bd08      	pop	{r3, pc}
     510:	10000002 	andne	r0, r0, r2
     514:	10000004 	andne	r0, r0, r4

00000518 <vcore_disable>:
     518:	2801      	cmp	r0, #1
     51a:	d008      	beq.n	52e <vcore_disable+0x16>
     51c:	2802      	cmp	r0, #2
     51e:	d10c      	bne.n	53a <vcore_disable+0x22>
     520:	23a0      	movs	r3, #160	; 0xa0
     522:	2201      	movs	r2, #1
     524:	061b      	lsls	r3, r3, #24
     526:	76da      	strb	r2, [r3, #27]
     528:	4b04      	ldr	r3, [pc, #16]	; (53c <vcore_disable+0x24>)
     52a:	8058      	strh	r0, [r3, #2]
     52c:	e005      	b.n	53a <vcore_disable+0x22>
     52e:	23a0      	movs	r3, #160	; 0xa0
     530:	2202      	movs	r2, #2
     532:	061b      	lsls	r3, r3, #24
     534:	7418      	strb	r0, [r3, #16]
     536:	4b01      	ldr	r3, [pc, #4]	; (53c <vcore_disable+0x24>)
     538:	801a      	strh	r2, [r3, #0]
     53a:	4770      	bx	lr
     53c:	10000004 	andne	r0, r0, r4

00000540 <PIN_INT1_IRQHandler>:
     540:	2302      	movs	r3, #2
     542:	4a06      	ldr	r2, [pc, #24]	; (55c <PIN_INT1_IRQHandler+0x1c>)
     544:	6253      	str	r3, [r2, #36]	; 0x24
     546:	4a06      	ldr	r2, [pc, #24]	; (560 <PIN_INT1_IRQHandler+0x20>)
     548:	8812      	ldrh	r2, [r2, #0]
     54a:	2a00      	cmp	r2, #0
     54c:	d105      	bne.n	55a <PIN_INT1_IRQHandler+0x1a>
     54e:	22a0      	movs	r2, #160	; 0xa0
     550:	2101      	movs	r1, #1
     552:	0612      	lsls	r2, r2, #24
     554:	7411      	strb	r1, [r2, #16]
     556:	4a03      	ldr	r2, [pc, #12]	; (564 <PIN_INT1_IRQHandler+0x24>)
     558:	8013      	strh	r3, [r2, #0]
     55a:	4770      	bx	lr
     55c:	a0004000 	andge	r4, r0, r0
     560:	10000000 	andne	r0, r0, r0
     564:	10000004 	andne	r0, r0, r4

00000568 <PIN_INT2_IRQHandler>:
     568:	2204      	movs	r2, #4
     56a:	4b07      	ldr	r3, [pc, #28]	; (588 <PIN_INT2_IRQHandler+0x20>)
     56c:	625a      	str	r2, [r3, #36]	; 0x24
     56e:	4b07      	ldr	r3, [pc, #28]	; (58c <PIN_INT2_IRQHandler+0x24>)
     570:	881b      	ldrh	r3, [r3, #0]
     572:	2b00      	cmp	r3, #0
     574:	d106      	bne.n	584 <PIN_INT2_IRQHandler+0x1c>
     576:	23a0      	movs	r3, #160	; 0xa0
     578:	3a03      	subs	r2, #3
     57a:	061b      	lsls	r3, r3, #24
     57c:	76da      	strb	r2, [r3, #27]
     57e:	4b04      	ldr	r3, [pc, #16]	; (590 <PIN_INT2_IRQHandler+0x28>)
     580:	3201      	adds	r2, #1
     582:	805a      	strh	r2, [r3, #2]
     584:	4770      	bx	lr
     586:	46c0      	nop			; (mov r8, r8)
     588:	a0004000 	andge	r4, r0, r0
     58c:	10000002 	andne	r0, r0, r2
     590:	10000004 	andne	r0, r0, r4

00000594 <vcore_init>:
     594:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
     596:	2402      	movs	r4, #2
     598:	4b37      	ldr	r3, [pc, #220]	; (678 <vcore_init+0xe4>)
     59a:	26a0      	movs	r6, #160	; 0xa0
     59c:	801c      	strh	r4, [r3, #0]
     59e:	805c      	strh	r4, [r3, #2]
     5a0:	2280      	movs	r2, #128	; 0x80
     5a2:	238e      	movs	r3, #142	; 0x8e
     5a4:	0636      	lsls	r6, r6, #24
     5a6:	019b      	lsls	r3, r3, #6
     5a8:	0252      	lsls	r2, r2, #9
     5aa:	50f2      	str	r2, [r6, r3]
     5ac:	2280      	movs	r2, #128	; 0x80
     5ae:	0512      	lsls	r2, r2, #20
     5b0:	50f2      	str	r2, [r6, r3]
     5b2:	23be      	movs	r3, #190	; 0xbe
     5b4:	2218      	movs	r2, #24
     5b6:	4d31      	ldr	r5, [pc, #196]	; (67c <vcore_init+0xe8>)
     5b8:	005b      	lsls	r3, r3, #1
     5ba:	50ea      	str	r2, [r5, r3]
     5bc:	3a09      	subs	r2, #9
     5be:	3304      	adds	r3, #4
     5c0:	50ea      	str	r2, [r5, r3]
     5c2:	2390      	movs	r3, #144	; 0x90
     5c4:	2280      	movs	r2, #128	; 0x80
     5c6:	019b      	lsls	r3, r3, #6
     5c8:	0452      	lsls	r2, r2, #17
     5ca:	50f2      	str	r2, [r6, r3]
     5cc:	2280      	movs	r2, #128	; 0x80
     5ce:	0212      	lsls	r2, r2, #8
     5d0:	50f2      	str	r2, [r6, r3]
     5d2:	22fd      	movs	r2, #253	; 0xfd
     5d4:	4b2a      	ldr	r3, [pc, #168]	; (680 <vcore_init+0xec>)
     5d6:	4f2b      	ldr	r7, [pc, #172]	; (684 <vcore_init+0xf0>)
     5d8:	6819      	ldr	r1, [r3, #0]
     5da:	1c20      	adds	r0, r4, #0
     5dc:	400a      	ands	r2, r1
     5de:	601a      	str	r2, [r3, #0]
     5e0:	22fb      	movs	r2, #251	; 0xfb
     5e2:	615c      	str	r4, [r3, #20]
     5e4:	6819      	ldr	r1, [r3, #0]
     5e6:	3504      	adds	r5, #4
     5e8:	400a      	ands	r2, r1
     5ea:	601a      	str	r2, [r3, #0]
     5ec:	2204      	movs	r2, #4
     5ee:	615a      	str	r2, [r3, #20]
     5f0:	2380      	movs	r3, #128	; 0x80
     5f2:	049b      	lsls	r3, r3, #18
     5f4:	603b      	str	r3, [r7, #0]
     5f6:	2380      	movs	r3, #128	; 0x80
     5f8:	04db      	lsls	r3, r3, #19
     5fa:	c708      	stmia	r7!, {r3}
     5fc:	f000 fc08 	bl	e10 <timer_kill>
     600:	2003      	movs	r0, #3
     602:	f000 fc05 	bl	e10 <timer_kill>
     606:	6fea      	ldr	r2, [r5, #124]	; 0x7c
     608:	4b1f      	ldr	r3, [pc, #124]	; (688 <vcore_init+0xf4>)
     60a:	4920      	ldr	r1, [pc, #128]	; (68c <vcore_init+0xf8>)
     60c:	4013      	ands	r3, r2
     60e:	2280      	movs	r2, #128	; 0x80
     610:	4313      	orrs	r3, r2
     612:	67eb      	str	r3, [r5, #124]	; 0x7c
     614:	23e0      	movs	r3, #224	; 0xe0
     616:	4a1e      	ldr	r2, [pc, #120]	; (690 <vcore_init+0xfc>)
     618:	005b      	lsls	r3, r3, #1
     61a:	58d0      	ldr	r0, [r2, r3]
     61c:	4001      	ands	r1, r0
     61e:	50d1      	str	r1, [r2, r3]
     620:	58d0      	ldr	r0, [r2, r3]
     622:	491c      	ldr	r1, [pc, #112]	; (694 <vcore_init+0x100>)
     624:	4001      	ands	r1, r0
     626:	50d1      	str	r1, [r2, r3]
     628:	481b      	ldr	r0, [pc, #108]	; (698 <vcore_init+0x104>)
     62a:	1c22      	adds	r2, r4, #0
     62c:	2108      	movs	r1, #8
     62e:	f000 fe6b 	bl	1308 <Chip_IOCON_PinSetI2CMode>
     632:	2107      	movs	r1, #7
     634:	1c22      	adds	r2, r4, #0
     636:	4818      	ldr	r0, [pc, #96]	; (698 <vcore_init+0x104>)
     638:	f000 fe66 	bl	1308 <Chip_IOCON_PinSetI2CMode>
     63c:	6fea      	ldr	r2, [r5, #124]	; 0x7c
     63e:	4b17      	ldr	r3, [pc, #92]	; (69c <vcore_init+0x108>)
     640:	4013      	ands	r3, r2
     642:	67eb      	str	r3, [r5, #124]	; 0x7c
     644:	4d16      	ldr	r5, [pc, #88]	; (6a0 <vcore_init+0x10c>)
     646:	1c28      	adds	r0, r5, #0
     648:	f000 fc7e 	bl	f48 <Chip_I2C_Init>
     64c:	2327      	movs	r3, #39	; 0x27
     64e:	1c28      	adds	r0, r5, #0
     650:	616b      	str	r3, [r5, #20]
     652:	4914      	ldr	r1, [pc, #80]	; (6a4 <vcore_init+0x110>)
     654:	f000 ffd8 	bl	1608 <Chip_I2CM_SetBusSpeed>
     658:	231e      	movs	r3, #30
     65a:	682a      	ldr	r2, [r5, #0]
     65c:	4013      	ands	r3, r2
     65e:	2201      	movs	r2, #1
     660:	4313      	orrs	r3, r2
     662:	602b      	str	r3, [r5, #0]
     664:	2380      	movs	r3, #128	; 0x80
     666:	005b      	lsls	r3, r3, #1
     668:	67fb      	str	r3, [r7, #124]	; 0x7c
     66a:	4b03      	ldr	r3, [pc, #12]	; (678 <vcore_init+0xe4>)
     66c:	7432      	strb	r2, [r6, #16]
     66e:	801c      	strh	r4, [r3, #0]
     670:	76f2      	strb	r2, [r6, #27]
     672:	805c      	strh	r4, [r3, #2]
     674:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     676:	46c0      	nop			; (mov r8, r8)
     678:	10000004 	andne	r0, r0, r4
     67c:	40048000 	andmi	r8, r4, r0
     680:	a0004000 	andge	r4, r0, r0
     684:	e000e100 	and	lr, r0, r0, lsl #2
     688:	25efffff 	strbcs	pc, [pc, #4095]!	; 168f <Chip_I2CM_XferHandler+0x3d>	; <UNPREDICTABLE>
     68c:	01fff7ff 	ldrsheq	pc, [pc, #127]	; 713 <set_voltage+0x6b>	; <UNPREDICTABLE>
     690:	4000c000 	andmi	ip, r0, r0
     694:	01ffefff 	ldrsheq	lr, [pc, #255]	; 79b <iap_readserialid+0x43>
     698:	40044000 	andmi	r4, r4, r0
     69c:	25efff7f 	strbcs	pc, [pc, #3967]!	; 1623 <Chip_I2CM_SetBusSpeed+0x1b>	; <UNPREDICTABLE>
     6a0:	40050000 	andmi	r0, r5, r0
     6a4:	000186a0 	andeq	r8, r1, r0, lsr #13

000006a8 <set_voltage>:
     6a8:	b570      	push	{r4, r5, r6, lr}
     6aa:	1e04      	subs	r4, r0, #0
     6ac:	d01d      	beq.n	6ea <set_voltage+0x42>
     6ae:	2801      	cmp	r0, #1
     6b0:	d137      	bne.n	722 <set_voltage+0x7a>
     6b2:	b20b      	sxth	r3, r1
     6b4:	4d1d      	ldr	r5, [pc, #116]	; (72c <set_voltage+0x84>)
     6b6:	2b00      	cmp	r3, #0
     6b8:	da11      	bge.n	6de <set_voltage+0x36>
     6ba:	238f      	movs	r3, #143	; 0x8f
     6bc:	2000      	movs	r0, #0
     6be:	4019      	ands	r1, r3
     6c0:	f7ff fee8 	bl	494 <ds4412_set_dac>
     6c4:	4b1a      	ldr	r3, [pc, #104]	; (730 <set_voltage+0x88>)
     6c6:	2200      	movs	r2, #0
     6c8:	801c      	strh	r4, [r3, #0]
     6ca:	23a0      	movs	r3, #160	; 0xa0
     6cc:	061b      	lsls	r3, r3, #24
     6ce:	741a      	strb	r2, [r3, #16]
     6d0:	2002      	movs	r0, #2
     6d2:	2164      	movs	r1, #100	; 0x64
     6d4:	4a17      	ldr	r2, [pc, #92]	; (734 <set_voltage+0x8c>)
     6d6:	f000 fb8b 	bl	df0 <timer_set>
     6da:	802c      	strh	r4, [r5, #0]
     6dc:	e021      	b.n	722 <set_voltage+0x7a>
     6de:	23a0      	movs	r3, #160	; 0xa0
     6e0:	061b      	lsls	r3, r3, #24
     6e2:	7418      	strb	r0, [r3, #16]
     6e4:	2302      	movs	r3, #2
     6e6:	802b      	strh	r3, [r5, #0]
     6e8:	e01b      	b.n	722 <set_voltage+0x7a>
     6ea:	b20b      	sxth	r3, r1
     6ec:	4d0f      	ldr	r5, [pc, #60]	; (72c <set_voltage+0x84>)
     6ee:	2b00      	cmp	r3, #0
     6f0:	da11      	bge.n	716 <set_voltage+0x6e>
     6f2:	238f      	movs	r3, #143	; 0x8f
     6f4:	2601      	movs	r6, #1
     6f6:	4019      	ands	r1, r3
     6f8:	2001      	movs	r0, #1
     6fa:	f7ff fecb 	bl	494 <ds4412_set_dac>
     6fe:	4b0e      	ldr	r3, [pc, #56]	; (738 <set_voltage+0x90>)
     700:	2003      	movs	r0, #3
     702:	801e      	strh	r6, [r3, #0]
     704:	23a0      	movs	r3, #160	; 0xa0
     706:	061b      	lsls	r3, r3, #24
     708:	76dc      	strb	r4, [r3, #27]
     70a:	2164      	movs	r1, #100	; 0x64
     70c:	4a0b      	ldr	r2, [pc, #44]	; (73c <set_voltage+0x94>)
     70e:	f000 fb6f 	bl	df0 <timer_set>
     712:	806e      	strh	r6, [r5, #2]
     714:	e005      	b.n	722 <set_voltage+0x7a>
     716:	23a0      	movs	r3, #160	; 0xa0
     718:	2201      	movs	r2, #1
     71a:	061b      	lsls	r3, r3, #24
     71c:	76da      	strb	r2, [r3, #27]
     71e:	2302      	movs	r3, #2
     720:	806b      	strh	r3, [r5, #2]
     722:	2032      	movs	r0, #50	; 0x32
     724:	f000 f8b0 	bl	888 <delayus>
     728:	2000      	movs	r0, #0
     72a:	bd70      	pop	{r4, r5, r6, pc}
     72c:	10000004 	andne	r0, r0, r4
     730:	10000000 	andne	r0, r0, r0
     734:	000004c1 	andeq	r0, r0, r1, asr #9
     738:	10000002 	andne	r0, r0, r2
     73c:	000004ed 	andeq	r0, r0, sp, ror #9

00000740 <get_pg_state>:
     740:	1c03      	adds	r3, r0, #0
     742:	2001      	movs	r0, #1
     744:	4283      	cmp	r3, r0
     746:	d803      	bhi.n	750 <get_pg_state+0x10>
     748:	1ac0      	subs	r0, r0, r3
     74a:	4b02      	ldr	r3, [pc, #8]	; (754 <get_pg_state+0x14>)
     74c:	0040      	lsls	r0, r0, #1
     74e:	5c18      	ldrb	r0, [r3, r0]
     750:	4770      	bx	lr
     752:	46c0      	nop			; (mov r8, r8)
     754:	10000004 	andne	r0, r0, r4

00000758 <iap_readserialid>:
     758:	233a      	movs	r3, #58	; 0x3a
     75a:	b530      	push	{r4, r5, lr}
     75c:	b08b      	sub	sp, #44	; 0x2c
     75e:	9300      	str	r3, [sp, #0]
     760:	1c04      	adds	r4, r0, #0
     762:	a905      	add	r1, sp, #20
     764:	4668      	mov	r0, sp
     766:	4b17      	ldr	r3, [pc, #92]	; (7c4 <iap_readserialid+0x6c>)
     768:	4798      	blx	r3
     76a:	9d05      	ldr	r5, [sp, #20]
     76c:	2001      	movs	r0, #1
     76e:	2d00      	cmp	r5, #0
     770:	d126      	bne.n	7c0 <iap_readserialid+0x68>
     772:	9b06      	ldr	r3, [sp, #24]
     774:	1c20      	adds	r0, r4, #0
     776:	0c1a      	lsrs	r2, r3, #16
     778:	0619      	lsls	r1, r3, #24
     77a:	b29b      	uxth	r3, r3
     77c:	0c09      	lsrs	r1, r1, #16
     77e:	0a1b      	lsrs	r3, r3, #8
     780:	430b      	orrs	r3, r1
     782:	0a11      	lsrs	r1, r2, #8
     784:	0612      	lsls	r2, r2, #24
     786:	0c12      	lsrs	r2, r2, #16
     788:	430a      	orrs	r2, r1
     78a:	041b      	lsls	r3, r3, #16
     78c:	4313      	orrs	r3, r2
     78e:	a906      	add	r1, sp, #24
     790:	2204      	movs	r2, #4
     792:	9306      	str	r3, [sp, #24]
     794:	f000 ffee 	bl	1774 <memcpy>
     798:	9b07      	ldr	r3, [sp, #28]
     79a:	1d20      	adds	r0, r4, #4
     79c:	0c1a      	lsrs	r2, r3, #16
     79e:	0619      	lsls	r1, r3, #24
     7a0:	b29b      	uxth	r3, r3
     7a2:	0c09      	lsrs	r1, r1, #16
     7a4:	0a1b      	lsrs	r3, r3, #8
     7a6:	430b      	orrs	r3, r1
     7a8:	0a11      	lsrs	r1, r2, #8
     7aa:	0612      	lsls	r2, r2, #24
     7ac:	0c12      	lsrs	r2, r2, #16
     7ae:	430a      	orrs	r2, r1
     7b0:	041b      	lsls	r3, r3, #16
     7b2:	4313      	orrs	r3, r2
     7b4:	a907      	add	r1, sp, #28
     7b6:	2204      	movs	r2, #4
     7b8:	9307      	str	r3, [sp, #28]
     7ba:	f000 ffdb 	bl	1774 <memcpy>
     7be:	1c28      	adds	r0, r5, #0
     7c0:	b00b      	add	sp, #44	; 0x2c
     7c2:	bd30      	pop	{r4, r5, pc}
     7c4:	1fff1ff1 	svcne	0x00ff1ff1

000007c8 <led_init>:
     7c8:	b510      	push	{r4, lr}
     7ca:	238e      	movs	r3, #142	; 0x8e
     7cc:	24a0      	movs	r4, #160	; 0xa0
     7ce:	2280      	movs	r2, #128	; 0x80
     7d0:	0624      	lsls	r4, r4, #24
     7d2:	019b      	lsls	r3, r3, #6
     7d4:	0192      	lsls	r2, r2, #6
     7d6:	50e2      	str	r2, [r4, r3]
     7d8:	2280      	movs	r2, #128	; 0x80
     7da:	0152      	lsls	r2, r2, #5
     7dc:	50e2      	str	r2, [r4, r3]
     7de:	2280      	movs	r2, #128	; 0x80
     7e0:	0092      	lsls	r2, r2, #2
     7e2:	50e2      	str	r2, [r4, r3]
     7e4:	3a01      	subs	r2, #1
     7e6:	3aff      	subs	r2, #255	; 0xff
     7e8:	50e2      	str	r2, [r4, r3]
     7ea:	20fa      	movs	r0, #250	; 0xfa
     7ec:	2300      	movs	r3, #0
     7ee:	0080      	lsls	r0, r0, #2
     7f0:	7363      	strb	r3, [r4, #13]
     7f2:	7323      	strb	r3, [r4, #12]
     7f4:	7263      	strb	r3, [r4, #9]
     7f6:	7223      	strb	r3, [r4, #8]
     7f8:	f000 f83a 	bl	870 <delay>
     7fc:	2301      	movs	r3, #1
     7fe:	7363      	strb	r3, [r4, #13]
     800:	7323      	strb	r3, [r4, #12]
     802:	7263      	strb	r3, [r4, #9]
     804:	7223      	strb	r3, [r4, #8]
     806:	bd10      	pop	{r4, pc}

00000808 <set_led_state>:
     808:	b510      	push	{r4, lr}
     80a:	2800      	cmp	r0, #0
     80c:	d011      	beq.n	832 <set_led_state+0x2a>
     80e:	2801      	cmp	r0, #1
     810:	d11f      	bne.n	852 <set_led_state+0x4a>
     812:	4b10      	ldr	r3, [pc, #64]	; (854 <set_led_state+0x4c>)
     814:	8019      	strh	r1, [r3, #0]
     816:	23a0      	movs	r3, #160	; 0xa0
     818:	061b      	lsls	r3, r3, #24
     81a:	078a      	lsls	r2, r1, #30
     81c:	d502      	bpl.n	824 <set_led_state+0x1c>
     81e:	2200      	movs	r2, #0
     820:	731a      	strb	r2, [r3, #12]
     822:	e000      	b.n	826 <set_led_state+0x1e>
     824:	7318      	strb	r0, [r3, #12]
     826:	2201      	movs	r2, #1
     828:	4211      	tst	r1, r2
     82a:	d000      	beq.n	82e <set_led_state+0x26>
     82c:	2200      	movs	r2, #0
     82e:	735a      	strb	r2, [r3, #13]
     830:	e00f      	b.n	852 <set_led_state+0x4a>
     832:	4b08      	ldr	r3, [pc, #32]	; (854 <set_led_state+0x4c>)
     834:	2201      	movs	r2, #1
     836:	8059      	strh	r1, [r3, #2]
     838:	23a0      	movs	r3, #160	; 0xa0
     83a:	061b      	lsls	r3, r3, #24
     83c:	078c      	lsls	r4, r1, #30
     83e:	d501      	bpl.n	844 <set_led_state+0x3c>
     840:	7218      	strb	r0, [r3, #8]
     842:	e000      	b.n	846 <set_led_state+0x3e>
     844:	721a      	strb	r2, [r3, #8]
     846:	4211      	tst	r1, r2
     848:	d001      	beq.n	84e <set_led_state+0x46>
     84a:	2200      	movs	r2, #0
     84c:	e000      	b.n	850 <set_led_state+0x48>
     84e:	2201      	movs	r2, #1
     850:	725a      	strb	r2, [r3, #9]
     852:	bd10      	pop	{r4, pc}
     854:	10000008 	andne	r0, r0, r8

00000858 <get_led_state>:
     858:	2300      	movs	r3, #0
     85a:	2801      	cmp	r0, #1
     85c:	d804      	bhi.n	868 <get_led_state+0x10>
     85e:	3301      	adds	r3, #1
     860:	1a18      	subs	r0, r3, r0
     862:	4098      	lsls	r0, r3
     864:	4b01      	ldr	r3, [pc, #4]	; (86c <get_led_state+0x14>)
     866:	5ac3      	ldrh	r3, [r0, r3]
     868:	1c18      	adds	r0, r3, #0
     86a:	4770      	bx	lr
     86c:	10000008 	andne	r0, r0, r8

00000870 <delay>:
     870:	2800      	cmp	r0, #0
     872:	d006      	beq.n	882 <delay+0x12>
     874:	4b03      	ldr	r3, [pc, #12]	; (884 <delay+0x14>)
     876:	3801      	subs	r0, #1
     878:	46c0      	nop			; (mov r8, r8)
     87a:	3b01      	subs	r3, #1
     87c:	2b00      	cmp	r3, #0
     87e:	d1fb      	bne.n	878 <delay+0x8>
     880:	e7f6      	b.n	870 <delay>
     882:	4770      	bx	lr
     884:	00000bb8 			; <UNDEFINED> instruction: 0x00000bb8

00000888 <delayus>:
     888:	2800      	cmp	r0, #0
     88a:	d004      	beq.n	896 <delayus+0xe>
     88c:	3801      	subs	r0, #1
     88e:	46c0      	nop			; (mov r8, r8)
     890:	46c0      	nop			; (mov r8, r8)
     892:	46c0      	nop			; (mov r8, r8)
     894:	e7f8      	b.n	888 <delayus>
     896:	4770      	bx	lr

00000898 <main>:
     898:	b5f0      	push	{r4, r5, r6, r7, lr}
     89a:	b087      	sub	sp, #28
     89c:	f000 fd40 	bl	1320 <SystemCoreClockUpdate>
     8a0:	f000 fb26 	bl	ef0 <Board_Init>
     8a4:	f7ff fe76 	bl	594 <vcore_init>
     8a8:	f000 fa70 	bl	d8c <timer_init>
     8ac:	f7ff ff8c 	bl	7c8 <led_init>
     8b0:	f7ff fd58 	bl	364 <adc_init>
     8b4:	f000 f980 	bl	bb8 <uart_init>
     8b8:	2000      	movs	r0, #0
     8ba:	49b4      	ldr	r1, [pc, #720]	; (b8c <main+0x2f4>)
     8bc:	1c02      	adds	r2, r0, #0
     8be:	f000 fa97 	bl	df0 <timer_set>
     8c2:	21fa      	movs	r1, #250	; 0xfa
     8c4:	2001      	movs	r0, #1
     8c6:	0089      	lsls	r1, r1, #2
     8c8:	2200      	movs	r2, #0
     8ca:	f000 fa91 	bl	df0 <timer_set>
     8ce:	2400      	movs	r4, #0
     8d0:	2c01      	cmp	r4, #1
     8d2:	d100      	bne.n	8d6 <main+0x3e>
     8d4:	e0e1      	b.n	a9a <main+0x202>
     8d6:	f000 f9ef 	bl	cb8 <uart_rxrb_cnt>
     8da:	2827      	cmp	r0, #39	; 0x27
     8dc:	d800      	bhi.n	8e0 <main+0x48>
     8de:	e0d7      	b.n	a90 <main+0x1f8>
     8e0:	4dab      	ldr	r5, [pc, #684]	; (b90 <main+0x2f8>)
     8e2:	2100      	movs	r1, #0
     8e4:	2228      	movs	r2, #40	; 0x28
     8e6:	1c28      	adds	r0, r5, #0
     8e8:	f000 ff48 	bl	177c <memset>
     8ec:	1c28      	adds	r0, r5, #0
     8ee:	2128      	movs	r1, #40	; 0x28
     8f0:	f000 f9ea 	bl	cc8 <uart_read>
     8f4:	2400      	movs	r4, #0
     8f6:	1e06      	subs	r6, r0, #0
     8f8:	2e28      	cmp	r6, #40	; 0x28
     8fa:	d000      	beq.n	8fe <main+0x66>
     8fc:	e0d5      	b.n	aaa <main+0x212>
     8fe:	1deb      	adds	r3, r5, #7
     900:	7fdf      	ldrb	r7, [r3, #31]
     902:	1c2b      	adds	r3, r5, #0
     904:	3308      	adds	r3, #8
     906:	7fdb      	ldrb	r3, [r3, #31]
     908:	023f      	lsls	r7, r7, #8
     90a:	1da8      	adds	r0, r5, #6
     90c:	2120      	movs	r1, #32
     90e:	431f      	orrs	r7, r3
     910:	f7ff fd10 	bl	334 <crc16>
     914:	4287      	cmp	r7, r0
     916:	d000      	beq.n	91a <main+0x82>
     918:	e0ba      	b.n	a90 <main+0x1f8>
     91a:	1c20      	adds	r0, r4, #0
     91c:	499b      	ldr	r1, [pc, #620]	; (b8c <main+0x2f4>)
     91e:	1c22      	adds	r2, r4, #0
     920:	f000 fa66 	bl	df0 <timer_set>
     924:	78ab      	ldrb	r3, [r5, #2]
     926:	2b24      	cmp	r3, #36	; 0x24
     928:	d100      	bne.n	92c <main+0x94>
     92a:	e097      	b.n	a5c <main+0x1c4>
     92c:	d80c      	bhi.n	948 <main+0xb0>
     92e:	2b10      	cmp	r3, #16
     930:	d018      	beq.n	964 <main+0xcc>
     932:	2b22      	cmp	r3, #34	; 0x22
     934:	d000      	beq.n	938 <main+0xa0>
     936:	e0ab      	b.n	a90 <main+0x1f8>
     938:	79a9      	ldrb	r1, [r5, #6]
     93a:	79eb      	ldrb	r3, [r5, #7]
     93c:	0209      	lsls	r1, r1, #8
     93e:	7928      	ldrb	r0, [r5, #4]
     940:	4319      	orrs	r1, r3
     942:	f7ff feb1 	bl	6a8 <set_voltage>
     946:	e0a3      	b.n	a90 <main+0x1f8>
     948:	2b28      	cmp	r3, #40	; 0x28
     94a:	d100      	bne.n	94e <main+0xb6>
     94c:	e091      	b.n	a72 <main+0x1da>
     94e:	2b30      	cmp	r3, #48	; 0x30
     950:	d000      	beq.n	954 <main+0xbc>
     952:	e09d      	b.n	a90 <main+0x1f8>
     954:	4d8f      	ldr	r5, [pc, #572]	; (b94 <main+0x2fc>)
     956:	1c32      	adds	r2, r6, #0
     958:	1c28      	adds	r0, r5, #0
     95a:	1c21      	adds	r1, r4, #0
     95c:	f000 ff0e 	bl	177c <memset>
     960:	1c2e      	adds	r6, r5, #0
     962:	e02b      	b.n	9bc <main+0x124>
     964:	4d8b      	ldr	r5, [pc, #556]	; (b94 <main+0x2fc>)
     966:	1c21      	adds	r1, r4, #0
     968:	1c32      	adds	r2, r6, #0
     96a:	1c28      	adds	r0, r5, #0
     96c:	f000 ff06 	bl	177c <memset>
     970:	1daf      	adds	r7, r5, #6
     972:	4889      	ldr	r0, [pc, #548]	; (b98 <main+0x300>)
     974:	f7ff fef0 	bl	758 <iap_readserialid>
     978:	4987      	ldr	r1, [pc, #540]	; (b98 <main+0x300>)
     97a:	2208      	movs	r2, #8
     97c:	1c38      	adds	r0, r7, #0
     97e:	f000 fef9 	bl	1774 <memcpy>
     982:	1c28      	adds	r0, r5, #0
     984:	220f      	movs	r2, #15
     986:	4985      	ldr	r1, [pc, #532]	; (b9c <main+0x304>)
     988:	300e      	adds	r0, #14
     98a:	f000 fef3 	bl	1774 <memcpy>
     98e:	2343      	movs	r3, #67	; 0x43
     990:	702b      	strb	r3, [r5, #0]
     992:	330b      	adds	r3, #11
     994:	706b      	strb	r3, [r5, #1]
     996:	3b0e      	subs	r3, #14
     998:	70ab      	strb	r3, [r5, #2]
     99a:	3b3f      	subs	r3, #63	; 0x3f
     99c:	712b      	strb	r3, [r5, #4]
     99e:	716b      	strb	r3, [r5, #5]
     9a0:	2120      	movs	r1, #32
     9a2:	70ec      	strb	r4, [r5, #3]
     9a4:	1c38      	adds	r0, r7, #0
     9a6:	f7ff fcc5 	bl	334 <crc16>
     9aa:	1deb      	adds	r3, r5, #7
     9ac:	0a02      	lsrs	r2, r0, #8
     9ae:	77da      	strb	r2, [r3, #31]
     9b0:	1c2b      	adds	r3, r5, #0
     9b2:	3308      	adds	r3, #8
     9b4:	77d8      	strb	r0, [r3, #31]
     9b6:	1c31      	adds	r1, r6, #0
     9b8:	1c28      	adds	r0, r5, #0
     9ba:	e04c      	b.n	a56 <main+0x1be>
     9bc:	4b78      	ldr	r3, [pc, #480]	; (ba0 <main+0x308>)
     9be:	5ae2      	ldrh	r2, [r4, r3]
     9c0:	1933      	adds	r3, r6, r4
     9c2:	0a11      	lsrs	r1, r2, #8
     9c4:	3402      	adds	r4, #2
     9c6:	7199      	strb	r1, [r3, #6]
     9c8:	71da      	strb	r2, [r3, #7]
     9ca:	2c0a      	cmp	r4, #10
     9cc:	d1f6      	bne.n	9bc <main+0x124>
     9ce:	2400      	movs	r4, #0
     9d0:	2000      	movs	r0, #0
     9d2:	f7ff feb5 	bl	740 <get_pg_state>
     9d6:	1c20      	adds	r0, r4, #0
     9d8:	742c      	strb	r4, [r5, #16]
     9da:	f7ff feb1 	bl	740 <get_pg_state>
     9de:	7468      	strb	r0, [r5, #17]
     9e0:	2001      	movs	r0, #1
     9e2:	f7ff fead 	bl	740 <get_pg_state>
     9e6:	2001      	movs	r0, #1
     9e8:	74ac      	strb	r4, [r5, #18]
     9ea:	f7ff fea9 	bl	740 <get_pg_state>
     9ee:	74e8      	strb	r0, [r5, #19]
     9f0:	1c20      	adds	r0, r4, #0
     9f2:	f7ff ff31 	bl	858 <get_led_state>
     9f6:	0a00      	lsrs	r0, r0, #8
     9f8:	7528      	strb	r0, [r5, #20]
     9fa:	1c20      	adds	r0, r4, #0
     9fc:	f7ff ff2c 	bl	858 <get_led_state>
     a00:	7568      	strb	r0, [r5, #21]
     a02:	2001      	movs	r0, #1
     a04:	f7ff ff28 	bl	858 <get_led_state>
     a08:	0a00      	lsrs	r0, r0, #8
     a0a:	75a8      	strb	r0, [r5, #22]
     a0c:	2001      	movs	r0, #1
     a0e:	f7ff ff23 	bl	858 <get_led_state>
     a12:	2101      	movs	r1, #1
     a14:	4b63      	ldr	r3, [pc, #396]	; (ba4 <main+0x30c>)
     a16:	75e8      	strb	r0, [r5, #23]
     a18:	5659      	ldrsb	r1, [r3, r1]
     a1a:	881a      	ldrh	r2, [r3, #0]
     a1c:	7629      	strb	r1, [r5, #24]
     a1e:	766a      	strb	r2, [r5, #25]
     a20:	885a      	ldrh	r2, [r3, #2]
     a22:	78db      	ldrb	r3, [r3, #3]
     a24:	2120      	movs	r1, #32
     a26:	b25b      	sxtb	r3, r3
     a28:	76ab      	strb	r3, [r5, #26]
     a2a:	2343      	movs	r3, #67	; 0x43
     a2c:	702b      	strb	r3, [r5, #0]
     a2e:	330b      	adds	r3, #11
     a30:	706b      	strb	r3, [r5, #1]
     a32:	3b06      	subs	r3, #6
     a34:	70ab      	strb	r3, [r5, #2]
     a36:	3b47      	subs	r3, #71	; 0x47
     a38:	712b      	strb	r3, [r5, #4]
     a3a:	716b      	strb	r3, [r5, #5]
     a3c:	70ec      	strb	r4, [r5, #3]
     a3e:	1db0      	adds	r0, r6, #6
     a40:	76ea      	strb	r2, [r5, #27]
     a42:	f7ff fc77 	bl	334 <crc16>
     a46:	1df3      	adds	r3, r6, #7
     a48:	0a02      	lsrs	r2, r0, #8
     a4a:	77da      	strb	r2, [r3, #31]
     a4c:	1c33      	adds	r3, r6, #0
     a4e:	3308      	adds	r3, #8
     a50:	77d8      	strb	r0, [r3, #31]
     a52:	2128      	movs	r1, #40	; 0x28
     a54:	1c30      	adds	r0, r6, #0
     a56:	f000 f96b 	bl	d30 <uart_write>
     a5a:	e019      	b.n	a90 <main+0x1f8>
     a5c:	78eb      	ldrb	r3, [r5, #3]
     a5e:	2b00      	cmp	r3, #0
     a60:	d116      	bne.n	a90 <main+0x1f8>
     a62:	79a9      	ldrb	r1, [r5, #6]
     a64:	79eb      	ldrb	r3, [r5, #7]
     a66:	0209      	lsls	r1, r1, #8
     a68:	7928      	ldrb	r0, [r5, #4]
     a6a:	4319      	orrs	r1, r3
     a6c:	f7ff fecc 	bl	808 <set_led_state>
     a70:	e00e      	b.n	a90 <main+0x1f8>
     a72:	7929      	ldrb	r1, [r5, #4]
     a74:	79ab      	ldrb	r3, [r5, #6]
     a76:	79ea      	ldrb	r2, [r5, #7]
     a78:	2901      	cmp	r1, #1
     a7a:	d809      	bhi.n	a90 <main+0x1f8>
     a7c:	021b      	lsls	r3, r3, #8
     a7e:	4313      	orrs	r3, r2
     a80:	b21a      	sxth	r2, r3
     a82:	2a00      	cmp	r2, #0
     a84:	da04      	bge.n	a90 <main+0x1f8>
     a86:	051b      	lsls	r3, r3, #20
     a88:	4a46      	ldr	r2, [pc, #280]	; (ba4 <main+0x30c>)
     a8a:	0049      	lsls	r1, r1, #1
     a8c:	0d1b      	lsrs	r3, r3, #20
     a8e:	528b      	strh	r3, [r1, r2]
     a90:	2000      	movs	r0, #0
     a92:	f000 f9c9 	bl	e28 <timer_istimeout>
     a96:	1c04      	adds	r4, r0, #0
     a98:	e007      	b.n	aaa <main+0x212>
     a9a:	f000 f90d 	bl	cb8 <uart_rxrb_cnt>
     a9e:	2400      	movs	r4, #0
     aa0:	2327      	movs	r3, #39	; 0x27
     aa2:	4283      	cmp	r3, r0
     aa4:	4164      	adcs	r4, r4
     aa6:	b2e4      	uxtb	r4, r4
     aa8:	bf30      	wfi
     aaa:	2001      	movs	r0, #1
     aac:	f000 f9bc 	bl	e28 <timer_istimeout>
     ab0:	2800      	cmp	r0, #0
     ab2:	d100      	bne.n	ab6 <main+0x21e>
     ab4:	e70c      	b.n	8d0 <main+0x38>
     ab6:	4e3c      	ldr	r6, [pc, #240]	; (ba8 <main+0x310>)
     ab8:	4d3c      	ldr	r5, [pc, #240]	; (bac <main+0x314>)
     aba:	8831      	ldrh	r1, [r6, #0]
     abc:	2003      	movs	r0, #3
     abe:	3103      	adds	r1, #3
     ac0:	0049      	lsls	r1, r1, #1
     ac2:	1869      	adds	r1, r5, r1
     ac4:	f7ff fcba 	bl	43c <adc_read>
     ac8:	8831      	ldrh	r1, [r6, #0]
     aca:	2004      	movs	r0, #4
     acc:	0049      	lsls	r1, r1, #1
     ace:	1869      	adds	r1, r5, r1
     ad0:	f7ff fcb4 	bl	43c <adc_read>
     ad4:	8831      	ldrh	r1, [r6, #0]
     ad6:	2001      	movs	r0, #1
     ad8:	3106      	adds	r1, #6
     ada:	0049      	lsls	r1, r1, #1
     adc:	1869      	adds	r1, r5, r1
     ade:	f7ff fcad 	bl	43c <adc_read>
     ae2:	8831      	ldrh	r1, [r6, #0]
     ae4:	2002      	movs	r0, #2
     ae6:	310c      	adds	r1, #12
     ae8:	0049      	lsls	r1, r1, #1
     aea:	1869      	adds	r1, r5, r1
     aec:	f7ff fca6 	bl	43c <adc_read>
     af0:	8831      	ldrh	r1, [r6, #0]
     af2:	2000      	movs	r0, #0
     af4:	3109      	adds	r1, #9
     af6:	0049      	lsls	r1, r1, #1
     af8:	1869      	adds	r1, r5, r1
     afa:	f7ff fc9f 	bl	43c <adc_read>
     afe:	8832      	ldrh	r2, [r6, #0]
     b00:	2300      	movs	r3, #0
     b02:	3201      	adds	r2, #1
     b04:	b292      	uxth	r2, r2
     b06:	2a02      	cmp	r2, #2
     b08:	d801      	bhi.n	b0e <main+0x276>
     b0a:	8032      	strh	r2, [r6, #0]
     b0c:	e000      	b.n	b10 <main+0x278>
     b0e:	8033      	strh	r3, [r6, #0]
     b10:	2200      	movs	r2, #0
     b12:	ae01      	add	r6, sp, #4
     b14:	9301      	str	r3, [sp, #4]
     b16:	6073      	str	r3, [r6, #4]
     b18:	60b3      	str	r3, [r6, #8]
     b1a:	60f3      	str	r3, [r6, #12]
     b1c:	6133      	str	r3, [r6, #16]
     b1e:	2300      	movs	r3, #0
     b20:	2106      	movs	r1, #6
     b22:	4359      	muls	r1, r3
     b24:	009f      	lsls	r7, r3, #2
     b26:	18a8      	adds	r0, r5, r2
     b28:	5a41      	ldrh	r1, [r0, r1]
     b2a:	59f0      	ldr	r0, [r6, r7]
     b2c:	3301      	adds	r3, #1
     b2e:	1809      	adds	r1, r1, r0
     b30:	51f1      	str	r1, [r6, r7]
     b32:	2b05      	cmp	r3, #5
     b34:	d1f4      	bne.n	b20 <main+0x288>
     b36:	3202      	adds	r2, #2
     b38:	2a06      	cmp	r2, #6
     b3a:	d1f0      	bne.n	b1e <main+0x286>
     b3c:	2700      	movs	r7, #0
     b3e:	007b      	lsls	r3, r7, #1
     b40:	58f0      	ldr	r0, [r6, r3]
     b42:	2103      	movs	r1, #3
     b44:	f000 fe25 	bl	1792 <__aeabi_uidiv>
     b48:	f000 fece 	bl	18e8 <__aeabi_ui2f>
     b4c:	f000 fe88 	bl	1860 <__aeabi_f2uiz>
     b50:	4d13      	ldr	r5, [pc, #76]	; (ba0 <main+0x308>)
     b52:	5378      	strh	r0, [r7, r5]
     b54:	3702      	adds	r7, #2
     b56:	2f0a      	cmp	r7, #10
     b58:	d1f1      	bne.n	b3e <main+0x2a6>
     b5a:	4e12      	ldr	r6, [pc, #72]	; (ba4 <main+0x30c>)
     b5c:	886a      	ldrh	r2, [r5, #2]
     b5e:	2102      	movs	r1, #2
     b60:	5e73      	ldrsh	r3, [r6, r1]
     b62:	429a      	cmp	r2, r3
     b64:	dc02      	bgt.n	b6c <main+0x2d4>
     b66:	2001      	movs	r0, #1
     b68:	f7ff fcd6 	bl	518 <vcore_disable>
     b6c:	882a      	ldrh	r2, [r5, #0]
     b6e:	2100      	movs	r1, #0
     b70:	5e73      	ldrsh	r3, [r6, r1]
     b72:	429a      	cmp	r2, r3
     b74:	dc02      	bgt.n	b7c <main+0x2e4>
     b76:	2002      	movs	r0, #2
     b78:	f7ff fcce 	bl	518 <vcore_disable>
     b7c:	21fa      	movs	r1, #250	; 0xfa
     b7e:	2001      	movs	r0, #1
     b80:	0089      	lsls	r1, r1, #2
     b82:	2200      	movs	r2, #0
     b84:	f000 f934 	bl	df0 <timer_set>
     b88:	e6a2      	b.n	8d0 <main+0x38>
     b8a:	46c0      	nop			; (mov r8, r8)
     b8c:	00000bb8 			; <UNDEFINED> instruction: 0x00000bb8
     b90:	10000066 	andne	r0, r0, r6, rrx
     b94:	10000014 	andne	r0, r0, r4, lsl r0
     b98:	1000000c 	andne	r0, r0, ip
     b9c:	0000195a 	andeq	r1, r0, sl, asr r9
     ba0:	1000005a 	andne	r0, r0, sl, asr r0
     ba4:	1000008e 	andne	r0, r0, lr, lsl #1
     ba8:	10000064 	andne	r0, r0, r4, rrx
     bac:	1000003c 	andne	r0, r0, ip, lsr r0

00000bb0 <SystemInit>:
     bb0:	b508      	push	{r3, lr}
     bb2:	f000 f9c3 	bl	f3c <Board_SystemInit>
     bb6:	bd08      	pop	{r3, pc}

00000bb8 <uart_init>:
     bb8:	4a2b      	ldr	r2, [pc, #172]	; (c68 <uart_init+0xb0>)
     bba:	b570      	push	{r4, r5, r6, lr}
     bbc:	1d14      	adds	r4, r2, #4
     bbe:	6fe1      	ldr	r1, [r4, #124]	; 0x7c
     bc0:	4b2a      	ldr	r3, [pc, #168]	; (c6c <uart_init+0xb4>)
     bc2:	2501      	movs	r5, #1
     bc4:	400b      	ands	r3, r1
     bc6:	2180      	movs	r1, #128	; 0x80
     bc8:	2680      	movs	r6, #128	; 0x80
     bca:	4829      	ldr	r0, [pc, #164]	; (c70 <uart_init+0xb8>)
     bcc:	430b      	orrs	r3, r1
     bce:	3141      	adds	r1, #65	; 0x41
     bd0:	67e3      	str	r3, [r4, #124]	; 0x7c
     bd2:	31ff      	adds	r1, #255	; 0xff
     bd4:	5843      	ldr	r3, [r0, r1]
     bd6:	0476      	lsls	r6, r6, #17
     bd8:	01db      	lsls	r3, r3, #7
     bda:	09db      	lsrs	r3, r3, #7
     bdc:	432b      	orrs	r3, r5
     bde:	5043      	str	r3, [r0, r1]
     be0:	5843      	ldr	r3, [r0, r1]
     be2:	3294      	adds	r2, #148	; 0x94
     be4:	01db      	lsls	r3, r3, #7
     be6:	09db      	lsrs	r3, r3, #7
     be8:	4333      	orrs	r3, r6
     bea:	5043      	str	r3, [r0, r1]
     bec:	39bd      	subs	r1, #189	; 0xbd
     bee:	6015      	str	r5, [r2, #0]
     bf0:	2000      	movs	r0, #0
     bf2:	39ff      	subs	r1, #255	; 0xff
     bf4:	f000 fb6a 	bl	12cc <Chip_SWM_MovablePinAssign>
     bf8:	1c28      	adds	r0, r5, #0
     bfa:	2100      	movs	r1, #0
     bfc:	f000 fb66 	bl	12cc <Chip_SWM_MovablePinAssign>
     c00:	6fe2      	ldr	r2, [r4, #124]	; 0x7c
     c02:	4b1c      	ldr	r3, [pc, #112]	; (c74 <uart_init+0xbc>)
     c04:	2604      	movs	r6, #4
     c06:	4013      	ands	r3, r2
     c08:	67e3      	str	r3, [r4, #124]	; 0x7c
     c0a:	4c1b      	ldr	r4, [pc, #108]	; (c78 <uart_init+0xc0>)
     c0c:	1c20      	adds	r0, r4, #0
     c0e:	f000 fab1 	bl	1174 <Chip_UART_Init>
     c12:	20e1      	movs	r0, #225	; 0xe1
     c14:	6822      	ldr	r2, [r4, #0]
     c16:	4b19      	ldr	r3, [pc, #100]	; (c7c <uart_init+0xc4>)
     c18:	1c29      	adds	r1, r5, #0
     c1a:	4013      	ands	r3, r2
     c1c:	4333      	orrs	r3, r6
     c1e:	6023      	str	r3, [r4, #0]
     c20:	0340      	lsls	r0, r0, #13
     c22:	f000 fa6b 	bl	10fc <Chip_Clock_SetUSARTNBaseClockRate>
     c26:	21e1      	movs	r1, #225	; 0xe1
     c28:	1c20      	adds	r0, r4, #0
     c2a:	0249      	lsls	r1, r1, #9
     c2c:	f000 faea 	bl	1204 <Chip_UART_SetBaud>
     c30:	6822      	ldr	r2, [r4, #0]
     c32:	4b13      	ldr	r3, [pc, #76]	; (c80 <uart_init+0xc8>)
     c34:	4913      	ldr	r1, [pc, #76]	; (c84 <uart_init+0xcc>)
     c36:	4013      	ands	r3, r2
     c38:	432b      	orrs	r3, r5
     c3a:	6023      	str	r3, [r4, #0]
     c3c:	6862      	ldr	r2, [r4, #4]
     c3e:	4b12      	ldr	r3, [pc, #72]	; (c88 <uart_init+0xd0>)
     c40:	4812      	ldr	r0, [pc, #72]	; (c8c <uart_init+0xd4>)
     c42:	4013      	ands	r3, r2
     c44:	6063      	str	r3, [r4, #4]
     c46:	1c2a      	adds	r2, r5, #0
     c48:	23a0      	movs	r3, #160	; 0xa0
     c4a:	f000 fb87 	bl	135c <RingBuffer_Init>
     c4e:	1c2a      	adds	r2, r5, #0
     c50:	490f      	ldr	r1, [pc, #60]	; (c90 <uart_init+0xd8>)
     c52:	23a0      	movs	r3, #160	; 0xa0
     c54:	480f      	ldr	r0, [pc, #60]	; (c94 <uart_init+0xdc>)
     c56:	f000 fb81 	bl	135c <RingBuffer_Init>
     c5a:	2208      	movs	r2, #8
     c5c:	4b0e      	ldr	r3, [pc, #56]	; (c98 <uart_init+0xe0>)
     c5e:	60e5      	str	r5, [r4, #12]
     c60:	6126      	str	r6, [r4, #16]
     c62:	601a      	str	r2, [r3, #0]
     c64:	bd70      	pop	{r4, r5, r6, pc}
     c66:	46c0      	nop			; (mov r8, r8)
     c68:	40048000 	andmi	r8, r4, r0
     c6c:	25efffff 	strbcs	pc, [pc, #4095]!	; 1c73 <config_tab+0x2bf>	; <UNPREDICTABLE>
     c70:	4000c000 	andmi	ip, r0, r0
     c74:	25efff7f 	strbcs	pc, [pc, #3967]!	; 1bfb <config_tab+0x247>	; <UNPREDICTABLE>
     c78:	40064000 	andmi	r4, r6, r0
     c7c:	00fcda01 	rscseq	sp, ip, r1, lsl #20
     c80:	00fcda7c 	rscseq	sp, ip, ip, ror sl
     c84:	10000092 	mulne	r0, r2, r0
     c88:	00010306 	andeq	r0, r1, r6, lsl #6
     c8c:	10000134 	andne	r0, r0, r4, lsr r1
     c90:	1000015c 	andne	r0, r0, ip, asr r1
     c94:	10000148 	andne	r0, r0, r8, asr #2
     c98:	e000e100 	and	lr, r0, r0, lsl #2

00000c9c <UART0_IRQHandler>:
     c9c:	b508      	push	{r3, lr}
     c9e:	4803      	ldr	r0, [pc, #12]	; (cac <UART0_IRQHandler+0x10>)
     ca0:	4903      	ldr	r1, [pc, #12]	; (cb0 <UART0_IRQHandler+0x14>)
     ca2:	4a04      	ldr	r2, [pc, #16]	; (cb4 <UART0_IRQHandler+0x18>)
     ca4:	f000 fafc 	bl	12a0 <Chip_UART_IRQRBHandler>
     ca8:	bd08      	pop	{r3, pc}
     caa:	46c0      	nop			; (mov r8, r8)
     cac:	40064000 	andmi	r4, r6, r0
     cb0:	10000134 	andne	r0, r0, r4, lsr r1
     cb4:	10000148 	andne	r0, r0, r8, asr #2

00000cb8 <uart_rxrb_cnt>:
     cb8:	4a02      	ldr	r2, [pc, #8]	; (cc4 <uart_rxrb_cnt+0xc>)
     cba:	68d3      	ldr	r3, [r2, #12]
     cbc:	6910      	ldr	r0, [r2, #16]
     cbe:	1a18      	subs	r0, r3, r0
     cc0:	4770      	bx	lr
     cc2:	46c0      	nop			; (mov r8, r8)
     cc4:	10000134 	andne	r0, r0, r4, lsr r1

00000cc8 <uart_read>:
     cc8:	b5f0      	push	{r4, r5, r6, r7, lr}
     cca:	b085      	sub	sp, #20
     ccc:	ab02      	add	r3, sp, #8
     cce:	1d9d      	adds	r5, r3, #6
     cd0:	2300      	movs	r3, #0
     cd2:	aa02      	add	r2, sp, #8
     cd4:	4e14      	ldr	r6, [pc, #80]	; (d28 <uart_read+0x60>)
     cd6:	1dd7      	adds	r7, r2, #7
     cd8:	9101      	str	r1, [sp, #4]
     cda:	702b      	strb	r3, [r5, #0]
     cdc:	703b      	strb	r3, [r7, #0]
     cde:	1c04      	adds	r4, r0, #0
     ce0:	3301      	adds	r3, #1
     ce2:	4812      	ldr	r0, [pc, #72]	; (d2c <uart_read+0x64>)
     ce4:	1c31      	adds	r1, r6, #0
     ce6:	1c2a      	adds	r2, r5, #0
     ce8:	f000 fad3 	bl	1292 <Chip_UART_ReadRB>
     cec:	782b      	ldrb	r3, [r5, #0]
     cee:	2b43      	cmp	r3, #67	; 0x43
     cf0:	d001      	beq.n	cf6 <uart_read+0x2e>
     cf2:	2000      	movs	r0, #0
     cf4:	e016      	b.n	d24 <uart_read+0x5c>
     cf6:	2301      	movs	r3, #1
     cf8:	480c      	ldr	r0, [pc, #48]	; (d2c <uart_read+0x64>)
     cfa:	1c31      	adds	r1, r6, #0
     cfc:	1c3a      	adds	r2, r7, #0
     cfe:	f000 fac8 	bl	1292 <Chip_UART_ReadRB>
     d02:	783b      	ldrb	r3, [r7, #0]
     d04:	2b4e      	cmp	r3, #78	; 0x4e
     d06:	d1f4      	bne.n	cf2 <uart_read+0x2a>
     d08:	1e20      	subs	r0, r4, #0
     d0a:	d00a      	beq.n	d22 <uart_read+0x5a>
     d0c:	782a      	ldrb	r2, [r5, #0]
     d0e:	7063      	strb	r3, [r4, #1]
     d10:	9b01      	ldr	r3, [sp, #4]
     d12:	7022      	strb	r2, [r4, #0]
     d14:	3b02      	subs	r3, #2
     d16:	1ca2      	adds	r2, r4, #2
     d18:	4804      	ldr	r0, [pc, #16]	; (d2c <uart_read+0x64>)
     d1a:	1c31      	adds	r1, r6, #0
     d1c:	f000 fab9 	bl	1292 <Chip_UART_ReadRB>
     d20:	b280      	uxth	r0, r0
     d22:	3002      	adds	r0, #2
     d24:	b005      	add	sp, #20
     d26:	bdf0      	pop	{r4, r5, r6, r7, pc}
     d28:	10000134 	andne	r0, r0, r4, lsr r1
     d2c:	40064000 	andmi	r4, r6, r0

00000d30 <uart_write>:
     d30:	b508      	push	{r3, lr}
     d32:	1e02      	subs	r2, r0, #0
     d34:	d004      	beq.n	d40 <uart_write+0x10>
     d36:	1c0b      	adds	r3, r1, #0
     d38:	4802      	ldr	r0, [pc, #8]	; (d44 <uart_write+0x14>)
     d3a:	4903      	ldr	r1, [pc, #12]	; (d48 <uart_write+0x18>)
     d3c:	f000 fa8e 	bl	125c <Chip_UART_SendRB>
     d40:	bd08      	pop	{r3, pc}
     d42:	46c0      	nop			; (mov r8, r8)
     d44:	40064000 	andmi	r4, r6, r0
     d48:	10000148 	andne	r0, r0, r8, asr #2

00000d4c <SysTick_Handler>:
     d4c:	b538      	push	{r3, r4, r5, lr}
     d4e:	4c0d      	ldr	r4, [pc, #52]	; (d84 <SysTick_Handler+0x38>)
     d50:	4d0d      	ldr	r5, [pc, #52]	; (d88 <SysTick_Handler+0x3c>)
     d52:	1f23      	subs	r3, r4, #4
     d54:	781b      	ldrb	r3, [r3, #0]
     d56:	2b00      	cmp	r3, #0
     d58:	d00f      	beq.n	d7a <SysTick_Handler+0x2e>
     d5a:	6823      	ldr	r3, [r4, #0]
     d5c:	2b00      	cmp	r3, #0
     d5e:	d00c      	beq.n	d7a <SysTick_Handler+0x2e>
     d60:	3b01      	subs	r3, #1
     d62:	6023      	str	r3, [r4, #0]
     d64:	2b00      	cmp	r3, #0
     d66:	d108      	bne.n	d7a <SysTick_Handler+0x2e>
     d68:	68a3      	ldr	r3, [r4, #8]
     d6a:	2b00      	cmp	r3, #0
     d6c:	d001      	beq.n	d72 <SysTick_Handler+0x26>
     d6e:	4798      	blx	r3
     d70:	e001      	b.n	d76 <SysTick_Handler+0x2a>
     d72:	2301      	movs	r3, #1
     d74:	7323      	strb	r3, [r4, #12]
     d76:	6863      	ldr	r3, [r4, #4]
     d78:	6023      	str	r3, [r4, #0]
     d7a:	3414      	adds	r4, #20
     d7c:	42ac      	cmp	r4, r5
     d7e:	d1e8      	bne.n	d52 <SysTick_Handler+0x6>
     d80:	bd38      	pop	{r3, r4, r5, pc}
     d82:	46c0      	nop			; (mov r8, r8)
     d84:	10000204 	andne	r0, r0, r4, lsl #4
     d88:	10000254 	andne	r0, r0, r4, asr r2

00000d8c <timer_init>:
     d8c:	b510      	push	{r4, lr}
     d8e:	4b12      	ldr	r3, [pc, #72]	; (dd8 <timer_init+0x4c>)
     d90:	4a12      	ldr	r2, [pc, #72]	; (ddc <timer_init+0x50>)
     d92:	2400      	movs	r4, #0
     d94:	1f19      	subs	r1, r3, #4
     d96:	700c      	strb	r4, [r1, #0]
     d98:	601c      	str	r4, [r3, #0]
     d9a:	605c      	str	r4, [r3, #4]
     d9c:	609c      	str	r4, [r3, #8]
     d9e:	731c      	strb	r4, [r3, #12]
     da0:	3314      	adds	r3, #20
     da2:	4293      	cmp	r3, r2
     da4:	d1f5      	bne.n	d92 <timer_init+0x6>
     da6:	21fa      	movs	r1, #250	; 0xfa
     da8:	4b0d      	ldr	r3, [pc, #52]	; (de0 <timer_init+0x54>)
     daa:	0089      	lsls	r1, r1, #2
     dac:	6818      	ldr	r0, [r3, #0]
     dae:	f000 fcf0 	bl	1792 <__aeabi_uidiv>
     db2:	4b0c      	ldr	r3, [pc, #48]	; (de4 <timer_init+0x58>)
     db4:	3801      	subs	r0, #1
     db6:	4298      	cmp	r0, r3
     db8:	d80c      	bhi.n	dd4 <timer_init+0x48>
     dba:	4a0b      	ldr	r2, [pc, #44]	; (de8 <timer_init+0x5c>)
     dbc:	490b      	ldr	r1, [pc, #44]	; (dec <timer_init+0x60>)
     dbe:	6050      	str	r0, [r2, #4]
     dc0:	20c0      	movs	r0, #192	; 0xc0
     dc2:	6a0b      	ldr	r3, [r1, #32]
     dc4:	0600      	lsls	r0, r0, #24
     dc6:	021b      	lsls	r3, r3, #8
     dc8:	0a1b      	lsrs	r3, r3, #8
     dca:	4303      	orrs	r3, r0
     dcc:	620b      	str	r3, [r1, #32]
     dce:	2307      	movs	r3, #7
     dd0:	6094      	str	r4, [r2, #8]
     dd2:	6013      	str	r3, [r2, #0]
     dd4:	bd10      	pop	{r4, pc}
     dd6:	46c0      	nop			; (mov r8, r8)
     dd8:	10000204 	andne	r0, r0, r4, lsl #4
     ddc:	10000254 	andne	r0, r0, r4, asr r2
     de0:	10000250 	andne	r0, r0, r0, asr r2
     de4:	00ffffff 	ldrshteq	pc, [pc], #255	; <UNPREDICTABLE>
     de8:	e000e010 	and	lr, r0, r0, lsl r0
     dec:	e000ed00 	and	lr, r0, r0, lsl #26

00000df0 <timer_set>:
     df0:	2314      	movs	r3, #20
     df2:	4358      	muls	r0, r3
     df4:	b510      	push	{r4, lr}
     df6:	4c05      	ldr	r4, [pc, #20]	; (e0c <timer_set+0x1c>)
     df8:	3b13      	subs	r3, #19
     dfa:	5503      	strb	r3, [r0, r4]
     dfc:	2300      	movs	r3, #0
     dfe:	1820      	adds	r0, r4, r0
     e00:	6041      	str	r1, [r0, #4]
     e02:	6081      	str	r1, [r0, #8]
     e04:	60c2      	str	r2, [r0, #12]
     e06:	7403      	strb	r3, [r0, #16]
     e08:	bd10      	pop	{r4, pc}
     e0a:	46c0      	nop			; (mov r8, r8)
     e0c:	10000200 	andne	r0, r0, r0, lsl #4

00000e10 <timer_kill>:
     e10:	2314      	movs	r3, #20
     e12:	4358      	muls	r0, r3
     e14:	4a03      	ldr	r2, [pc, #12]	; (e24 <timer_kill+0x14>)
     e16:	5c83      	ldrb	r3, [r0, r2]
     e18:	2b00      	cmp	r3, #0
     e1a:	d001      	beq.n	e20 <timer_kill+0x10>
     e1c:	2300      	movs	r3, #0
     e1e:	5483      	strb	r3, [r0, r2]
     e20:	4770      	bx	lr
     e22:	46c0      	nop			; (mov r8, r8)
     e24:	10000200 	andne	r0, r0, r0, lsl #4

00000e28 <timer_istimeout>:
     e28:	2214      	movs	r2, #20
     e2a:	1c13      	adds	r3, r2, #0
     e2c:	4343      	muls	r3, r0
     e2e:	4903      	ldr	r1, [pc, #12]	; (e3c <timer_istimeout+0x14>)
     e30:	5c58      	ldrb	r0, [r3, r1]
     e32:	2800      	cmp	r0, #0
     e34:	d001      	beq.n	e3a <timer_istimeout+0x12>
     e36:	18cb      	adds	r3, r1, r3
     e38:	7c18      	ldrb	r0, [r3, #16]
     e3a:	4770      	bx	lr
     e3c:	10000200 	andne	r0, r0, r0, lsl #4

00000e40 <Board_Debug_Init>:
     e40:	4a23      	ldr	r2, [pc, #140]	; (ed0 <Board_Debug_Init+0x90>)
     e42:	b538      	push	{r3, r4, r5, lr}
     e44:	1d14      	adds	r4, r2, #4
     e46:	6fe1      	ldr	r1, [r4, #124]	; 0x7c
     e48:	4b22      	ldr	r3, [pc, #136]	; (ed4 <Board_Debug_Init+0x94>)
     e4a:	2580      	movs	r5, #128	; 0x80
     e4c:	400b      	ands	r3, r1
     e4e:	2180      	movs	r1, #128	; 0x80
     e50:	4821      	ldr	r0, [pc, #132]	; (ed8 <Board_Debug_Init+0x98>)
     e52:	430b      	orrs	r3, r1
     e54:	3141      	adds	r1, #65	; 0x41
     e56:	67e3      	str	r3, [r4, #124]	; 0x7c
     e58:	31ff      	adds	r1, #255	; 0xff
     e5a:	5843      	ldr	r3, [r0, r1]
     e5c:	03ad      	lsls	r5, r5, #14
     e5e:	01db      	lsls	r3, r3, #7
     e60:	09db      	lsrs	r3, r3, #7
     e62:	432b      	orrs	r3, r5
     e64:	2580      	movs	r5, #128	; 0x80
     e66:	5043      	str	r3, [r0, r1]
     e68:	5843      	ldr	r3, [r0, r1]
     e6a:	03ed      	lsls	r5, r5, #15
     e6c:	01db      	lsls	r3, r3, #7
     e6e:	09db      	lsrs	r3, r3, #7
     e70:	432b      	orrs	r3, r5
     e72:	5043      	str	r3, [r0, r1]
     e74:	2501      	movs	r5, #1
     e76:	2011      	movs	r0, #17
     e78:	3294      	adds	r2, #148	; 0x94
     e7a:	6015      	str	r5, [r2, #0]
     e7c:	1c01      	adds	r1, r0, #0
     e7e:	f000 fa25 	bl	12cc <Chip_SWM_MovablePinAssign>
     e82:	2012      	movs	r0, #18
     e84:	1c01      	adds	r1, r0, #0
     e86:	f000 fa21 	bl	12cc <Chip_SWM_MovablePinAssign>
     e8a:	6fe2      	ldr	r2, [r4, #124]	; 0x7c
     e8c:	4b13      	ldr	r3, [pc, #76]	; (edc <Board_Debug_Init+0x9c>)
     e8e:	4013      	ands	r3, r2
     e90:	67e3      	str	r3, [r4, #124]	; 0x7c
     e92:	4c13      	ldr	r4, [pc, #76]	; (ee0 <Board_Debug_Init+0xa0>)
     e94:	1c20      	adds	r0, r4, #0
     e96:	f000 f96d 	bl	1174 <Chip_UART_Init>
     e9a:	6822      	ldr	r2, [r4, #0]
     e9c:	4b11      	ldr	r3, [pc, #68]	; (ee4 <Board_Debug_Init+0xa4>)
     e9e:	20e1      	movs	r0, #225	; 0xe1
     ea0:	4013      	ands	r3, r2
     ea2:	2204      	movs	r2, #4
     ea4:	4313      	orrs	r3, r2
     ea6:	6023      	str	r3, [r4, #0]
     ea8:	1c29      	adds	r1, r5, #0
     eaa:	0340      	lsls	r0, r0, #13
     eac:	f000 f926 	bl	10fc <Chip_Clock_SetUSARTNBaseClockRate>
     eb0:	21e1      	movs	r1, #225	; 0xe1
     eb2:	1c20      	adds	r0, r4, #0
     eb4:	0249      	lsls	r1, r1, #9
     eb6:	f000 f9a5 	bl	1204 <Chip_UART_SetBaud>
     eba:	6821      	ldr	r1, [r4, #0]
     ebc:	4b0a      	ldr	r3, [pc, #40]	; (ee8 <Board_Debug_Init+0xa8>)
     ebe:	4019      	ands	r1, r3
     ec0:	4329      	orrs	r1, r5
     ec2:	6021      	str	r1, [r4, #0]
     ec4:	6862      	ldr	r2, [r4, #4]
     ec6:	4b09      	ldr	r3, [pc, #36]	; (eec <Board_Debug_Init+0xac>)
     ec8:	4013      	ands	r3, r2
     eca:	6063      	str	r3, [r4, #4]
     ecc:	bd38      	pop	{r3, r4, r5, pc}
     ece:	46c0      	nop			; (mov r8, r8)
     ed0:	40048000 	andmi	r8, r4, r0
     ed4:	25efffff 	strbcs	pc, [pc, #4095]!	; 1edb <__exidx_end+0x1d3>	; <UNPREDICTABLE>
     ed8:	4000c000 	andmi	ip, r0, r0
     edc:	25efff7f 	strbcs	pc, [pc, #3967]!	; 1e63 <__exidx_end+0x15b>	; <UNPREDICTABLE>
     ee0:	40068000 	andmi	r8, r6, r0
     ee4:	00fcda01 	rscseq	sp, ip, r1, lsl #20
     ee8:	00fcda7c 	rscseq	sp, ip, ip, ror sl
     eec:	00010306 	andeq	r0, r1, r6, lsl #6

00000ef0 <Board_Init>:
     ef0:	b510      	push	{r4, lr}
     ef2:	24a0      	movs	r4, #160	; 0xa0
     ef4:	0624      	lsls	r4, r4, #24
     ef6:	f7ff ffa3 	bl	e40 <Board_Debug_Init>
     efa:	1c20      	adds	r0, r4, #0
     efc:	f000 fa18 	bl	1330 <Chip_GPIO_Init>
     f00:	228e      	movs	r2, #142	; 0x8e
     f02:	2380      	movs	r3, #128	; 0x80
     f04:	0192      	lsls	r2, r2, #6
     f06:	029b      	lsls	r3, r3, #10
     f08:	2180      	movs	r1, #128	; 0x80
     f0a:	50a3      	str	r3, [r4, r2]
     f0c:	2301      	movs	r3, #1
     f0e:	0249      	lsls	r1, r1, #9
     f10:	7463      	strb	r3, [r4, #17]
     f12:	50a1      	str	r1, [r4, r2]
     f14:	2180      	movs	r1, #128	; 0x80
     f16:	0509      	lsls	r1, r1, #20
     f18:	7423      	strb	r3, [r4, #16]
     f1a:	50a1      	str	r1, [r4, r2]
     f1c:	76e3      	strb	r3, [r4, #27]
     f1e:	bd10      	pop	{r4, pc}

00000f20 <Board_SetupMuxing>:
     f20:	4a04      	ldr	r2, [pc, #16]	; (f34 <Board_SetupMuxing+0x14>)
     f22:	4b05      	ldr	r3, [pc, #20]	; (f38 <Board_SetupMuxing+0x18>)
     f24:	6fd1      	ldr	r1, [r2, #124]	; 0x7c
     f26:	400b      	ands	r3, r1
     f28:	2180      	movs	r1, #128	; 0x80
     f2a:	02c9      	lsls	r1, r1, #11
     f2c:	430b      	orrs	r3, r1
     f2e:	67d3      	str	r3, [r2, #124]	; 0x7c
     f30:	4770      	bx	lr
     f32:	46c0      	nop			; (mov r8, r8)
     f34:	40048004 	andmi	r8, r4, r4
     f38:	25efffff 	strbcs	pc, [pc, #4095]!	; 1f3f <__exidx_end+0x237>	; <UNPREDICTABLE>

00000f3c <Board_SystemInit>:
     f3c:	b508      	push	{r3, lr}
     f3e:	f7ff ffef 	bl	f20 <Board_SetupMuxing>
     f42:	f000 fa01 	bl	1348 <Chip_SetupIrcClocking>
     f46:	bd08      	pop	{r3, pc}

00000f48 <Chip_I2C_Init>:
     f48:	b530      	push	{r4, r5, lr}
     f4a:	4c18      	ldr	r4, [pc, #96]	; (fac <Chip_I2C_Init+0x64>)
     f4c:	2216      	movs	r2, #22
     f4e:	42a0      	cmp	r0, r4
     f50:	d008      	beq.n	f64 <Chip_I2C_Init+0x1c>
     f52:	4b17      	ldr	r3, [pc, #92]	; (fb0 <Chip_I2C_Init+0x68>)
     f54:	3201      	adds	r2, #1
     f56:	4298      	cmp	r0, r3
     f58:	d004      	beq.n	f64 <Chip_I2C_Init+0x1c>
     f5a:	4b16      	ldr	r3, [pc, #88]	; (fb4 <Chip_I2C_Init+0x6c>)
     f5c:	3a02      	subs	r2, #2
     f5e:	4298      	cmp	r0, r3
     f60:	d000      	beq.n	f64 <Chip_I2C_Init+0x1c>
     f62:	3a10      	subs	r2, #16
     f64:	2101      	movs	r1, #1
     f66:	4091      	lsls	r1, r2
     f68:	4d13      	ldr	r5, [pc, #76]	; (fb8 <Chip_I2C_Init+0x70>)
     f6a:	4a14      	ldr	r2, [pc, #80]	; (fbc <Chip_I2C_Init+0x74>)
     f6c:	6feb      	ldr	r3, [r5, #124]	; 0x7c
     f6e:	4013      	ands	r3, r2
     f70:	430b      	orrs	r3, r1
     f72:	67eb      	str	r3, [r5, #124]	; 0x7c
     f74:	220f      	movs	r2, #15
     f76:	42a0      	cmp	r0, r4
     f78:	d008      	beq.n	f8c <Chip_I2C_Init+0x44>
     f7a:	4b0d      	ldr	r3, [pc, #52]	; (fb0 <Chip_I2C_Init+0x68>)
     f7c:	3201      	adds	r2, #1
     f7e:	4298      	cmp	r0, r3
     f80:	d004      	beq.n	f8c <Chip_I2C_Init+0x44>
     f82:	4b0c      	ldr	r3, [pc, #48]	; (fb4 <Chip_I2C_Init+0x6c>)
     f84:	3a02      	subs	r2, #2
     f86:	4298      	cmp	r0, r3
     f88:	d000      	beq.n	f8c <Chip_I2C_Init+0x44>
     f8a:	3a08      	subs	r2, #8
     f8c:	2301      	movs	r3, #1
     f8e:	4093      	lsls	r3, r2
     f90:	1c18      	adds	r0, r3, #0
     f92:	490b      	ldr	r1, [pc, #44]	; (fc0 <Chip_I2C_Init+0x78>)
     f94:	4b0b      	ldr	r3, [pc, #44]	; (fc4 <Chip_I2C_Init+0x7c>)
     f96:	684c      	ldr	r4, [r1, #4]
     f98:	4303      	orrs	r3, r0
     f9a:	439c      	bics	r4, r3
     f9c:	604c      	str	r4, [r1, #4]
     f9e:	684b      	ldr	r3, [r1, #4]
     fa0:	4a09      	ldr	r2, [pc, #36]	; (fc8 <Chip_I2C_Init+0x80>)
     fa2:	4013      	ands	r3, r2
     fa4:	4303      	orrs	r3, r0
     fa6:	604b      	str	r3, [r1, #4]
     fa8:	bd30      	pop	{r4, r5, pc}
     faa:	46c0      	nop			; (mov r8, r8)
     fac:	40070000 	andmi	r0, r7, r0
     fb0:	40074000 	andmi	r4, r7, r0
     fb4:	40054000 	andmi	r4, r5, r0
     fb8:	40048004 	andmi	r8, r4, r4
     fbc:	25efffff 	strbcs	pc, [pc, #4095]!	; 1fc3 <__exidx_end+0x2bb>	; <UNPREDICTABLE>
     fc0:	40048000 	andmi	r8, r4, r0
     fc4:	fffe2000 			; <UNDEFINED> instruction: 0xfffe2000
     fc8:	0001dfff 	strdeq	sp, [r1], -pc	; <UNPREDICTABLE>

00000fcc <Chip_Clock_SetSystemPLLSource>:
     fcc:	2200      	movs	r2, #0
     fce:	4b03      	ldr	r3, [pc, #12]	; (fdc <Chip_Clock_SetSystemPLLSource+0x10>)
     fd0:	6418      	str	r0, [r3, #64]	; 0x40
     fd2:	645a      	str	r2, [r3, #68]	; 0x44
     fd4:	3201      	adds	r2, #1
     fd6:	645a      	str	r2, [r3, #68]	; 0x44
     fd8:	4770      	bx	lr
     fda:	46c0      	nop			; (mov r8, r8)
     fdc:	40048000 	andmi	r8, r4, r0

00000fe0 <Chip_Clock_SetMainClockSource>:
     fe0:	2200      	movs	r2, #0
     fe2:	4b03      	ldr	r3, [pc, #12]	; (ff0 <Chip_Clock_SetMainClockSource+0x10>)
     fe4:	6718      	str	r0, [r3, #112]	; 0x70
     fe6:	675a      	str	r2, [r3, #116]	; 0x74
     fe8:	3201      	adds	r2, #1
     fea:	675a      	str	r2, [r3, #116]	; 0x74
     fec:	4770      	bx	lr
     fee:	46c0      	nop			; (mov r8, r8)
     ff0:	40048000 	andmi	r8, r4, r0

00000ff4 <Chip_Clock_GetWDTOSCRate>:
     ff4:	b508      	push	{r3, lr}
     ff6:	4b07      	ldr	r3, [pc, #28]	; (1014 <Chip_Clock_GetWDTOSCRate+0x20>)
     ff8:	6a59      	ldr	r1, [r3, #36]	; 0x24
     ffa:	231f      	movs	r3, #31
     ffc:	05ca      	lsls	r2, r1, #23
     ffe:	0f12      	lsrs	r2, r2, #28
    1000:	4019      	ands	r1, r3
    1002:	4b05      	ldr	r3, [pc, #20]	; (1018 <Chip_Clock_GetWDTOSCRate+0x24>)
    1004:	0092      	lsls	r2, r2, #2
    1006:	3101      	adds	r1, #1
    1008:	0049      	lsls	r1, r1, #1
    100a:	58d0      	ldr	r0, [r2, r3]
    100c:	f000 fbc1 	bl	1792 <__aeabi_uidiv>
    1010:	bd08      	pop	{r3, pc}
    1012:	46c0      	nop			; (mov r8, r8)
    1014:	40048000 	andmi	r8, r4, r0
    1018:	00001974 	andeq	r1, r0, r4, ror r9

0000101c <Chip_Clock_GetSystemPLLInClockRate>:
    101c:	4b08      	ldr	r3, [pc, #32]	; (1040 <Chip_Clock_GetSystemPLLInClockRate+0x24>)
    101e:	6c1a      	ldr	r2, [r3, #64]	; 0x40
    1020:	2303      	movs	r3, #3
    1022:	4013      	ands	r3, r2
    1024:	2b01      	cmp	r3, #1
    1026:	d006      	beq.n	1036 <Chip_Clock_GetSystemPLLInClockRate+0x1a>
    1028:	2b03      	cmp	r3, #3
    102a:	d006      	beq.n	103a <Chip_Clock_GetSystemPLLInClockRate+0x1e>
    102c:	2000      	movs	r0, #0
    102e:	2b00      	cmp	r3, #0
    1030:	d105      	bne.n	103e <Chip_Clock_GetSystemPLLInClockRate+0x22>
    1032:	4804      	ldr	r0, [pc, #16]	; (1044 <Chip_Clock_GetSystemPLLInClockRate+0x28>)
    1034:	e003      	b.n	103e <Chip_Clock_GetSystemPLLInClockRate+0x22>
    1036:	4b04      	ldr	r3, [pc, #16]	; (1048 <Chip_Clock_GetSystemPLLInClockRate+0x2c>)
    1038:	e000      	b.n	103c <Chip_Clock_GetSystemPLLInClockRate+0x20>
    103a:	4b04      	ldr	r3, [pc, #16]	; (104c <Chip_Clock_GetSystemPLLInClockRate+0x30>)
    103c:	6818      	ldr	r0, [r3, #0]
    103e:	4770      	bx	lr
    1040:	40048000 	andmi	r8, r4, r0
    1044:	00b71b00 	adcseq	r1, r7, r0, lsl #22
    1048:	0000196c 	andeq	r1, r0, ip, ror #18
    104c:	00001970 	andeq	r1, r0, r0, ror r9

00001050 <Chip_Clock_GetSystemPLLOutClockRate>:
    1050:	4b04      	ldr	r3, [pc, #16]	; (1064 <Chip_Clock_GetSystemPLLOutClockRate+0x14>)
    1052:	b510      	push	{r4, lr}
    1054:	689c      	ldr	r4, [r3, #8]
    1056:	f7ff ffe1 	bl	101c <Chip_Clock_GetSystemPLLInClockRate>
    105a:	231f      	movs	r3, #31
    105c:	4023      	ands	r3, r4
    105e:	3301      	adds	r3, #1
    1060:	4358      	muls	r0, r3
    1062:	bd10      	pop	{r4, pc}
    1064:	40048000 	andmi	r8, r4, r0

00001068 <Chip_Clock_GetMainClockRate>:
    1068:	b508      	push	{r3, lr}
    106a:	4b0a      	ldr	r3, [pc, #40]	; (1094 <Chip_Clock_GetMainClockRate+0x2c>)
    106c:	6f1a      	ldr	r2, [r3, #112]	; 0x70
    106e:	2303      	movs	r3, #3
    1070:	4013      	ands	r3, r2
    1072:	2b02      	cmp	r3, #2
    1074:	d006      	beq.n	1084 <Chip_Clock_GetMainClockRate+0x1c>
    1076:	2b03      	cmp	r3, #3
    1078:	d007      	beq.n	108a <Chip_Clock_GetMainClockRate+0x22>
    107a:	2b01      	cmp	r3, #1
    107c:	d108      	bne.n	1090 <Chip_Clock_GetMainClockRate+0x28>
    107e:	f7ff ffcd 	bl	101c <Chip_Clock_GetSystemPLLInClockRate>
    1082:	e006      	b.n	1092 <Chip_Clock_GetMainClockRate+0x2a>
    1084:	f7ff ffb6 	bl	ff4 <Chip_Clock_GetWDTOSCRate>
    1088:	e003      	b.n	1092 <Chip_Clock_GetMainClockRate+0x2a>
    108a:	f7ff ffe1 	bl	1050 <Chip_Clock_GetSystemPLLOutClockRate>
    108e:	e000      	b.n	1092 <Chip_Clock_GetMainClockRate+0x2a>
    1090:	4801      	ldr	r0, [pc, #4]	; (1098 <Chip_Clock_GetMainClockRate+0x30>)
    1092:	bd08      	pop	{r3, pc}
    1094:	40048000 	andmi	r8, r4, r0
    1098:	00b71b00 	adcseq	r1, r7, r0, lsl #22

0000109c <Chip_Clock_GetSystemClockRate>:
    109c:	b508      	push	{r3, lr}
    109e:	f7ff ffe3 	bl	1068 <Chip_Clock_GetMainClockRate>
    10a2:	4b03      	ldr	r3, [pc, #12]	; (10b0 <Chip_Clock_GetSystemClockRate+0x14>)
    10a4:	6f99      	ldr	r1, [r3, #120]	; 0x78
    10a6:	b2c9      	uxtb	r1, r1
    10a8:	f000 fb73 	bl	1792 <__aeabi_uidiv>
    10ac:	bd08      	pop	{r3, pc}
    10ae:	46c0      	nop			; (mov r8, r8)
    10b0:	40048000 	andmi	r8, r4, r0

000010b4 <Chip_Clock_GetUSARTNBaseClockRate>:
    10b4:	b538      	push	{r3, r4, r5, lr}
    10b6:	2000      	movs	r0, #0
    10b8:	24ff      	movs	r4, #255	; 0xff
    10ba:	4b0d      	ldr	r3, [pc, #52]	; (10f0 <Chip_Clock_GetUSARTNBaseClockRate+0x3c>)
    10bc:	681d      	ldr	r5, [r3, #0]
    10be:	4025      	ands	r5, r4
    10c0:	4285      	cmp	r5, r0
    10c2:	d013      	beq.n	10ec <Chip_Clock_GetUSARTNBaseClockRate+0x38>
    10c4:	f7ff ffd0 	bl	1068 <Chip_Clock_GetMainClockRate>
    10c8:	1c29      	adds	r1, r5, #0
    10ca:	f000 fb62 	bl	1792 <__aeabi_uidiv>
    10ce:	4b09      	ldr	r3, [pc, #36]	; (10f4 <Chip_Clock_GetUSARTNBaseClockRate+0x40>)
    10d0:	681a      	ldr	r2, [r3, #0]
    10d2:	4014      	ands	r4, r2
    10d4:	2cff      	cmp	r4, #255	; 0xff
    10d6:	d109      	bne.n	10ec <Chip_Clock_GetUSARTNBaseClockRate+0x38>
    10d8:	4b07      	ldr	r3, [pc, #28]	; (10f8 <Chip_Clock_GetUSARTNBaseClockRate+0x44>)
    10da:	0e01      	lsrs	r1, r0, #24
    10dc:	681a      	ldr	r2, [r3, #0]
    10de:	0200      	lsls	r0, r0, #8
    10e0:	4014      	ands	r4, r2
    10e2:	1c62      	adds	r2, r4, #1
    10e4:	32ff      	adds	r2, #255	; 0xff
    10e6:	2300      	movs	r3, #0
    10e8:	f000 fb8c 	bl	1804 <__aeabi_uldivmod>
    10ec:	bd38      	pop	{r3, r4, r5, pc}
    10ee:	46c0      	nop			; (mov r8, r8)
    10f0:	40048094 	mulmi	r4, r4, r0
    10f4:	400480f0 	strdmi	r8, [r4], -r0
    10f8:	400480f4 	strdmi	r8, [r4], -r4

000010fc <Chip_Clock_SetUSARTNBaseClockRate>:
    10fc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    10fe:	1c05      	adds	r5, r0, #0
    1100:	1c0f      	adds	r7, r1, #0
    1102:	f7ff ffb1 	bl	1068 <Chip_Clock_GetMainClockRate>
    1106:	1c29      	adds	r1, r5, #0
    1108:	1c06      	adds	r6, r0, #0
    110a:	f000 fb42 	bl	1792 <__aeabi_uidiv>
    110e:	1e01      	subs	r1, r0, #0
    1110:	d100      	bne.n	1114 <Chip_Clock_SetUSARTNBaseClockRate+0x18>
    1112:	3101      	adds	r1, #1
    1114:	24ff      	movs	r4, #255	; 0xff
    1116:	1c08      	adds	r0, r1, #0
    1118:	4b10      	ldr	r3, [pc, #64]	; (115c <Chip_Clock_SetUSARTNBaseClockRate+0x60>)
    111a:	4020      	ands	r0, r4
    111c:	6018      	str	r0, [r3, #0]
    111e:	4a10      	ldr	r2, [pc, #64]	; (1160 <Chip_Clock_SetUSARTNBaseClockRate+0x64>)
    1120:	4810      	ldr	r0, [pc, #64]	; (1164 <Chip_Clock_SetUSARTNBaseClockRate+0x68>)
    1122:	2f00      	cmp	r7, #0
    1124:	d015      	beq.n	1152 <Chip_Clock_SetUSARTNBaseClockRate+0x56>
    1126:	6857      	ldr	r7, [r2, #4]
    1128:	4b0f      	ldr	r3, [pc, #60]	; (1168 <Chip_Clock_SetUSARTNBaseClockRate+0x6c>)
    112a:	403b      	ands	r3, r7
    112c:	6053      	str	r3, [r2, #4]
    112e:	6857      	ldr	r7, [r2, #4]
    1130:	4b0e      	ldr	r3, [pc, #56]	; (116c <Chip_Clock_SetUSARTNBaseClockRate+0x70>)
    1132:	403b      	ands	r3, r7
    1134:	2704      	movs	r7, #4
    1136:	433b      	orrs	r3, r7
    1138:	6053      	str	r3, [r2, #4]
    113a:	6004      	str	r4, [r0, #0]
    113c:	1c30      	adds	r0, r6, #0
    113e:	f000 fb28 	bl	1792 <__aeabi_uidiv>
    1142:	1c29      	adds	r1, r5, #0
    1144:	0200      	lsls	r0, r0, #8
    1146:	f000 fb24 	bl	1792 <__aeabi_uidiv>
    114a:	4b09      	ldr	r3, [pc, #36]	; (1170 <Chip_Clock_SetUSARTNBaseClockRate+0x74>)
    114c:	4004      	ands	r4, r0
    114e:	601c      	str	r4, [r3, #0]
    1150:	e000      	b.n	1154 <Chip_Clock_SetUSARTNBaseClockRate+0x58>
    1152:	6007      	str	r7, [r0, #0]
    1154:	f7ff ffae 	bl	10b4 <Chip_Clock_GetUSARTNBaseClockRate>
    1158:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    115a:	46c0      	nop			; (mov r8, r8)
    115c:	40048094 	mulmi	r4, r4, r0
    1160:	40048000 	andmi	r8, r4, r0
    1164:	400480f0 	strdmi	r8, [r4], -r0
    1168:	0001dffb 	strdeq	sp, [r1], -fp
    116c:	0001dfff 	strdeq	sp, [r1], -pc	; <UNPREDICTABLE>
    1170:	400480f4 	strdmi	r8, [r4], -r4

00001174 <Chip_UART_Init>:
    1174:	b570      	push	{r4, r5, r6, lr}
    1176:	4c19      	ldr	r4, [pc, #100]	; (11dc <Chip_UART_Init+0x68>)
    1178:	210e      	movs	r1, #14
    117a:	42a0      	cmp	r0, r4
    117c:	d005      	beq.n	118a <Chip_UART_Init+0x16>
    117e:	4b18      	ldr	r3, [pc, #96]	; (11e0 <Chip_UART_Init+0x6c>)
    1180:	18c1      	adds	r1, r0, r3
    1182:	424a      	negs	r2, r1
    1184:	4151      	adcs	r1, r2
    1186:	2310      	movs	r3, #16
    1188:	1a59      	subs	r1, r3, r1
    118a:	2501      	movs	r5, #1
    118c:	408d      	lsls	r5, r1
    118e:	4e15      	ldr	r6, [pc, #84]	; (11e4 <Chip_UART_Init+0x70>)
    1190:	4915      	ldr	r1, [pc, #84]	; (11e8 <Chip_UART_Init+0x74>)
    1192:	6ff2      	ldr	r2, [r6, #124]	; 0x7c
    1194:	4b15      	ldr	r3, [pc, #84]	; (11ec <Chip_UART_Init+0x78>)
    1196:	400a      	ands	r2, r1
    1198:	432a      	orrs	r2, r5
    119a:	67f2      	str	r2, [r6, #124]	; 0x7c
    119c:	4a14      	ldr	r2, [pc, #80]	; (11f0 <Chip_UART_Init+0x7c>)
    119e:	42a0      	cmp	r0, r4
    11a0:	d107      	bne.n	11b2 <Chip_UART_Init+0x3e>
    11a2:	6858      	ldr	r0, [r3, #4]
    11a4:	4913      	ldr	r1, [pc, #76]	; (11f4 <Chip_UART_Init+0x80>)
    11a6:	4001      	ands	r1, r0
    11a8:	6059      	str	r1, [r3, #4]
    11aa:	6859      	ldr	r1, [r3, #4]
    11ac:	400a      	ands	r2, r1
    11ae:	2108      	movs	r1, #8
    11b0:	e011      	b.n	11d6 <Chip_UART_Init+0x62>
    11b2:	4911      	ldr	r1, [pc, #68]	; (11f8 <Chip_UART_Init+0x84>)
    11b4:	4288      	cmp	r0, r1
    11b6:	d107      	bne.n	11c8 <Chip_UART_Init+0x54>
    11b8:	6858      	ldr	r0, [r3, #4]
    11ba:	4910      	ldr	r1, [pc, #64]	; (11fc <Chip_UART_Init+0x88>)
    11bc:	4001      	ands	r1, r0
    11be:	6059      	str	r1, [r3, #4]
    11c0:	6859      	ldr	r1, [r3, #4]
    11c2:	400a      	ands	r2, r1
    11c4:	2110      	movs	r1, #16
    11c6:	e006      	b.n	11d6 <Chip_UART_Init+0x62>
    11c8:	6858      	ldr	r0, [r3, #4]
    11ca:	490d      	ldr	r1, [pc, #52]	; (1200 <Chip_UART_Init+0x8c>)
    11cc:	4001      	ands	r1, r0
    11ce:	6059      	str	r1, [r3, #4]
    11d0:	6859      	ldr	r1, [r3, #4]
    11d2:	400a      	ands	r2, r1
    11d4:	2120      	movs	r1, #32
    11d6:	430a      	orrs	r2, r1
    11d8:	605a      	str	r2, [r3, #4]
    11da:	bd70      	pop	{r4, r5, r6, pc}
    11dc:	40064000 	andmi	r4, r6, r0
    11e0:	bff98000 	svclt	0x00f98000
    11e4:	40048004 	andmi	r8, r4, r4
    11e8:	25efffff 	strbcs	pc, [pc, #4095]!	; 21ef <__exidx_end+0x4e7>	; <UNPREDICTABLE>
    11ec:	40048000 	andmi	r8, r4, r0
    11f0:	0001dfff 	strdeq	sp, [r1], -pc	; <UNPREDICTABLE>
    11f4:	0001dff7 	strdeq	sp, [r1], -r7
    11f8:	40068000 	andmi	r8, r6, r0
    11fc:	0001dfef 	andeq	sp, r1, pc, ror #31
    1200:	0001dfdf 	ldrdeq	sp, [r1], -pc	; <UNPREDICTABLE>

00001204 <Chip_UART_SetBaud>:
    1204:	b538      	push	{r3, r4, r5, lr}
    1206:	1c0c      	adds	r4, r1, #0
    1208:	1c05      	adds	r5, r0, #0
    120a:	f7ff ff53 	bl	10b4 <Chip_Clock_GetUSARTNBaseClockRate>
    120e:	0121      	lsls	r1, r4, #4
    1210:	f000 fabf 	bl	1792 <__aeabi_uidiv>
    1214:	3801      	subs	r0, #1
    1216:	6228      	str	r0, [r5, #32]
    1218:	bd38      	pop	{r3, r4, r5, pc}

0000121a <Chip_UART_RXIntHandlerRB>:
    121a:	b537      	push	{r0, r1, r2, r4, r5, lr}
    121c:	1c04      	adds	r4, r0, #0
    121e:	1c0d      	adds	r5, r1, #0
    1220:	68a3      	ldr	r3, [r4, #8]
    1222:	07db      	lsls	r3, r3, #31
    1224:	d507      	bpl.n	1236 <Chip_UART_RXIntHandlerRB+0x1c>
    1226:	466a      	mov	r2, sp
    1228:	6963      	ldr	r3, [r4, #20]
    122a:	1dd1      	adds	r1, r2, #7
    122c:	1c28      	adds	r0, r5, #0
    122e:	700b      	strb	r3, [r1, #0]
    1230:	f000 f89c 	bl	136c <RingBuffer_Insert>
    1234:	e7f4      	b.n	1220 <Chip_UART_RXIntHandlerRB+0x6>
    1236:	bd37      	pop	{r0, r1, r2, r4, r5, pc}

00001238 <Chip_UART_TXIntHandlerRB>:
    1238:	b573      	push	{r0, r1, r4, r5, r6, lr}
    123a:	1c05      	adds	r5, r0, #0
    123c:	1c0e      	adds	r6, r1, #0
    123e:	68ab      	ldr	r3, [r5, #8]
    1240:	075b      	lsls	r3, r3, #29
    1242:	d50a      	bpl.n	125a <Chip_UART_TXIntHandlerRB+0x22>
    1244:	466b      	mov	r3, sp
    1246:	1ddc      	adds	r4, r3, #7
    1248:	1c30      	adds	r0, r6, #0
    124a:	1c21      	adds	r1, r4, #0
    124c:	f000 f8ec 	bl	1428 <RingBuffer_Pop>
    1250:	2800      	cmp	r0, #0
    1252:	d002      	beq.n	125a <Chip_UART_TXIntHandlerRB+0x22>
    1254:	7823      	ldrb	r3, [r4, #0]
    1256:	61eb      	str	r3, [r5, #28]
    1258:	e7f1      	b.n	123e <Chip_UART_TXIntHandlerRB+0x6>
    125a:	bd73      	pop	{r0, r1, r4, r5, r6, pc}

0000125c <Chip_UART_SendRB>:
    125c:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    125e:	9301      	str	r3, [sp, #4]
    1260:	2304      	movs	r3, #4
    1262:	1c06      	adds	r6, r0, #0
    1264:	1c0f      	adds	r7, r1, #0
    1266:	1c15      	adds	r5, r2, #0
    1268:	6103      	str	r3, [r0, #16]
    126a:	1c08      	adds	r0, r1, #0
    126c:	1c11      	adds	r1, r2, #0
    126e:	9a01      	ldr	r2, [sp, #4]
    1270:	f000 f897 	bl	13a2 <RingBuffer_InsertMult>
    1274:	1c04      	adds	r4, r0, #0
    1276:	1c39      	adds	r1, r7, #0
    1278:	1c30      	adds	r0, r6, #0
    127a:	f7ff ffdd 	bl	1238 <Chip_UART_TXIntHandlerRB>
    127e:	9b01      	ldr	r3, [sp, #4]
    1280:	1929      	adds	r1, r5, r4
    1282:	1b1a      	subs	r2, r3, r4
    1284:	1c38      	adds	r0, r7, #0
    1286:	f000 f88c 	bl	13a2 <RingBuffer_InsertMult>
    128a:	2304      	movs	r3, #4
    128c:	1900      	adds	r0, r0, r4
    128e:	60f3      	str	r3, [r6, #12]
    1290:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001292 <Chip_UART_ReadRB>:
    1292:	b508      	push	{r3, lr}
    1294:	1c08      	adds	r0, r1, #0
    1296:	1c11      	adds	r1, r2, #0
    1298:	1c1a      	adds	r2, r3, #0
    129a:	f000 f8de 	bl	145a <RingBuffer_PopMult>
    129e:	bd08      	pop	{r3, pc}

000012a0 <Chip_UART_IRQRBHandler>:
    12a0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    12a2:	2604      	movs	r6, #4
    12a4:	6883      	ldr	r3, [r0, #8]
    12a6:	1c04      	adds	r4, r0, #0
    12a8:	1c0f      	adds	r7, r1, #0
    12aa:	1c15      	adds	r5, r2, #0
    12ac:	4233      	tst	r3, r6
    12ae:	d007      	beq.n	12c0 <Chip_UART_IRQRBHandler+0x20>
    12b0:	1c11      	adds	r1, r2, #0
    12b2:	f7ff ffc1 	bl	1238 <Chip_UART_TXIntHandlerRB>
    12b6:	68ea      	ldr	r2, [r5, #12]
    12b8:	692b      	ldr	r3, [r5, #16]
    12ba:	429a      	cmp	r2, r3
    12bc:	d100      	bne.n	12c0 <Chip_UART_IRQRBHandler+0x20>
    12be:	6126      	str	r6, [r4, #16]
    12c0:	1c39      	adds	r1, r7, #0
    12c2:	1c20      	adds	r0, r4, #0
    12c4:	f7ff ffa9 	bl	121a <Chip_UART_RXIntHandlerRB>
    12c8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

000012cc <Chip_SWM_MovablePinAssign>:
    12cc:	230f      	movs	r3, #15
    12ce:	b510      	push	{r4, lr}
    12d0:	24ff      	movs	r4, #255	; 0xff
    12d2:	4003      	ands	r3, r0
    12d4:	00db      	lsls	r3, r3, #3
    12d6:	409c      	lsls	r4, r3
    12d8:	4a05      	ldr	r2, [pc, #20]	; (12f0 <Chip_SWM_MovablePinAssign+0x24>)
    12da:	0900      	lsrs	r0, r0, #4
    12dc:	0080      	lsls	r0, r0, #2
    12de:	1880      	adds	r0, r0, r2
    12e0:	6802      	ldr	r2, [r0, #0]
    12e2:	4099      	lsls	r1, r3
    12e4:	43a2      	bics	r2, r4
    12e6:	1c13      	adds	r3, r2, #0
    12e8:	430b      	orrs	r3, r1
    12ea:	6003      	str	r3, [r0, #0]
    12ec:	bd10      	pop	{r4, pc}
    12ee:	46c0      	nop			; (mov r8, r8)
    12f0:	4000c000 	andmi	ip, r0, r0

000012f4 <Chip_IOCON_PinSetMode>:
    12f4:	0089      	lsls	r1, r1, #2
    12f6:	1841      	adds	r1, r0, r1
    12f8:	2018      	movs	r0, #24
    12fa:	680b      	ldr	r3, [r1, #0]
    12fc:	00d2      	lsls	r2, r2, #3
    12fe:	4383      	bics	r3, r0
    1300:	431a      	orrs	r2, r3
    1302:	600a      	str	r2, [r1, #0]
    1304:	4770      	bx	lr
	...

00001308 <Chip_IOCON_PinSetI2CMode>:
    1308:	0089      	lsls	r1, r1, #2
    130a:	1841      	adds	r1, r0, r1
    130c:	6808      	ldr	r0, [r1, #0]
    130e:	4b03      	ldr	r3, [pc, #12]	; (131c <Chip_IOCON_PinSetI2CMode+0x14>)
    1310:	0212      	lsls	r2, r2, #8
    1312:	4003      	ands	r3, r0
    1314:	431a      	orrs	r2, r3
    1316:	600a      	str	r2, [r1, #0]
    1318:	4770      	bx	lr
    131a:	46c0      	nop			; (mov r8, r8)
    131c:	fffffcff 			; <UNDEFINED> instruction: 0xfffffcff

00001320 <SystemCoreClockUpdate>:
    1320:	b508      	push	{r3, lr}
    1322:	f7ff febb 	bl	109c <Chip_Clock_GetSystemClockRate>
    1326:	4b01      	ldr	r3, [pc, #4]	; (132c <SystemCoreClockUpdate+0xc>)
    1328:	6018      	str	r0, [r3, #0]
    132a:	bd08      	pop	{r3, pc}
    132c:	10000250 	andne	r0, r0, r0, asr r2

00001330 <Chip_GPIO_Init>:
    1330:	4a03      	ldr	r2, [pc, #12]	; (1340 <Chip_GPIO_Init+0x10>)
    1332:	4b04      	ldr	r3, [pc, #16]	; (1344 <Chip_GPIO_Init+0x14>)
    1334:	6fd1      	ldr	r1, [r2, #124]	; 0x7c
    1336:	400b      	ands	r3, r1
    1338:	2140      	movs	r1, #64	; 0x40
    133a:	430b      	orrs	r3, r1
    133c:	67d3      	str	r3, [r2, #124]	; 0x7c
    133e:	4770      	bx	lr
    1340:	40048004 	andmi	r8, r4, r4
    1344:	25efffff 	strbcs	pc, [pc, #4095]!	; 234b <__exidx_end+0x643>	; <UNPREDICTABLE>

00001348 <Chip_SetupIrcClocking>:
    1348:	b508      	push	{r3, lr}
    134a:	4802      	ldr	r0, [pc, #8]	; (1354 <Chip_SetupIrcClocking+0xc>)
    134c:	4902      	ldr	r1, [pc, #8]	; (1358 <Chip_SetupIrcClocking+0x10>)
    134e:	f000 f8c7 	bl	14e0 <Chip_IRC_SetFreq>
    1352:	bd08      	pop	{r3, pc}
    1354:	03938700 	orrseq	r8, r3, #0, 14
    1358:	01c9c380 	biceq	ip, r9, r0, lsl #7

0000135c <RingBuffer_Init>:
    135c:	6043      	str	r3, [r0, #4]
    135e:	2300      	movs	r3, #0
    1360:	6001      	str	r1, [r0, #0]
    1362:	6082      	str	r2, [r0, #8]
    1364:	6103      	str	r3, [r0, #16]
    1366:	60c3      	str	r3, [r0, #12]
    1368:	2001      	movs	r0, #1
    136a:	4770      	bx	lr

0000136c <RingBuffer_Insert>:
    136c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    136e:	1c04      	adds	r4, r0, #0
    1370:	68c3      	ldr	r3, [r0, #12]
    1372:	6807      	ldr	r7, [r0, #0]
    1374:	6862      	ldr	r2, [r4, #4]
    1376:	6900      	ldr	r0, [r0, #16]
    1378:	1a1b      	subs	r3, r3, r0
    137a:	2000      	movs	r0, #0
    137c:	4293      	cmp	r3, r2
    137e:	da0f      	bge.n	13a0 <RingBuffer_Insert+0x34>
    1380:	1c0d      	adds	r5, r1, #0
    1382:	68e0      	ldr	r0, [r4, #12]
    1384:	1c11      	adds	r1, r2, #0
    1386:	f000 fa04 	bl	1792 <__aeabi_uidiv>
    138a:	68a6      	ldr	r6, [r4, #8]
    138c:	4371      	muls	r1, r6
    138e:	1c32      	adds	r2, r6, #0
    1390:	1878      	adds	r0, r7, r1
    1392:	1c29      	adds	r1, r5, #0
    1394:	f000 f9ee 	bl	1774 <memcpy>
    1398:	2001      	movs	r0, #1
    139a:	68e3      	ldr	r3, [r4, #12]
    139c:	3301      	adds	r3, #1
    139e:	60e3      	str	r3, [r4, #12]
    13a0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

000013a2 <RingBuffer_InsertMult>:
    13a2:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    13a4:	6803      	ldr	r3, [r0, #0]
    13a6:	6846      	ldr	r6, [r0, #4]
    13a8:	9301      	str	r3, [sp, #4]
    13aa:	68c3      	ldr	r3, [r0, #12]
    13ac:	6904      	ldr	r4, [r0, #16]
    13ae:	1b1c      	subs	r4, r3, r4
    13b0:	2300      	movs	r3, #0
    13b2:	42b4      	cmp	r4, r6
    13b4:	da36      	bge.n	1424 <RingBuffer_InsertMult+0x82>
    13b6:	68c3      	ldr	r3, [r0, #12]
    13b8:	6907      	ldr	r7, [r0, #16]
    13ba:	9100      	str	r1, [sp, #0]
    13bc:	1c04      	adds	r4, r0, #0
    13be:	1c31      	adds	r1, r6, #0
    13c0:	68c0      	ldr	r0, [r0, #12]
    13c2:	1bdf      	subs	r7, r3, r7
    13c4:	1c15      	adds	r5, r2, #0
    13c6:	f000 f9e4 	bl	1792 <__aeabi_uidiv>
    13ca:	1bf7      	subs	r7, r6, r7
    13cc:	187b      	adds	r3, r7, r1
    13ce:	1c38      	adds	r0, r7, #0
    13d0:	42b3      	cmp	r3, r6
    13d2:	d300      	bcc.n	13d6 <RingBuffer_InsertMult+0x34>
    13d4:	1a70      	subs	r0, r6, r1
    13d6:	1a3f      	subs	r7, r7, r0
    13d8:	1e06      	subs	r6, r0, #0
    13da:	42ae      	cmp	r6, r5
    13dc:	dd00      	ble.n	13e0 <RingBuffer_InsertMult+0x3e>
    13de:	1c2e      	adds	r6, r5, #0
    13e0:	1bad      	subs	r5, r5, r6
    13e2:	42bd      	cmp	r5, r7
    13e4:	dd00      	ble.n	13e8 <RingBuffer_InsertMult+0x46>
    13e6:	1c3d      	adds	r5, r7, #0
    13e8:	68a2      	ldr	r2, [r4, #8]
    13ea:	9b01      	ldr	r3, [sp, #4]
    13ec:	4351      	muls	r1, r2
    13ee:	4372      	muls	r2, r6
    13f0:	1858      	adds	r0, r3, r1
    13f2:	9900      	ldr	r1, [sp, #0]
    13f4:	f000 f9be 	bl	1774 <memcpy>
    13f8:	68e3      	ldr	r3, [r4, #12]
    13fa:	6861      	ldr	r1, [r4, #4]
    13fc:	18f0      	adds	r0, r6, r3
    13fe:	60e0      	str	r0, [r4, #12]
    1400:	f000 f9c7 	bl	1792 <__aeabi_uidiv>
    1404:	68a7      	ldr	r7, [r4, #8]
    1406:	6823      	ldr	r3, [r4, #0]
    1408:	4379      	muls	r1, r7
    140a:	1858      	adds	r0, r3, r1
    140c:	1c39      	adds	r1, r7, #0
    140e:	1c3a      	adds	r2, r7, #0
    1410:	4371      	muls	r1, r6
    1412:	9b00      	ldr	r3, [sp, #0]
    1414:	436a      	muls	r2, r5
    1416:	1859      	adds	r1, r3, r1
    1418:	f000 f9ac 	bl	1774 <memcpy>
    141c:	68e3      	ldr	r3, [r4, #12]
    141e:	195b      	adds	r3, r3, r5
    1420:	60e3      	str	r3, [r4, #12]
    1422:	1973      	adds	r3, r6, r5
    1424:	1c18      	adds	r0, r3, #0
    1426:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001428 <RingBuffer_Pop>:
    1428:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    142a:	68c2      	ldr	r2, [r0, #12]
    142c:	6903      	ldr	r3, [r0, #16]
    142e:	1c04      	adds	r4, r0, #0
    1430:	6807      	ldr	r7, [r0, #0]
    1432:	2000      	movs	r0, #0
    1434:	429a      	cmp	r2, r3
    1436:	d00f      	beq.n	1458 <RingBuffer_Pop+0x30>
    1438:	1c0d      	adds	r5, r1, #0
    143a:	6920      	ldr	r0, [r4, #16]
    143c:	6861      	ldr	r1, [r4, #4]
    143e:	f000 f9a8 	bl	1792 <__aeabi_uidiv>
    1442:	68a6      	ldr	r6, [r4, #8]
    1444:	1c28      	adds	r0, r5, #0
    1446:	4371      	muls	r1, r6
    1448:	1c32      	adds	r2, r6, #0
    144a:	1879      	adds	r1, r7, r1
    144c:	f000 f992 	bl	1774 <memcpy>
    1450:	2001      	movs	r0, #1
    1452:	6923      	ldr	r3, [r4, #16]
    1454:	3301      	adds	r3, #1
    1456:	6123      	str	r3, [r4, #16]
    1458:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0000145a <RingBuffer_PopMult>:
    145a:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    145c:	6803      	ldr	r3, [r0, #0]
    145e:	68c4      	ldr	r4, [r0, #12]
    1460:	9301      	str	r3, [sp, #4]
    1462:	6903      	ldr	r3, [r0, #16]
    1464:	2600      	movs	r6, #0
    1466:	429c      	cmp	r4, r3
    1468:	d038      	beq.n	14dc <RingBuffer_PopMult+0x82>
    146a:	6846      	ldr	r6, [r0, #4]
    146c:	68c7      	ldr	r7, [r0, #12]
    146e:	6903      	ldr	r3, [r0, #16]
    1470:	9100      	str	r1, [sp, #0]
    1472:	1c04      	adds	r4, r0, #0
    1474:	1c31      	adds	r1, r6, #0
    1476:	6900      	ldr	r0, [r0, #16]
    1478:	1aff      	subs	r7, r7, r3
    147a:	1c15      	adds	r5, r2, #0
    147c:	f000 f989 	bl	1792 <__aeabi_uidiv>
    1480:	187b      	adds	r3, r7, r1
    1482:	1c38      	adds	r0, r7, #0
    1484:	42b3      	cmp	r3, r6
    1486:	d300      	bcc.n	148a <RingBuffer_PopMult+0x30>
    1488:	1a70      	subs	r0, r6, r1
    148a:	1a3f      	subs	r7, r7, r0
    148c:	1e06      	subs	r6, r0, #0
    148e:	42ae      	cmp	r6, r5
    1490:	dd00      	ble.n	1494 <RingBuffer_PopMult+0x3a>
    1492:	1c2e      	adds	r6, r5, #0
    1494:	1bad      	subs	r5, r5, r6
    1496:	42bd      	cmp	r5, r7
    1498:	dd00      	ble.n	149c <RingBuffer_PopMult+0x42>
    149a:	1c3d      	adds	r5, r7, #0
    149c:	68a2      	ldr	r2, [r4, #8]
    149e:	9b01      	ldr	r3, [sp, #4]
    14a0:	4351      	muls	r1, r2
    14a2:	9800      	ldr	r0, [sp, #0]
    14a4:	4372      	muls	r2, r6
    14a6:	1859      	adds	r1, r3, r1
    14a8:	f000 f964 	bl	1774 <memcpy>
    14ac:	68a7      	ldr	r7, [r4, #8]
    14ae:	6923      	ldr	r3, [r4, #16]
    14b0:	1c39      	adds	r1, r7, #0
    14b2:	4371      	muls	r1, r6
    14b4:	18f0      	adds	r0, r6, r3
    14b6:	9b00      	ldr	r3, [sp, #0]
    14b8:	6120      	str	r0, [r4, #16]
    14ba:	185b      	adds	r3, r3, r1
    14bc:	6861      	ldr	r1, [r4, #4]
    14be:	9300      	str	r3, [sp, #0]
    14c0:	f000 f967 	bl	1792 <__aeabi_uidiv>
    14c4:	1c3a      	adds	r2, r7, #0
    14c6:	4379      	muls	r1, r7
    14c8:	6823      	ldr	r3, [r4, #0]
    14ca:	436a      	muls	r2, r5
    14cc:	1859      	adds	r1, r3, r1
    14ce:	9800      	ldr	r0, [sp, #0]
    14d0:	f000 f950 	bl	1774 <memcpy>
    14d4:	6923      	ldr	r3, [r4, #16]
    14d6:	1976      	adds	r6, r6, r5
    14d8:	195b      	adds	r3, r3, r5
    14da:	6123      	str	r3, [r4, #16]
    14dc:	1c30      	adds	r0, r6, #0
    14de:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

000014e0 <Chip_IRC_SetFreq>:
    14e0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    14e2:	1c05      	adds	r5, r0, #0
    14e4:	1c08      	adds	r0, r1, #0
    14e6:	4927      	ldr	r1, [pc, #156]	; (1584 <Chip_IRC_SetFreq+0xa4>)
    14e8:	f000 f953 	bl	1792 <__aeabi_uidiv>
    14ec:	2400      	movs	r4, #0
    14ee:	1e06      	subs	r6, r0, #0
    14f0:	2e1e      	cmp	r6, #30
    14f2:	d845      	bhi.n	1580 <Chip_IRC_SetFreq+0xa0>
    14f4:	1c28      	adds	r0, r5, #0
    14f6:	4923      	ldr	r1, [pc, #140]	; (1584 <Chip_IRC_SetFreq+0xa4>)
    14f8:	f000 f94b 	bl	1792 <__aeabi_uidiv>
    14fc:	2860      	cmp	r0, #96	; 0x60
    14fe:	d83f      	bhi.n	1580 <Chip_IRC_SetFreq+0xa0>
    1500:	1c25      	adds	r5, r4, #0
    1502:	240c      	movs	r4, #12
    1504:	436c      	muls	r4, r5
    1506:	4f20      	ldr	r7, [pc, #128]	; (1588 <Chip_IRC_SetFreq+0xa8>)
    1508:	b283      	uxth	r3, r0
    150a:	5be2      	ldrh	r2, [r4, r7]
    150c:	429a      	cmp	r2, r3
    150e:	d124      	bne.n	155a <Chip_IRC_SetFreq+0x7a>
    1510:	193c      	adds	r4, r7, r4
    1512:	8862      	ldrh	r2, [r4, #2]
    1514:	b2b3      	uxth	r3, r6
    1516:	429a      	cmp	r2, r3
    1518:	d11f      	bne.n	155a <Chip_IRC_SetFreq+0x7a>
    151a:	4b1c      	ldr	r3, [pc, #112]	; (158c <Chip_IRC_SetFreq+0xac>)
    151c:	2002      	movs	r0, #2
    151e:	801d      	strh	r5, [r3, #0]
    1520:	f000 f916 	bl	1750 <Chip_SYSCTL_PowerUp>
    1524:	2000      	movs	r0, #0
    1526:	f7ff fd51 	bl	fcc <Chip_Clock_SetSystemPLLSource>
    152a:	2000      	movs	r0, #0
    152c:	f7ff fd58 	bl	fe0 <Chip_Clock_SetMainClockSource>
    1530:	4b17      	ldr	r3, [pc, #92]	; (1590 <Chip_IRC_SetFreq+0xb0>)
    1532:	2080      	movs	r0, #128	; 0x80
    1534:	691a      	ldr	r2, [r3, #16]
    1536:	2201      	movs	r2, #1
    1538:	611a      	str	r2, [r3, #16]
    153a:	f000 f8f9 	bl	1730 <Chip_SYSCTL_PowerDown>
    153e:	2303      	movs	r3, #3
    1540:	221f      	movs	r2, #31
    1542:	8921      	ldrh	r1, [r4, #8]
    1544:	2080      	movs	r0, #128	; 0x80
    1546:	400b      	ands	r3, r1
    1548:	0159      	lsls	r1, r3, #5
    154a:	88e3      	ldrh	r3, [r4, #6]
    154c:	4c11      	ldr	r4, [pc, #68]	; (1594 <Chip_IRC_SetFreq+0xb4>)
    154e:	4013      	ands	r3, r2
    1550:	430b      	orrs	r3, r1
    1552:	60a3      	str	r3, [r4, #8]
    1554:	f000 f8fc 	bl	1750 <Chip_SYSCTL_PowerUp>
    1558:	e004      	b.n	1564 <Chip_IRC_SetFreq+0x84>
    155a:	3501      	adds	r5, #1
    155c:	2d47      	cmp	r5, #71	; 0x47
    155e:	d1d0      	bne.n	1502 <Chip_IRC_SetFreq+0x22>
    1560:	2400      	movs	r4, #0
    1562:	e00d      	b.n	1580 <Chip_IRC_SetFreq+0xa0>
    1564:	2601      	movs	r6, #1
    1566:	68e3      	ldr	r3, [r4, #12]
    1568:	4233      	tst	r3, r6
    156a:	d0fb      	beq.n	1564 <Chip_IRC_SetFreq+0x84>
    156c:	240c      	movs	r4, #12
    156e:	436c      	muls	r4, r5
    1570:	193f      	adds	r7, r7, r4
    1572:	897a      	ldrh	r2, [r7, #10]
    1574:	4b07      	ldr	r3, [pc, #28]	; (1594 <Chip_IRC_SetFreq+0xb4>)
    1576:	2003      	movs	r0, #3
    1578:	679a      	str	r2, [r3, #120]	; 0x78
    157a:	f7ff fd31 	bl	fe0 <Chip_Clock_SetMainClockSource>
    157e:	1c34      	adds	r4, r6, #0
    1580:	1c20      	adds	r0, r4, #0
    1582:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    1584:	000f4240 	andeq	r4, pc, r0, asr #4
    1588:	000019b4 			; <UNDEFINED> instruction: 0x000019b4
    158c:	100001fc 	strdne	r0, [r0], -ip
    1590:	40040000 	andmi	r0, r4, r0
    1594:	40048000 	andmi	r8, r4, r0

00001598 <Chip_ADC_Init>:
    1598:	b538      	push	{r3, r4, r5, lr}
    159a:	1c04      	adds	r4, r0, #0
    159c:	2010      	movs	r0, #16
    159e:	1c0d      	adds	r5, r1, #0
    15a0:	f000 f8d6 	bl	1750 <Chip_SYSCTL_PowerUp>
    15a4:	4a05      	ldr	r2, [pc, #20]	; (15bc <Chip_ADC_Init+0x24>)
    15a6:	4b06      	ldr	r3, [pc, #24]	; (15c0 <Chip_ADC_Init+0x28>)
    15a8:	6fd1      	ldr	r1, [r2, #124]	; 0x7c
    15aa:	400b      	ands	r3, r1
    15ac:	2180      	movs	r1, #128	; 0x80
    15ae:	0449      	lsls	r1, r1, #17
    15b0:	430b      	orrs	r3, r1
    15b2:	67d3      	str	r3, [r2, #124]	; 0x7c
    15b4:	2300      	movs	r3, #0
    15b6:	6663      	str	r3, [r4, #100]	; 0x64
    15b8:	6025      	str	r5, [r4, #0]
    15ba:	bd38      	pop	{r3, r4, r5, pc}
    15bc:	40048004 	andmi	r8, r4, r4
    15c0:	25efffff 	strbcs	pc, [pc, #4095]!	; 25c7 <__exidx_end+0x8bf>	; <UNPREDICTABLE>

000015c4 <Chip_ADC_StartCalibration>:
    15c4:	2280      	movs	r2, #128	; 0x80
    15c6:	b538      	push	{r3, r4, r5, lr}
    15c8:	6803      	ldr	r3, [r0, #0]
    15ca:	05d2      	lsls	r2, r2, #23
    15cc:	4313      	orrs	r3, r2
    15ce:	6003      	str	r3, [r0, #0]
    15d0:	6802      	ldr	r2, [r0, #0]
    15d2:	4b0a      	ldr	r3, [pc, #40]	; (15fc <Chip_ADC_StartCalibration+0x38>)
    15d4:	1c04      	adds	r4, r0, #0
    15d6:	4013      	ands	r3, r2
    15d8:	6003      	str	r3, [r0, #0]
    15da:	f7ff fd5f 	bl	109c <Chip_Clock_GetSystemClockRate>
    15de:	4908      	ldr	r1, [pc, #32]	; (1600 <Chip_ADC_StartCalibration+0x3c>)
    15e0:	f000 f8d7 	bl	1792 <__aeabi_uidiv>
    15e4:	23ff      	movs	r3, #255	; 0xff
    15e6:	6825      	ldr	r5, [r4, #0]
    15e8:	3801      	subs	r0, #1
    15ea:	b2c0      	uxtb	r0, r0
    15ec:	439d      	bics	r5, r3
    15ee:	4305      	orrs	r5, r0
    15f0:	6025      	str	r5, [r4, #0]
    15f2:	6822      	ldr	r2, [r4, #0]
    15f4:	4b03      	ldr	r3, [pc, #12]	; (1604 <Chip_ADC_StartCalibration+0x40>)
    15f6:	4013      	ands	r3, r2
    15f8:	6023      	str	r3, [r4, #0]
    15fa:	bd38      	pop	{r3, r4, r5, pc}
    15fc:	fffffeff 			; <UNDEFINED> instruction: 0xfffffeff
    1600:	0007a120 	andeq	sl, r7, r0, lsr #2
    1604:	fffffbff 			; <UNDEFINED> instruction: 0xfffffbff

00001608 <Chip_I2CM_SetBusSpeed>:
    1608:	b538      	push	{r3, r4, r5, lr}
    160a:	1c04      	adds	r4, r0, #0
    160c:	1c0d      	adds	r5, r1, #0
    160e:	f7ff fd45 	bl	109c <Chip_Clock_GetSystemClockRate>
    1612:	6961      	ldr	r1, [r4, #20]
    1614:	b289      	uxth	r1, r1
    1616:	3101      	adds	r1, #1
    1618:	4369      	muls	r1, r5
    161a:	f000 f8ba 	bl	1792 <__aeabi_uidiv>
    161e:	0842      	lsrs	r2, r0, #1
    1620:	b292      	uxth	r2, r2
    1622:	1a80      	subs	r0, r0, r2
    1624:	b280      	uxth	r0, r0
    1626:	2302      	movs	r3, #2
    1628:	2a01      	cmp	r2, #1
    162a:	d904      	bls.n	1636 <Chip_I2CM_SetBusSpeed+0x2e>
    162c:	1c13      	adds	r3, r2, #0
    162e:	2a09      	cmp	r2, #9
    1630:	d900      	bls.n	1634 <Chip_I2CM_SetBusSpeed+0x2c>
    1632:	2309      	movs	r3, #9
    1634:	b29b      	uxth	r3, r3
    1636:	2202      	movs	r2, #2
    1638:	2801      	cmp	r0, #1
    163a:	d904      	bls.n	1646 <Chip_I2CM_SetBusSpeed+0x3e>
    163c:	1c02      	adds	r2, r0, #0
    163e:	2809      	cmp	r0, #9
    1640:	d900      	bls.n	1644 <Chip_I2CM_SetBusSpeed+0x3c>
    1642:	2209      	movs	r2, #9
    1644:	b292      	uxth	r2, r2
    1646:	3b02      	subs	r3, #2
    1648:	3a02      	subs	r2, #2
    164a:	011b      	lsls	r3, r3, #4
    164c:	4313      	orrs	r3, r2
    164e:	6263      	str	r3, [r4, #36]	; 0x24
    1650:	bd38      	pop	{r3, r4, r5, pc}

00001652 <Chip_I2CM_XferHandler>:
    1652:	2210      	movs	r2, #16
    1654:	1c03      	adds	r3, r0, #0
    1656:	6840      	ldr	r0, [r0, #4]
    1658:	b510      	push	{r4, lr}
    165a:	4210      	tst	r0, r2
    165c:	d001      	beq.n	1662 <Chip_I2CM_XferHandler+0x10>
    165e:	2005      	movs	r0, #5
    1660:	e003      	b.n	166a <Chip_I2CM_XferHandler+0x18>
    1662:	2240      	movs	r2, #64	; 0x40
    1664:	4210      	tst	r0, r2
    1666:	d003      	beq.n	1670 <Chip_I2CM_XferHandler+0x1e>
    1668:	2003      	movs	r0, #3
    166a:	8188      	strh	r0, [r1, #12]
    166c:	605a      	str	r2, [r3, #4]
    166e:	e03b      	b.n	16e8 <Chip_I2CM_XferHandler+0x96>
    1670:	2201      	movs	r2, #1
    1672:	4210      	tst	r0, r2
    1674:	d037      	beq.n	16e6 <Chip_I2CM_XferHandler+0x94>
    1676:	6858      	ldr	r0, [r3, #4]
    1678:	0700      	lsls	r0, r0, #28
    167a:	0f40      	lsrs	r0, r0, #29
    167c:	2804      	cmp	r0, #4
    167e:	d832      	bhi.n	16e6 <Chip_I2CM_XferHandler+0x94>
    1680:	f000 f963 	bl	194a <__gnu_thumb1_case_uqi>
    1684:	2a120603 	bcs	482e98 <__top_MFlash32+0x47ae98>
    1688:	2201002e 	andcs	r0, r1, #46	; 0x2e
    168c:	60da      	str	r2, [r3, #12]
    168e:	e02b      	b.n	16e8 <Chip_I2CM_XferHandler+0x96>
    1690:	684a      	ldr	r2, [r1, #4]
    1692:	1c50      	adds	r0, r2, #1
    1694:	6048      	str	r0, [r1, #4]
    1696:	6a98      	ldr	r0, [r3, #40]	; 0x28
    1698:	7010      	strb	r0, [r2, #0]
    169a:	894a      	ldrh	r2, [r1, #10]
    169c:	3a01      	subs	r2, #1
    169e:	b292      	uxth	r2, r2
    16a0:	814a      	strh	r2, [r1, #10]
    16a2:	2a00      	cmp	r2, #0
    16a4:	d019      	beq.n	16da <Chip_I2CM_XferHandler+0x88>
    16a6:	e009      	b.n	16bc <Chip_I2CM_XferHandler+0x6a>
    16a8:	890a      	ldrh	r2, [r1, #8]
    16aa:	2a00      	cmp	r2, #0
    16ac:	d008      	beq.n	16c0 <Chip_I2CM_XferHandler+0x6e>
    16ae:	6808      	ldr	r0, [r1, #0]
    16b0:	3a01      	subs	r2, #1
    16b2:	1c44      	adds	r4, r0, #1
    16b4:	600c      	str	r4, [r1, #0]
    16b6:	7800      	ldrb	r0, [r0, #0]
    16b8:	6298      	str	r0, [r3, #40]	; 0x28
    16ba:	810a      	strh	r2, [r1, #8]
    16bc:	2201      	movs	r2, #1
    16be:	e009      	b.n	16d4 <Chip_I2CM_XferHandler+0x82>
    16c0:	894a      	ldrh	r2, [r1, #10]
    16c2:	2a00      	cmp	r2, #0
    16c4:	d009      	beq.n	16da <Chip_I2CM_XferHandler+0x88>
    16c6:	2001      	movs	r0, #1
    16c8:	7b8a      	ldrb	r2, [r1, #14]
    16ca:	0052      	lsls	r2, r2, #1
    16cc:	4302      	orrs	r2, r0
    16ce:	b2d2      	uxtb	r2, r2
    16d0:	629a      	str	r2, [r3, #40]	; 0x28
    16d2:	2202      	movs	r2, #2
    16d4:	621a      	str	r2, [r3, #32]
    16d6:	e007      	b.n	16e8 <Chip_I2CM_XferHandler+0x96>
    16d8:	2202      	movs	r2, #2
    16da:	818a      	strh	r2, [r1, #12]
    16dc:	2204      	movs	r2, #4
    16de:	e7f9      	b.n	16d4 <Chip_I2CM_XferHandler+0x82>
    16e0:	2204      	movs	r2, #4
    16e2:	818a      	strh	r2, [r1, #12]
    16e4:	e7f6      	b.n	16d4 <Chip_I2CM_XferHandler+0x82>
    16e6:	818a      	strh	r2, [r1, #12]
    16e8:	8988      	ldrh	r0, [r1, #12]
    16ea:	38ff      	subs	r0, #255	; 0xff
    16ec:	1e43      	subs	r3, r0, #1
    16ee:	4198      	sbcs	r0, r3
    16f0:	bd10      	pop	{r4, pc}

000016f2 <Chip_I2CM_Xfer>:
    16f2:	23ff      	movs	r3, #255	; 0xff
    16f4:	818b      	strh	r3, [r1, #12]
    16f6:	3baf      	subs	r3, #175	; 0xaf
    16f8:	6043      	str	r3, [r0, #4]
    16fa:	7b8b      	ldrb	r3, [r1, #14]
    16fc:	005a      	lsls	r2, r3, #1
    16fe:	890b      	ldrh	r3, [r1, #8]
    1700:	4259      	negs	r1, r3
    1702:	414b      	adcs	r3, r1
    1704:	4313      	orrs	r3, r2
    1706:	b2db      	uxtb	r3, r3
    1708:	6283      	str	r3, [r0, #40]	; 0x28
    170a:	2302      	movs	r3, #2
    170c:	6203      	str	r3, [r0, #32]
    170e:	4770      	bx	lr

00001710 <Chip_I2CM_XferBlocking>:
    1710:	b538      	push	{r3, r4, r5, lr}
    1712:	1c04      	adds	r4, r0, #0
    1714:	1c0d      	adds	r5, r1, #0
    1716:	f7ff ffec 	bl	16f2 <Chip_I2CM_Xfer>
    171a:	6863      	ldr	r3, [r4, #4]
    171c:	07db      	lsls	r3, r3, #31
    171e:	d5fc      	bpl.n	171a <Chip_I2CM_XferBlocking+0xa>
    1720:	1c20      	adds	r0, r4, #0
    1722:	1c29      	adds	r1, r5, #0
    1724:	f7ff ff95 	bl	1652 <Chip_I2CM_XferHandler>
    1728:	2800      	cmp	r0, #0
    172a:	d0f6      	beq.n	171a <Chip_I2CM_XferBlocking+0xa>
    172c:	bd38      	pop	{r3, r4, r5, pc}
	...

00001730 <Chip_SYSCTL_PowerDown>:
    1730:	228e      	movs	r2, #142	; 0x8e
    1732:	4905      	ldr	r1, [pc, #20]	; (1748 <Chip_SYSCTL_PowerDown+0x18>)
    1734:	0092      	lsls	r2, r2, #2
    1736:	588b      	ldr	r3, [r1, r2]
    1738:	4318      	orrs	r0, r3
    173a:	4b04      	ldr	r3, [pc, #16]	; (174c <Chip_SYSCTL_PowerDown+0x1c>)
    173c:	4018      	ands	r0, r3
    173e:	23da      	movs	r3, #218	; 0xda
    1740:	01db      	lsls	r3, r3, #7
    1742:	4318      	orrs	r0, r3
    1744:	5088      	str	r0, [r1, r2]
    1746:	4770      	bx	lr
    1748:	40048000 	andmi	r8, r4, r0
    174c:	000080ff 	strdeq	r8, [r0], -pc	; <UNPREDICTABLE>

00001750 <Chip_SYSCTL_PowerUp>:
    1750:	218e      	movs	r1, #142	; 0x8e
    1752:	b510      	push	{r4, lr}
    1754:	4c05      	ldr	r4, [pc, #20]	; (176c <Chip_SYSCTL_PowerUp+0x1c>)
    1756:	0089      	lsls	r1, r1, #2
    1758:	5863      	ldr	r3, [r4, r1]
    175a:	4a05      	ldr	r2, [pc, #20]	; (1770 <Chip_SYSCTL_PowerUp+0x20>)
    175c:	4013      	ands	r3, r2
    175e:	4002      	ands	r2, r0
    1760:	4393      	bics	r3, r2
    1762:	22da      	movs	r2, #218	; 0xda
    1764:	01d2      	lsls	r2, r2, #7
    1766:	4313      	orrs	r3, r2
    1768:	5063      	str	r3, [r4, r1]
    176a:	bd10      	pop	{r4, pc}
    176c:	40048000 	andmi	r8, r4, r0
    1770:	000080ff 	strdeq	r8, [r0], -pc	; <UNPREDICTABLE>

00001774 <memcpy>:
    1774:	b508      	push	{r3, lr}
    1776:	f000 f8bd 	bl	18f4 <__aeabi_memcpy>
    177a:	bd08      	pop	{r3, pc}

0000177c <memset>:
    177c:	b508      	push	{r3, lr}
    177e:	f000 f8cf 	bl	1920 <__aeabi_lowlevel_memset>
    1782:	bd08      	pop	{r3, pc}

00001784 <__weak_main>:
    1784:	b508      	push	{r3, lr}
    1786:	f7ff f887 	bl	898 <main>
    178a:	bd08      	pop	{r3, pc}

0000178c <__aeabi_idiv>:
    178c:	0003      	movs	r3, r0
    178e:	430b      	orrs	r3, r1
    1790:	d421      	bmi.n	17d6 <idiv_negative>

00001792 <__aeabi_uidiv>:
    1792:	2900      	cmp	r1, #0
    1794:	d031      	beq.n	17fa <idiv_divzero>
    1796:	2201      	movs	r2, #1
    1798:	07d2      	lsls	r2, r2, #31
    179a:	0903      	lsrs	r3, r0, #4
    179c:	e001      	b.n	17a2 <div_search4a>

0000179e <div_search4>:
    179e:	0109      	lsls	r1, r1, #4
    17a0:	0912      	lsrs	r2, r2, #4

000017a2 <div_search4a>:
    17a2:	4299      	cmp	r1, r3
    17a4:	d9fb      	bls.n	179e <div_search4>
    17a6:	0843      	lsrs	r3, r0, #1
    17a8:	e001      	b.n	17ae <div_search1a>

000017aa <div_search1>:
    17aa:	0049      	lsls	r1, r1, #1
    17ac:	0852      	lsrs	r2, r2, #1

000017ae <div_search1a>:
    17ae:	4299      	cmp	r1, r3
    17b0:	d9fb      	bls.n	17aa <div_search1>
    17b2:	e000      	b.n	17b6 <div_loop1a>

000017b4 <div_loop1>:
    17b4:	0849      	lsrs	r1, r1, #1

000017b6 <div_loop1a>:
    17b6:	1a40      	subs	r0, r0, r1
    17b8:	d307      	bcc.n	17ca <div1>

000017ba <div2>:
    17ba:	4152      	adcs	r2, r2
    17bc:	d3fa      	bcc.n	17b4 <div_loop1>
    17be:	4601      	mov	r1, r0
    17c0:	4610      	mov	r0, r2
    17c2:	4770      	bx	lr

000017c4 <div_loop2>:
    17c4:	0849      	lsrs	r1, r1, #1
    17c6:	1840      	adds	r0, r0, r1
    17c8:	d2f7      	bcs.n	17ba <div2>

000017ca <div1>:
    17ca:	1892      	adds	r2, r2, r2
    17cc:	d3fa      	bcc.n	17c4 <div_loop2>
    17ce:	1840      	adds	r0, r0, r1
    17d0:	4601      	mov	r1, r0
    17d2:	4610      	mov	r0, r2
    17d4:	4770      	bx	lr

000017d6 <idiv_negative>:
    17d6:	0fcb      	lsrs	r3, r1, #31
    17d8:	d000      	beq.n	17dc <idiv_neg1>
    17da:	4249      	negs	r1, r1

000017dc <idiv_neg1>:
    17dc:	1002      	asrs	r2, r0, #32
    17de:	d500      	bpl.n	17e2 <idiv_neg2>
    17e0:	4240      	negs	r0, r0

000017e2 <idiv_neg2>:
    17e2:	4053      	eors	r3, r2
    17e4:	b508      	push	{r3, lr}
    17e6:	f7ff ffd4 	bl	1792 <__aeabi_uidiv>
    17ea:	bc0c      	pop	{r2, r3}

000017ec <idiv_sign>:
    17ec:	1052      	asrs	r2, r2, #1
    17ee:	d300      	bcc.n	17f2 <idiv_sign1>
    17f0:	4240      	negs	r0, r0

000017f2 <idiv_sign1>:
    17f2:	2a00      	cmp	r2, #0
    17f4:	d500      	bpl.n	17f8 <idiv_ret>
    17f6:	4249      	negs	r1, r1

000017f8 <idiv_ret>:
    17f8:	4718      	bx	r3

000017fa <idiv_divzero>:
    17fa:	46f4      	mov	ip, lr
    17fc:	2000      	movs	r0, #0
    17fe:	f000 f82e 	bl	185e <__aeabi_idiv0>
    1802:	4760      	bx	ip

00001804 <__aeabi_uldivmod>:
    1804:	b5f0      	push	{r4, r5, r6, r7, lr}
    1806:	0017      	movs	r7, r2
    1808:	431f      	orrs	r7, r3
    180a:	d023      	beq.n	1854 <ldiv_divzero>
    180c:	2601      	movs	r6, #1
    180e:	0844      	lsrs	r4, r0, #1
    1810:	07cf      	lsls	r7, r1, #31
    1812:	433c      	orrs	r4, r7
    1814:	084d      	lsrs	r5, r1, #1

00001816 <loop1>:
    1816:	1aa7      	subs	r7, r4, r2
    1818:	462f      	mov	r7, r5
    181a:	419f      	sbcs	r7, r3
    181c:	d303      	bcc.n	1826 <loop1_end>
    181e:	1892      	adds	r2, r2, r2
    1820:	415b      	adcs	r3, r3
    1822:	3601      	adds	r6, #1
    1824:	e7f7      	b.n	1816 <loop1>

00001826 <loop1_end>:
    1826:	2400      	movs	r4, #0
    1828:	2500      	movs	r5, #0
    182a:	e005      	b.n	1838 <loop_start>

0000182c <loop>:
    182c:	0852      	lsrs	r2, r2, #1
    182e:	07df      	lsls	r7, r3, #31
    1830:	433a      	orrs	r2, r7
    1832:	085b      	lsrs	r3, r3, #1
    1834:	1924      	adds	r4, r4, r4
    1836:	416d      	adcs	r5, r5

00001838 <loop_start>:
    1838:	1a87      	subs	r7, r0, r2
    183a:	460f      	mov	r7, r1
    183c:	419f      	sbcs	r7, r3
    183e:	d302      	bcc.n	1846 <ldiv1>
    1840:	1a80      	subs	r0, r0, r2
    1842:	4199      	sbcs	r1, r3
    1844:	3401      	adds	r4, #1

00001846 <ldiv1>:
    1846:	3e01      	subs	r6, #1
    1848:	d1f0      	bne.n	182c <loop>
    184a:	4602      	mov	r2, r0
    184c:	460b      	mov	r3, r1
    184e:	4620      	mov	r0, r4
    1850:	4629      	mov	r1, r5
    1852:	bdf0      	pop	{r4, r5, r6, r7, pc}

00001854 <ldiv_divzero>:
    1854:	2000      	movs	r0, #0
    1856:	2100      	movs	r1, #0
    1858:	f000 f801 	bl	185e <__aeabi_idiv0>
    185c:	bdf0      	pop	{r4, r5, r6, r7, pc}

0000185e <__aeabi_idiv0>:
    185e:	4770      	bx	lr

00001860 <__aeabi_f2uiz>:
    1860:	b510      	push	{r4, lr}
    1862:	2480      	movs	r4, #128	; 0x80
    1864:	239e      	movs	r3, #158	; 0x9e
    1866:	0dc1      	lsrs	r1, r0, #23
    1868:	0202      	lsls	r2, r0, #8
    186a:	0624      	lsls	r4, r4, #24
    186c:	4322      	orrs	r2, r4
    186e:	1a5b      	subs	r3, r3, r1
    1870:	d402      	bmi.n	1878 <__aeabi_f2uiz+0x18>
    1872:	40da      	lsrs	r2, r3
    1874:	1c10      	adds	r0, r2, #0
    1876:	e006      	b.n	1886 <__aeabi_f2uiz+0x26>
    1878:	29fe      	cmp	r1, #254	; 0xfe
    187a:	d902      	bls.n	1882 <__aeabi_f2uiz+0x22>
    187c:	2000      	movs	r0, #0
    187e:	42a2      	cmp	r2, r4
    1880:	d101      	bne.n	1886 <__aeabi_f2uiz+0x26>
    1882:	0a09      	lsrs	r1, r1, #8
    1884:	1e48      	subs	r0, r1, #1
    1886:	bd10      	pop	{r4, pc}

00001888 <__bhs_ui2f>:
    1888:	2800      	cmp	r0, #0
    188a:	d02b      	beq.n	18e4 <__bhs_ui2f+0x5c>
    188c:	0c03      	lsrs	r3, r0, #16
    188e:	d101      	bne.n	1894 <__bhs_ui2f+0xc>
    1890:	0400      	lsls	r0, r0, #16
    1892:	e002      	b.n	189a <__bhs_ui2f+0x12>
    1894:	2380      	movs	r3, #128	; 0x80
    1896:	051b      	lsls	r3, r3, #20
    1898:	18c9      	adds	r1, r1, r3
    189a:	0e03      	lsrs	r3, r0, #24
    189c:	d101      	bne.n	18a2 <__bhs_ui2f+0x1a>
    189e:	0200      	lsls	r0, r0, #8
    18a0:	e002      	b.n	18a8 <__bhs_ui2f+0x20>
    18a2:	2380      	movs	r3, #128	; 0x80
    18a4:	04db      	lsls	r3, r3, #19
    18a6:	18c9      	adds	r1, r1, r3
    18a8:	0f03      	lsrs	r3, r0, #28
    18aa:	d101      	bne.n	18b0 <__bhs_ui2f+0x28>
    18ac:	0100      	lsls	r0, r0, #4
    18ae:	e002      	b.n	18b6 <__bhs_ui2f+0x2e>
    18b0:	2380      	movs	r3, #128	; 0x80
    18b2:	049b      	lsls	r3, r3, #18
    18b4:	18c9      	adds	r1, r1, r3
    18b6:	0f83      	lsrs	r3, r0, #30
    18b8:	d101      	bne.n	18be <__bhs_ui2f+0x36>
    18ba:	0080      	lsls	r0, r0, #2
    18bc:	e002      	b.n	18c4 <__bhs_ui2f+0x3c>
    18be:	2380      	movs	r3, #128	; 0x80
    18c0:	045b      	lsls	r3, r3, #17
    18c2:	18c9      	adds	r1, r1, r3
    18c4:	2800      	cmp	r0, #0
    18c6:	db01      	blt.n	18cc <__bhs_ui2f+0x44>
    18c8:	0040      	lsls	r0, r0, #1
    18ca:	e002      	b.n	18d2 <__bhs_ui2f+0x4a>
    18cc:	2380      	movs	r3, #128	; 0x80
    18ce:	041b      	lsls	r3, r3, #16
    18d0:	18c9      	adds	r1, r1, r3
    18d2:	3080      	adds	r0, #128	; 0x80
    18d4:	1203      	asrs	r3, r0, #8
    18d6:	1859      	adds	r1, r3, r1
    18d8:	0600      	lsls	r0, r0, #24
    18da:	d101      	bne.n	18e0 <__bhs_ui2f+0x58>
    18dc:	2301      	movs	r3, #1
    18de:	4399      	bics	r1, r3
    18e0:	1c08      	adds	r0, r1, #0
    18e2:	e000      	b.n	18e6 <__bhs_ui2f+0x5e>
    18e4:	2000      	movs	r0, #0
    18e6:	4770      	bx	lr

000018e8 <__aeabi_ui2f>:
    18e8:	2180      	movs	r1, #128	; 0x80
    18ea:	b508      	push	{r3, lr}
    18ec:	05c9      	lsls	r1, r1, #23
    18ee:	f7ff ffcb 	bl	1888 <__bhs_ui2f>
    18f2:	bd08      	pop	{r3, pc}

000018f4 <__aeabi_memcpy>:
    18f4:	4684      	mov	ip, r0
    18f6:	0783      	lsls	r3, r0, #30
    18f8:	d108      	bne.n	190c <copy1_start>
    18fa:	078b      	lsls	r3, r1, #30
    18fc:	d106      	bne.n	190c <copy1_start>
    18fe:	1f13      	subs	r3, r2, #4
    1900:	d304      	bcc.n	190c <copy1_start>

00001902 <copy4>:
    1902:	c904      	ldmia	r1!, {r2}
    1904:	c004      	stmia	r0!, {r2}
    1906:	3b04      	subs	r3, #4
    1908:	d2fb      	bcs.n	1902 <copy4>
    190a:	1d1a      	adds	r2, r3, #4

0000190c <copy1_start>:
    190c:	4252      	negs	r2, r2
    190e:	d005      	beq.n	191c <copy1_ret>
    1910:	1a89      	subs	r1, r1, r2
    1912:	1a80      	subs	r0, r0, r2

00001914 <copy1>:
    1914:	5c8b      	ldrb	r3, [r1, r2]
    1916:	5483      	strb	r3, [r0, r2]
    1918:	3201      	adds	r2, #1
    191a:	d1fb      	bne.n	1914 <copy1>

0000191c <copy1_ret>:
    191c:	4660      	mov	r0, ip
    191e:	4770      	bx	lr

00001920 <__aeabi_lowlevel_memset>:
    1920:	4684      	mov	ip, r0
    1922:	3a04      	subs	r2, #4
    1924:	d309      	bcc.n	193a <memset1>
    1926:	0783      	lsls	r3, r0, #30
    1928:	d107      	bne.n	193a <memset1>
    192a:	0609      	lsls	r1, r1, #24
    192c:	0a0b      	lsrs	r3, r1, #8
    192e:	4319      	orrs	r1, r3
    1930:	0c0b      	lsrs	r3, r1, #16
    1932:	4319      	orrs	r1, r3

00001934 <memset4>:
    1934:	3a04      	subs	r2, #4
    1936:	c002      	stmia	r0!, {r1}
    1938:	d2fc      	bcs.n	1934 <memset4>

0000193a <memset1>:
    193a:	3204      	adds	r2, #4
    193c:	d003      	beq.n	1946 <memset1_ret>

0000193e <memset1a>:
    193e:	7001      	strb	r1, [r0, #0]
    1940:	3001      	adds	r0, #1
    1942:	3a01      	subs	r2, #1
    1944:	d1fb      	bne.n	193e <memset1a>

00001946 <memset1_ret>:
    1946:	4660      	mov	r0, ip
    1948:	4770      	bx	lr

0000194a <__gnu_thumb1_case_uqi>:
    194a:	468c      	mov	ip, r1
    194c:	4671      	mov	r1, lr
    194e:	3901      	subs	r1, #1
    1950:	5c09      	ldrb	r1, [r1, r0]
    1952:	0049      	lsls	r1, r1, #1
    1954:	448e      	add	lr, r1
    1956:	4661      	mov	r1, ip
    1958:	4770      	bx	lr
    195a:	38314339 	ldmdacc	r1!, {r0, r3, r4, r5, r8, r9, lr}
    195e:	322d3930 	eorcc	r3, sp, #48, 18	; 0xc0000
    1962:	32623765 	rsbcc	r3, r2, #26476544	; 0x1940000
    1966:	00303632 	eorseq	r3, r0, r2, lsr r6
	...

0000196c <OscRateIn>:
    196c:	00b71b00 	adcseq	r1, r7, r0, lsl #22

00001970 <ExtRateIn>:
    1970:	00000000 	andeq	r0, r0, r0

00001974 <wdtOSCRate>:
    1974:	00000000 	andeq	r0, r0, r0
    1978:	000927c0 	andeq	r2, r9, r0, asr #15
    197c:	00100590 	mulseq	r0, r0, r5
    1980:	00155cc0 	andseq	r5, r5, r0, asr #25
    1984:	001ab3f0 			; <UNDEFINED> instruction: 0x001ab3f0
    1988:	00200b20 	eoreq	r0, r0, r0, lsr #22
    198c:	00249f00 	eoreq	r9, r4, r0, lsl #30
    1990:	002932e0 	eoreq	r3, r9, r0, ror #5
    1994:	002dc6c0 	eoreq	ip, sp, r0, asr #13
    1998:	00319750 	eorseq	r9, r1, r0, asr r7
    199c:	003567e0 	eorseq	r6, r5, r0, ror #15
    19a0:	00393870 	eorseq	r3, r9, r0, ror r8
    19a4:	003d0900 	eorseq	r0, sp, r0, lsl #18
    19a8:	00401640 	subeq	r1, r0, r0, asr #12
    19ac:	00432380 	subeq	r2, r3, r0, lsl #7
    19b0:	004630c0 	subeq	r3, r6, r0, asr #1

000019b4 <config_tab>:
    19b4:	000c000c 	andeq	r0, ip, ip
    19b8:	000000c0 	andeq	r0, r0, r0, asr #1
    19bc:	00010003 	andeq	r0, r1, r3
    19c0:	0006000c 	andeq	r0, r6, ip
    19c4:	000000c0 	andeq	r0, r0, r0, asr #1
    19c8:	00020003 	andeq	r0, r2, r3
    19cc:	0004000c 	andeq	r0, r4, ip
    19d0:	000000c0 	andeq	r0, r0, r0, asr #1
    19d4:	00030003 	andeq	r0, r3, r3
    19d8:	0003000c 	andeq	r0, r3, ip
    19dc:	000000c0 	andeq	r0, r0, r0, asr #1
    19e0:	00040003 	andeq	r0, r4, r3
    19e4:	0002000c 	andeq	r0, r2, ip
    19e8:	000000c0 	andeq	r0, r0, r0, asr #1
    19ec:	00060003 	andeq	r0, r6, r3
    19f0:	0001000c 	andeq	r0, r1, ip
    19f4:	000000c0 	andeq	r0, r0, r0, asr #1
    19f8:	000c0003 	andeq	r0, ip, r3
    19fc:	00180018 	andseq	r0, r8, r8, lsl r0
    1a00:	000100c0 	andeq	r0, r1, r0, asr #1
    1a04:	00010002 	andeq	r0, r1, r2
    1a08:	000c0018 	andeq	r0, ip, r8, lsl r0
    1a0c:	000100c0 	andeq	r0, r1, r0, asr #1
    1a10:	00020002 	andeq	r0, r2, r2
    1a14:	00080018 	andeq	r0, r8, r8, lsl r0
    1a18:	000100c0 	andeq	r0, r1, r0, asr #1
    1a1c:	00030002 	andeq	r0, r3, r2
    1a20:	00060018 	andeq	r0, r6, r8, lsl r0
    1a24:	000100c0 	andeq	r0, r1, r0, asr #1
    1a28:	00040002 	andeq	r0, r4, r2
    1a2c:	00040018 	andeq	r0, r4, r8, lsl r0
    1a30:	000100c0 	andeq	r0, r1, r0, asr #1
    1a34:	00060002 	andeq	r0, r6, r2
    1a38:	00030018 	andeq	r0, r3, r8, lsl r0
    1a3c:	000100c0 	andeq	r0, r1, r0, asr #1
    1a40:	00080002 	andeq	r0, r8, r2
    1a44:	00020018 	andeq	r0, r2, r8, lsl r0
    1a48:	000100c0 	andeq	r0, r1, r0, asr #1
    1a4c:	000c0002 	andeq	r0, ip, r2
    1a50:	00010018 	andeq	r0, r1, r8, lsl r0
    1a54:	000100c0 	andeq	r0, r1, r0, asr #1
    1a58:	00180002 	andseq	r0, r8, r2
    1a5c:	00120024 	andseq	r0, r2, r4, lsr #32
    1a60:	00020120 	andeq	r0, r2, r0, lsr #2
    1a64:	00020002 	andeq	r0, r2, r2
    1a68:	000c0024 	andeq	r0, ip, r4, lsr #32
    1a6c:	00020120 	andeq	r0, r2, r0, lsr #2
    1a70:	00030002 	andeq	r0, r3, r2
    1a74:	00090024 	andeq	r0, r9, r4, lsr #32
    1a78:	00020120 	andeq	r0, r2, r0, lsr #2
    1a7c:	00040002 	andeq	r0, r4, r2
    1a80:	00060024 	andeq	r0, r6, r4, lsr #32
    1a84:	00020120 	andeq	r0, r2, r0, lsr #2
    1a88:	00060002 	andeq	r0, r6, r2
    1a8c:	00040024 	andeq	r0, r4, r4, lsr #32
    1a90:	00020120 	andeq	r0, r2, r0, lsr #2
    1a94:	00090002 	andeq	r0, r9, r2
    1a98:	00030024 	andeq	r0, r3, r4, lsr #32
    1a9c:	00020120 	andeq	r0, r2, r0, lsr #2
    1aa0:	000c0002 	andeq	r0, ip, r2
    1aa4:	00020024 	andeq	r0, r2, r4, lsr #32
    1aa8:	00020120 	andeq	r0, r2, r0, lsr #2
    1aac:	00120002 	andseq	r0, r2, r2
    1ab0:	00010024 	andeq	r0, r1, r4, lsr #32
    1ab4:	00020120 	andeq	r0, r2, r0, lsr #2
    1ab8:	00240002 	eoreq	r0, r4, r2
    1abc:	00180030 	andseq	r0, r8, r0, lsr r0
    1ac0:	000300c0 	andeq	r0, r3, r0, asr #1
    1ac4:	00020001 	andeq	r0, r2, r1
    1ac8:	00100030 	andseq	r0, r0, r0, lsr r0
    1acc:	000300c0 	andeq	r0, r3, r0, asr #1
    1ad0:	00030001 	andeq	r0, r3, r1
    1ad4:	000c0030 	andeq	r0, ip, r0, lsr r0
    1ad8:	000300c0 	andeq	r0, r3, r0, asr #1
    1adc:	00040001 	andeq	r0, r4, r1
    1ae0:	00080030 	andeq	r0, r8, r0, lsr r0
    1ae4:	000300c0 	andeq	r0, r3, r0, asr #1
    1ae8:	00060001 	andeq	r0, r6, r1
    1aec:	00060030 	andeq	r0, r6, r0, lsr r0
    1af0:	000300c0 	andeq	r0, r3, r0, asr #1
    1af4:	00080001 	andeq	r0, r8, r1
    1af8:	00040030 	andeq	r0, r4, r0, lsr r0
    1afc:	000300c0 	andeq	r0, r3, r0, asr #1
    1b00:	000c0001 	andeq	r0, ip, r1
    1b04:	00030030 	andeq	r0, r3, r0, lsr r0
    1b08:	000300c0 	andeq	r0, r3, r0, asr #1
    1b0c:	00100001 	andseq	r0, r0, r1
    1b10:	00020030 	andeq	r0, r2, r0, lsr r0
    1b14:	000300c0 	andeq	r0, r3, r0, asr #1
    1b18:	00180001 	andseq	r0, r8, r1
    1b1c:	00010030 	andeq	r0, r1, r0, lsr r0
    1b20:	000300c0 	andeq	r0, r3, r0, asr #1
    1b24:	00300001 	eorseq	r0, r0, r1
    1b28:	001e003c 	andseq	r0, lr, ip, lsr r0
    1b2c:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b30:	00020001 	andeq	r0, r2, r1
    1b34:	0014003c 	andseq	r0, r4, ip, lsr r0
    1b38:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b3c:	00030001 	andeq	r0, r3, r1
    1b40:	000f003c 	andeq	r0, pc, ip, lsr r0	; <UNPREDICTABLE>
    1b44:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b48:	00040001 	andeq	r0, r4, r1
    1b4c:	000c003c 	andeq	r0, ip, ip, lsr r0
    1b50:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b54:	00050001 	andeq	r0, r5, r1
    1b58:	000a003c 	andeq	r0, sl, ip, lsr r0
    1b5c:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b60:	00060001 	andeq	r0, r6, r1
    1b64:	0006003c 	andeq	r0, r6, ip, lsr r0
    1b68:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b6c:	000a0001 	andeq	r0, sl, r1
    1b70:	0005003c 	andeq	r0, r5, ip, lsr r0
    1b74:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b78:	000c0001 	andeq	r0, ip, r1
    1b7c:	0004003c 	andeq	r0, r4, ip, lsr r0
    1b80:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b84:	000f0001 	andeq	r0, pc, r1
    1b88:	0003003c 	andeq	r0, r3, ip, lsr r0
    1b8c:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b90:	00140001 	andseq	r0, r4, r1
    1b94:	0002003c 	andeq	r0, r2, ip, lsr r0
    1b98:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1b9c:	001e0001 	andseq	r0, lr, r1
    1ba0:	0001003c 	andeq	r0, r1, ip, lsr r0
    1ba4:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1ba8:	003c0001 	eorseq	r0, ip, r1
    1bac:	00180048 	andseq	r0, r8, r8, asr #32
    1bb0:	00050120 	andeq	r0, r5, r0, lsr #2
    1bb4:	00030001 	andeq	r0, r3, r1
    1bb8:	00120048 	andseq	r0, r2, r8, asr #32
    1bbc:	00050120 	andeq	r0, r5, r0, lsr #2
    1bc0:	00040001 	andeq	r0, r4, r1
    1bc4:	000c0048 	andeq	r0, ip, r8, asr #32
    1bc8:	00050120 	andeq	r0, r5, r0, lsr #2
    1bcc:	00060001 	andeq	r0, r6, r1
    1bd0:	00090048 	andeq	r0, r9, r8, asr #32
    1bd4:	00050120 	andeq	r0, r5, r0, lsr #2
    1bd8:	00080001 	andeq	r0, r8, r1
    1bdc:	00080048 	andeq	r0, r8, r8, asr #32
    1be0:	00050120 	andeq	r0, r5, r0, lsr #2
    1be4:	00090001 	andeq	r0, r9, r1
    1be8:	00060048 	andeq	r0, r6, r8, asr #32
    1bec:	00050120 	andeq	r0, r5, r0, lsr #2
    1bf0:	000c0001 	andeq	r0, ip, r1
    1bf4:	00040048 	andeq	r0, r4, r8, asr #32
    1bf8:	00050120 	andeq	r0, r5, r0, lsr #2
    1bfc:	00120001 	andseq	r0, r2, r1
    1c00:	00030048 	andeq	r0, r3, r8, asr #32
    1c04:	00050120 	andeq	r0, r5, r0, lsr #2
    1c08:	00180001 	andseq	r0, r8, r1
    1c0c:	00020048 	andeq	r0, r2, r8, asr #32
    1c10:	00050120 	andeq	r0, r5, r0, lsr #2
    1c14:	00240001 	eoreq	r0, r4, r1
    1c18:	00010048 	andeq	r0, r1, r8, asr #32
    1c1c:	00050120 	andeq	r0, r5, r0, lsr #2
    1c20:	00480001 	subeq	r0, r8, r1
    1c24:	001c0054 	andseq	r0, ip, r4, asr r0
    1c28:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c2c:	00030000 	andeq	r0, r3, r0
    1c30:	00150054 	andseq	r0, r5, r4, asr r0
    1c34:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c38:	00040000 	andeq	r0, r4, r0
    1c3c:	000e0054 	andeq	r0, lr, r4, asr r0
    1c40:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c44:	00060000 	andeq	r0, r6, r0
    1c48:	000c0054 	andeq	r0, ip, r4, asr r0
    1c4c:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c50:	00070000 	andeq	r0, r7, r0
    1c54:	00070054 	andeq	r0, r7, r4, asr r0
    1c58:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c5c:	000c0000 	andeq	r0, ip, r0
    1c60:	00060054 	andeq	r0, r6, r4, asr r0
    1c64:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c68:	000e0000 	andeq	r0, lr, r0
    1c6c:	00040054 	andeq	r0, r4, r4, asr r0
    1c70:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c74:	00150000 	andseq	r0, r5, r0
    1c78:	00030054 	andeq	r0, r3, r4, asr r0
    1c7c:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c80:	001c0000 	andseq	r0, ip, r0
    1c84:	00020054 	andeq	r0, r2, r4, asr r0
    1c88:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c8c:	002a0000 	eoreq	r0, sl, r0
    1c90:	00010054 	andeq	r0, r1, r4, asr r0
    1c94:	000600a8 	andeq	r0, r6, r8, lsr #1
    1c98:	00540000 	subseq	r0, r4, r0
    1c9c:	00180060 	andseq	r0, r8, r0, rrx
    1ca0:	000700c0 	andeq	r0, r7, r0, asr #1
    1ca4:	00040000 	andeq	r0, r4, r0
    1ca8:	00100060 	andseq	r0, r0, r0, rrx
    1cac:	000700c0 	andeq	r0, r7, r0, asr #1
    1cb0:	00060000 	andeq	r0, r6, r0
    1cb4:	000c0060 	andeq	r0, ip, r0, rrx
    1cb8:	000700c0 	andeq	r0, r7, r0, asr #1
    1cbc:	00080000 	andeq	r0, r8, r0
    1cc0:	00080060 	andeq	r0, r8, r0, rrx
    1cc4:	000700c0 	andeq	r0, r7, r0, asr #1
    1cc8:	000c0000 	andeq	r0, ip, r0
    1ccc:	00060060 	andeq	r0, r6, r0, rrx
    1cd0:	000700c0 	andeq	r0, r7, r0, asr #1
    1cd4:	00100000 	andseq	r0, r0, r0
    1cd8:	00040060 	andeq	r0, r4, r0, rrx
    1cdc:	000700c0 	andeq	r0, r7, r0, asr #1
    1ce0:	00180000 	andseq	r0, r8, r0
    1ce4:	00030060 	andeq	r0, r3, r0, rrx
    1ce8:	000700c0 	andeq	r0, r7, r0, asr #1
    1cec:	00200000 	eoreq	r0, r0, r0
    1cf0:	00020060 	andeq	r0, r2, r0, rrx
    1cf4:	000700c0 	andeq	r0, r7, r0, asr #1
    1cf8:	00300000 	eorseq	r0, r0, r0
    1cfc:	00010060 	andeq	r0, r1, r0, rrx
    1d00:	000700c0 	andeq	r0, r7, r0, asr #1
    1d04:	00600000 	rsbeq	r0, r0, r0

Disassembly of section .bss:

10000000 <_bss>:
	...

10000002 <g_check_pg2_en>:
	...

10000004 <g_pg_state>:
10000004:	00000000 	andeq	r0, r0, r0

10000008 <led_state>:
10000008:	00000000 	andeq	r0, r0, r0

1000000c <g_dna>:
	...

10000014 <g_ackpkg>:
	...

1000003c <g_adc_buf>:
	...

1000005a <g_adc_val>:
	...

10000064 <adc_cnt.7251>:
	...

10000066 <g_reqpkg>:
	...

1000008e <g_ntc_max>:
1000008e:	00000000 	andeq	r0, r0, r0

10000092 <uart_rxdata>:
	...

10000134 <uart_rxrb>:
	...

10000148 <uart_txrb>:
	...

1000015c <uart_txdata>:
	...

100001fc <config_tab_idx>:
100001fc:	00000000 	andeq	r0, r0, r0

10000200 <tmrlist>:
	...

10000250 <SystemCoreClock>:
10000250:	00000000 	andeq	r0, r0, r0

Disassembly of section .comment:

00000000 <.comment>:
   0:	3a434347 	bcc	10d0d24 <__top_MFlash32+0x10c8d24>
   4:	4e472820 	cdpmi	8, 4, cr2, cr7, cr0, {1}
   8:	6f542055 	svcvs	0x00542055
   c:	20736c6f 	rsbscs	r6, r3, pc, ror #24
  10:	20726f66 	rsbscs	r6, r2, r6, ror #30
  14:	204d5241 	subcs	r5, sp, r1, asr #4
  18:	65626d45 	strbvs	r6, [r2, #-3397]!	; 0xd45
  1c:	64656464 	strbtvs	r6, [r5], #-1124	; 0x464
  20:	6f725020 	svcvs	0x00725020
  24:	73736563 	cmnvc	r3, #415236096	; 0x18c00000
  28:	2973726f 	ldmdbcs	r3!, {r0, r1, r2, r3, r5, r6, r9, ip, sp, lr}^
  2c:	392e3420 	stmdbcc	lr!, {r5, sl, ip, sp}
  30:	3220332e 	eorcc	r3, r0, #-1207959552	; 0xb8000000
  34:	30353130 	eorscc	r3, r5, r0, lsr r1
  38:	20393235 	eorscs	r3, r9, r5, lsr r2
  3c:	6c657228 	sfmvs	f7, 2, [r5], #-160	; 0xffffff60
  40:	65736165 	ldrbvs	r6, [r3, #-357]!	; 0x165
  44:	415b2029 	cmpmi	fp, r9, lsr #32
  48:	652f4d52 	strvs	r4, [pc, #-3410]!	; fffff2fe <_vStackTop+0xefffd2fe>
  4c:	6465626d 	strbtvs	r6, [r5], #-621	; 0x26d
  50:	2d646564 	cfstr64cs	mvdx6, [r4, #-400]!	; 0xfffffe70
  54:	2d395f34 	ldccs	15, cr5, [r9, #-208]!	; 0xffffff30
  58:	6e617262 	cdpvs	2, 6, cr7, cr1, cr2, {3}
  5c:	72206863 	eorvc	r6, r0, #6488064	; 0x630000
  60:	73697665 	cmnvc	r9, #105906176	; 0x6500000
  64:	206e6f69 	rsbcs	r6, lr, r9, ror #30
  68:	32343232 	eorscc	r3, r4, #536870915	; 0x20000003
  6c:	005d3838 	subseq	r3, sp, r8, lsr r8

Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:
   0:	00002e41 	andeq	r2, r0, r1, asr #28
   4:	61656100 	cmnvs	r5, r0, lsl #2
   8:	01006962 	tsteq	r0, r2, ror #18
   c:	00000024 	andeq	r0, r0, r4, lsr #32
  10:	726f4305 	rsbvc	r4, pc, #335544320	; 0x14000000
  14:	2d786574 	cfldr64cs	mvdx6, [r8, #-464]!	; 0xfffffe30
  18:	0600304d 	streq	r3, [r0], -sp, asr #32
  1c:	094d070c 	stmdbeq	sp, {r2, r3, r8, r9, sl}^
  20:	14041201 	strne	r1, [r4], #-513	; 0x201
  24:	17011501 	strne	r1, [r1, -r1, lsl #10]
  28:	1a011803 	bne	4603c <__top_MFlash32+0x3e03c>
  2c:	Address 0x0000002c is out of bounds.

