
pmu821.axf:     file format elf32-littlearm


Disassembly of section .text:

00000000 <g_pfnVectors>:
       0:	10002000 	andne	r2, r0, r0
       4:	00000103 	andeq	r0, r0, r3, lsl #2
       8:	000000d5 	ldrdeq	r0, [r0], -r5
       c:	000000d7 	ldrdeq	r0, [r0], -r7
	...
      2c:	000000d9 	ldrdeq	r0, [r0], -r9
	...
      38:	000000db 	ldrdeq	r0, [r0], -fp
      3c:	00000e3d 	andeq	r0, r0, sp, lsr lr
      40:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      44:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      48:	00000000 	andeq	r0, r0, r0
      4c:	00000d8d 	andeq	r0, r0, sp, lsl #27
      50:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      54:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      60:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      64:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      68:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      6c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      70:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      74:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      78:	00000000 	andeq	r0, r0, r0
      7c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      a0:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      a4:	000004e5 	andeq	r0, r0, r5, ror #9
      a8:	00000505 	andeq	r0, r0, r5, lsl #10
      ac:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      b0:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      b4:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      b8:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      bc:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>

000000c0 <__data_section_table>:
      c0:	00001df8 	strdeq	r1, [r0], -r8
      c4:	10000000 	andne	r0, r0, r0
      c8:	00000000 	andeq	r0, r0, r0

000000cc <__bss_section_table>:
      cc:	10000000 	andne	r0, r0, r0
      d0:	000002ac 	andeq	r0, r0, ip, lsr #5

000000d4 <NMI_Handler>:
      d4:	e7fe      	b.n	d4 <NMI_Handler>

000000d6 <HardFault_Handler>:
      d6:	e7fe      	b.n	d6 <HardFault_Handler>

000000d8 <SVC_Handler>:
      d8:	e7fe      	b.n	d8 <SVC_Handler>

000000da <PendSV_Handler>:
      da:	e7fe      	b.n	da <PendSV_Handler>
      dc:	e7fe      	b.n	dc <PendSV_Handler+0x2>

000000de <BOD_IRQHandler>:
      de:	e7fe      	b.n	de <BOD_IRQHandler>

000000e0 <data_init>:
      e0:	2300      	movs	r3, #0
      e2:	b510      	push	{r4, lr}
      e4:	4293      	cmp	r3, r2
      e6:	d203      	bcs.n	f0 <data_init+0x10>
      e8:	581c      	ldr	r4, [r3, r0]
      ea:	505c      	str	r4, [r3, r1]
      ec:	3304      	adds	r3, #4
      ee:	e7f9      	b.n	e4 <data_init+0x4>
      f0:	bd10      	pop	{r4, pc}

000000f2 <bss_init>:
      f2:	2300      	movs	r3, #0
      f4:	428b      	cmp	r3, r1
      f6:	d203      	bcs.n	100 <bss_init+0xe>
      f8:	2200      	movs	r2, #0
      fa:	501a      	str	r2, [r3, r0]
      fc:	3304      	adds	r3, #4
      fe:	e7f9      	b.n	f4 <bss_init+0x2>
     100:	4770      	bx	lr

00000102 <ResetISR>:
     102:	2388      	movs	r3, #136	; 0x88
     104:	b570      	push	{r4, r5, r6, lr}
     106:	4e10      	ldr	r6, [pc, #64]	; (148 <ResetISR+0x46>)
     108:	4d10      	ldr	r5, [pc, #64]	; (14c <ResetISR+0x4a>)
     10a:	4c11      	ldr	r4, [pc, #68]	; (150 <ResetISR+0x4e>)
     10c:	6033      	str	r3, [r6, #0]
     10e:	602b      	str	r3, [r5, #0]
     110:	4b10      	ldr	r3, [pc, #64]	; (154 <ResetISR+0x52>)
     112:	429c      	cmp	r4, r3
     114:	d206      	bcs.n	124 <ResetISR+0x22>
     116:	6820      	ldr	r0, [r4, #0]
     118:	6861      	ldr	r1, [r4, #4]
     11a:	68a2      	ldr	r2, [r4, #8]
     11c:	f7ff ffe0 	bl	e0 <data_init>
     120:	340c      	adds	r4, #12
     122:	e7f5      	b.n	110 <ResetISR+0xe>
     124:	4b0c      	ldr	r3, [pc, #48]	; (158 <ResetISR+0x56>)
     126:	429c      	cmp	r4, r3
     128:	d205      	bcs.n	136 <ResetISR+0x34>
     12a:	6820      	ldr	r0, [r4, #0]
     12c:	6861      	ldr	r1, [r4, #4]
     12e:	f7ff ffe0 	bl	f2 <bss_init>
     132:	3408      	adds	r4, #8
     134:	e7f6      	b.n	124 <ResetISR+0x22>
     136:	2388      	movs	r3, #136	; 0x88
     138:	6033      	str	r3, [r6, #0]
     13a:	602b      	str	r3, [r5, #0]
     13c:	f000 fdb0 	bl	ca0 <SystemInit>
     140:	f001 fb98 	bl	1874 <__weak_main>
     144:	e7fe      	b.n	144 <ResetISR+0x42>
     146:	46c0      	nop			; (mov r8, r8)
     148:	40044058 	andmi	r4, r4, r8, asr r0
     14c:	4004405c 	andmi	r4, r4, ip, asr r0
     150:	000000c0 	andeq	r0, r0, r0, asr #1
     154:	000000cc 	andeq	r0, r0, ip, asr #1
     158:	000000d4 	ldrdeq	r0, [r0], -r4
     15c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     160:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     164:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     168:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     16c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     170:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     174:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     178:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     17c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     180:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     184:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     188:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     18c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     190:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     194:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     198:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     19c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     200:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     204:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     208:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     20c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     210:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     214:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     218:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     21c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     220:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     224:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     228:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     22c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     230:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     234:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     238:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     23c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     240:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     244:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     248:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     24c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     250:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     254:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     258:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     25c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     260:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     264:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     268:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     26c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     270:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     274:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     278:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     27c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     280:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     284:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     288:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     28c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     290:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     294:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     298:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     29c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

000002fc <CRP_WORD>:
     2fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

00000300 <shitfer>:
     300:	2308      	movs	r3, #8
     302:	2280      	movs	r2, #128	; 0x80
     304:	b530      	push	{r4, r5, lr}
     306:	1c04      	adds	r4, r0, #0
     308:	4014      	ands	r4, r2
     30a:	1e65      	subs	r5, r4, #1
     30c:	41ac      	sbcs	r4, r5
     30e:	0049      	lsls	r1, r1, #1
     310:	1909      	adds	r1, r1, r4
     312:	4c06      	ldr	r4, [pc, #24]	; (32c <shitfer+0x2c>)
     314:	0852      	lsrs	r2, r2, #1
     316:	42a1      	cmp	r1, r4
     318:	d902      	bls.n	320 <shitfer+0x20>
     31a:	4c05      	ldr	r4, [pc, #20]	; (330 <shitfer+0x30>)
     31c:	b289      	uxth	r1, r1
     31e:	4061      	eors	r1, r4
     320:	3b01      	subs	r3, #1
     322:	2b00      	cmp	r3, #0
     324:	d1ef      	bne.n	306 <shitfer+0x6>
     326:	b288      	uxth	r0, r1
     328:	bd30      	pop	{r4, r5, pc}
     32a:	46c0      	nop			; (mov r8, r8)
     32c:	0000ffff 	strdeq	pc, [r0], -pc	; <UNPREDICTABLE>
     330:	00001021 	andeq	r1, r0, r1, lsr #32

00000334 <crc16>:
     334:	b570      	push	{r4, r5, r6, lr}
     336:	1c0e      	adds	r6, r1, #0
     338:	1c05      	adds	r5, r0, #0
     33a:	1c04      	adds	r4, r0, #0
     33c:	2100      	movs	r1, #0
     33e:	1b33      	subs	r3, r6, r4
     340:	18eb      	adds	r3, r5, r3
     342:	2b00      	cmp	r3, #0
     344:	dd05      	ble.n	352 <crc16+0x1e>
     346:	7820      	ldrb	r0, [r4, #0]
     348:	f7ff ffda 	bl	300 <shitfer>
     34c:	3401      	adds	r4, #1
     34e:	1c01      	adds	r1, r0, #0
     350:	e7f5      	b.n	33e <crc16+0xa>
     352:	2000      	movs	r0, #0
     354:	f7ff ffd4 	bl	300 <shitfer>
     358:	1c01      	adds	r1, r0, #0
     35a:	2000      	movs	r0, #0
     35c:	f7ff ffd0 	bl	300 <shitfer>
     360:	bd70      	pop	{r4, r5, r6, pc}
	...

00000364 <adc_init>:
     364:	b538      	push	{r3, r4, r5, lr}
     366:	4829      	ldr	r0, [pc, #164]	; (40c <adc_init+0xa8>)
     368:	210f      	movs	r1, #15
     36a:	2200      	movs	r2, #0
     36c:	f001 f83a 	bl	13e4 <Chip_IOCON_PinSetMode>
     370:	4826      	ldr	r0, [pc, #152]	; (40c <adc_init+0xa8>)
     372:	2110      	movs	r1, #16
     374:	2200      	movs	r2, #0
     376:	f001 f835 	bl	13e4 <Chip_IOCON_PinSetMode>
     37a:	4824      	ldr	r0, [pc, #144]	; (40c <adc_init+0xa8>)
     37c:	2112      	movs	r1, #18
     37e:	2200      	movs	r2, #0
     380:	f001 f830 	bl	13e4 <Chip_IOCON_PinSetMode>
     384:	4821      	ldr	r0, [pc, #132]	; (40c <adc_init+0xa8>)
     386:	2119      	movs	r1, #25
     388:	2200      	movs	r2, #0
     38a:	f001 f82b 	bl	13e4 <Chip_IOCON_PinSetMode>
     38e:	481f      	ldr	r0, [pc, #124]	; (40c <adc_init+0xa8>)
     390:	211a      	movs	r1, #26
     392:	2200      	movs	r2, #0
     394:	f001 f826 	bl	13e4 <Chip_IOCON_PinSetMode>
     398:	481d      	ldr	r0, [pc, #116]	; (410 <adc_init+0xac>)
     39a:	2100      	movs	r1, #0
     39c:	f001 f974 	bl	1688 <Chip_ADC_Init>
     3a0:	481b      	ldr	r0, [pc, #108]	; (410 <adc_init+0xac>)
     3a2:	f001 f987 	bl	16b4 <Chip_ADC_StartCalibration>
     3a6:	4d1a      	ldr	r5, [pc, #104]	; (410 <adc_init+0xac>)
     3a8:	682b      	ldr	r3, [r5, #0]
     3aa:	005b      	lsls	r3, r3, #1
     3ac:	d4fb      	bmi.n	3a6 <adc_init+0x42>
     3ae:	f000 feed 	bl	118c <Chip_Clock_GetSystemClockRate>
     3b2:	4918      	ldr	r1, [pc, #96]	; (414 <adc_init+0xb0>)
     3b4:	f001 fa65 	bl	1882 <__aeabi_uidiv>
     3b8:	23ff      	movs	r3, #255	; 0xff
     3ba:	682c      	ldr	r4, [r5, #0]
     3bc:	3801      	subs	r0, #1
     3be:	b2c0      	uxtb	r0, r0
     3c0:	439c      	bics	r4, r3
     3c2:	4915      	ldr	r1, [pc, #84]	; (418 <adc_init+0xb4>)
     3c4:	4304      	orrs	r4, r0
     3c6:	602c      	str	r4, [r5, #0]
     3c8:	6fca      	ldr	r2, [r1, #124]	; 0x7c
     3ca:	4b14      	ldr	r3, [pc, #80]	; (41c <adc_init+0xb8>)
     3cc:	4814      	ldr	r0, [pc, #80]	; (420 <adc_init+0xbc>)
     3ce:	4013      	ands	r3, r2
     3d0:	2280      	movs	r2, #128	; 0x80
     3d2:	4313      	orrs	r3, r2
     3d4:	67cb      	str	r3, [r1, #124]	; 0x7c
     3d6:	23e0      	movs	r3, #224	; 0xe0
     3d8:	4a12      	ldr	r2, [pc, #72]	; (424 <adc_init+0xc0>)
     3da:	005b      	lsls	r3, r3, #1
     3dc:	58d4      	ldr	r4, [r2, r3]
     3de:	4020      	ands	r0, r4
     3e0:	50d0      	str	r0, [r2, r3]
     3e2:	58d4      	ldr	r4, [r2, r3]
     3e4:	4810      	ldr	r0, [pc, #64]	; (428 <adc_init+0xc4>)
     3e6:	4020      	ands	r0, r4
     3e8:	50d0      	str	r0, [r2, r3]
     3ea:	58d4      	ldr	r4, [r2, r3]
     3ec:	480f      	ldr	r0, [pc, #60]	; (42c <adc_init+0xc8>)
     3ee:	4020      	ands	r0, r4
     3f0:	50d0      	str	r0, [r2, r3]
     3f2:	58d4      	ldr	r4, [r2, r3]
     3f4:	480e      	ldr	r0, [pc, #56]	; (430 <adc_init+0xcc>)
     3f6:	4020      	ands	r0, r4
     3f8:	50d0      	str	r0, [r2, r3]
     3fa:	58d4      	ldr	r4, [r2, r3]
     3fc:	480d      	ldr	r0, [pc, #52]	; (434 <adc_init+0xd0>)
     3fe:	4020      	ands	r0, r4
     400:	50d0      	str	r0, [r2, r3]
     402:	6fca      	ldr	r2, [r1, #124]	; 0x7c
     404:	4b0c      	ldr	r3, [pc, #48]	; (438 <adc_init+0xd4>)
     406:	4013      	ands	r3, r2
     408:	67cb      	str	r3, [r1, #124]	; 0x7c
     40a:	bd38      	pop	{r3, r4, r5, pc}
     40c:	40044000 	andmi	r4, r4, r0
     410:	4001c000 	andmi	ip, r1, r0
     414:	01c9c380 	biceq	ip, r9, r0, lsl #7
     418:	40048004 	andmi	r8, r4, r4
     41c:	25efffff 	strbcs	pc, [pc, #4095]!	; 1423 <Chip_GPIO_Init+0x3>	; <UNPREDICTABLE>
     420:	01ffdfff 	ldrsheq	sp, [pc, #255]	; 527 <PIN_INT2_IRQHandler+0x23>
     424:	4000c000 	andmi	ip, r0, r0
     428:	01ffbfff 	ldrsheq	fp, [pc, #255]	; 52f <vcore_init+0x7>
     42c:	01ff7fff 	ldrsheq	r7, [pc, #255]	; 533 <vcore_init+0xb>
     430:	01feffff 	ldrsheq	pc, [lr, #255]!	; 0xff	; <UNPREDICTABLE>
     434:	01fdffff 	ldrsheq	pc, [sp, #255]!	; 0xff	; <UNPREDICTABLE>
     438:	25efff7f 	strbcs	pc, [pc, #3967]!	; 13bf <Chip_SWM_MovablePinAssign+0x3>	; <UNPREDICTABLE>

0000043c <adc_read>:
     43c:	2201      	movs	r2, #1
     43e:	2380      	movs	r3, #128	; 0x80
     440:	4082      	lsls	r2, r0
     442:	b530      	push	{r4, r5, lr}
     444:	2580      	movs	r5, #128	; 0x80
     446:	02db      	lsls	r3, r3, #11
     448:	431a      	orrs	r2, r3
     44a:	4b0f      	ldr	r3, [pc, #60]	; (488 <adc_read+0x4c>)
     44c:	062d      	lsls	r5, r5, #24
     44e:	609a      	str	r2, [r3, #8]
     450:	689c      	ldr	r4, [r3, #8]
     452:	4a0e      	ldr	r2, [pc, #56]	; (48c <adc_read+0x50>)
     454:	4014      	ands	r4, r2
     456:	432c      	orrs	r4, r5
     458:	609c      	str	r4, [r3, #8]
     45a:	689c      	ldr	r4, [r3, #8]
     45c:	4022      	ands	r2, r4
     45e:	2480      	movs	r4, #128	; 0x80
     460:	04e4      	lsls	r4, r4, #19
     462:	4322      	orrs	r2, r4
     464:	609a      	str	r2, [r3, #8]
     466:	1c02      	adds	r2, r0, #0
     468:	3208      	adds	r2, #8
     46a:	0092      	lsls	r2, r2, #2
     46c:	589a      	ldr	r2, [r3, r2]
     46e:	0f94      	lsrs	r4, r2, #30
     470:	d0f9      	beq.n	466 <adc_read+0x2a>
     472:	2900      	cmp	r1, #0
     474:	d002      	beq.n	47c <adc_read+0x40>
     476:	0412      	lsls	r2, r2, #16
     478:	0d12      	lsrs	r2, r2, #20
     47a:	800a      	strh	r2, [r1, #0]
     47c:	6899      	ldr	r1, [r3, #8]
     47e:	4a04      	ldr	r2, [pc, #16]	; (490 <adc_read+0x54>)
     480:	400a      	ands	r2, r1
     482:	609a      	str	r2, [r3, #8]
     484:	bd30      	pop	{r4, r5, pc}
     486:	46c0      	nop			; (mov r8, r8)
     488:	4001c000 	andmi	ip, r1, r0
     48c:	fc0c7fff 	stc2	15, cr7, [ip], {255}	; 0xff
     490:	7c0c7fff 	stcvc	15, cr7, [ip], {255}	; 0xff

00000494 <ds4412_set_dac>:
     494:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
     496:	2348      	movs	r3, #72	; 0x48
     498:	aa01      	add	r2, sp, #4
     49a:	3808      	subs	r0, #8
     49c:	7051      	strb	r1, [r2, #1]
     49e:	7010      	strb	r0, [r2, #0]
     4a0:	a902      	add	r1, sp, #8
     4a2:	2002      	movs	r0, #2
     4a4:	738b      	strb	r3, [r1, #14]
     4a6:	2300      	movs	r3, #0
     4a8:	8108      	strh	r0, [r1, #8]
     4aa:	4804      	ldr	r0, [pc, #16]	; (4bc <ds4412_set_dac+0x28>)
     4ac:	818b      	strh	r3, [r1, #12]
     4ae:	814b      	strh	r3, [r1, #10]
     4b0:	9202      	str	r2, [sp, #8]
     4b2:	604b      	str	r3, [r1, #4]
     4b4:	f001 f9a4 	bl	1800 <Chip_I2CM_XferBlocking>
     4b8:	b007      	add	sp, #28
     4ba:	bd00      	pop	{pc}
     4bc:	40050000 	andmi	r0, r5, r0

000004c0 <vcore_disable>:
     4c0:	2801      	cmp	r0, #1
     4c2:	d008      	beq.n	4d6 <vcore_disable+0x16>
     4c4:	2802      	cmp	r0, #2
     4c6:	d10b      	bne.n	4e0 <vcore_disable+0x20>
     4c8:	23a0      	movs	r3, #160	; 0xa0
     4ca:	2200      	movs	r2, #0
     4cc:	061b      	lsls	r3, r3, #24
     4ce:	765a      	strb	r2, [r3, #25]
     4d0:	3201      	adds	r2, #1
     4d2:	76da      	strb	r2, [r3, #27]
     4d4:	e004      	b.n	4e0 <vcore_disable+0x20>
     4d6:	23a0      	movs	r3, #160	; 0xa0
     4d8:	2200      	movs	r2, #0
     4da:	061b      	lsls	r3, r3, #24
     4dc:	769a      	strb	r2, [r3, #26]
     4de:	7418      	strb	r0, [r3, #16]
     4e0:	4770      	bx	lr
	...

000004e4 <PIN_INT1_IRQHandler>:
     4e4:	2302      	movs	r3, #2
     4e6:	4a05      	ldr	r2, [pc, #20]	; (4fc <PIN_INT1_IRQHandler+0x18>)
     4e8:	6253      	str	r3, [r2, #36]	; 0x24
     4ea:	4a05      	ldr	r2, [pc, #20]	; (500 <PIN_INT1_IRQHandler+0x1c>)
     4ec:	8013      	strh	r3, [r2, #0]
     4ee:	23a0      	movs	r3, #160	; 0xa0
     4f0:	2200      	movs	r2, #0
     4f2:	061b      	lsls	r3, r3, #24
     4f4:	769a      	strb	r2, [r3, #26]
     4f6:	3201      	adds	r2, #1
     4f8:	741a      	strb	r2, [r3, #16]
     4fa:	4770      	bx	lr
     4fc:	a0004000 	andge	r4, r0, r0
     500:	10000000 	andne	r0, r0, r0

00000504 <PIN_INT2_IRQHandler>:
     504:	2204      	movs	r2, #4
     506:	4b06      	ldr	r3, [pc, #24]	; (520 <PIN_INT2_IRQHandler+0x1c>)
     508:	625a      	str	r2, [r3, #36]	; 0x24
     50a:	4b06      	ldr	r3, [pc, #24]	; (524 <PIN_INT2_IRQHandler+0x20>)
     50c:	3a02      	subs	r2, #2
     50e:	805a      	strh	r2, [r3, #2]
     510:	23a0      	movs	r3, #160	; 0xa0
     512:	2200      	movs	r2, #0
     514:	061b      	lsls	r3, r3, #24
     516:	765a      	strb	r2, [r3, #25]
     518:	3201      	adds	r2, #1
     51a:	76da      	strb	r2, [r3, #27]
     51c:	4770      	bx	lr
     51e:	46c0      	nop			; (mov r8, r8)
     520:	a0004000 	andge	r4, r0, r0
     524:	10000000 	andne	r0, r0, r0

00000528 <vcore_init>:
     528:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
     52a:	2702      	movs	r7, #2
     52c:	4b35      	ldr	r3, [pc, #212]	; (604 <vcore_init+0xdc>)
     52e:	24a0      	movs	r4, #160	; 0xa0
     530:	801f      	strh	r7, [r3, #0]
     532:	805f      	strh	r7, [r3, #2]
     534:	2280      	movs	r2, #128	; 0x80
     536:	238e      	movs	r3, #142	; 0x8e
     538:	0624      	lsls	r4, r4, #24
     53a:	019b      	lsls	r3, r3, #6
     53c:	0252      	lsls	r2, r2, #9
     53e:	50e2      	str	r2, [r4, r3]
     540:	2180      	movs	r1, #128	; 0x80
     542:	2280      	movs	r2, #128	; 0x80
     544:	2080      	movs	r0, #128	; 0x80
     546:	04c9      	lsls	r1, r1, #19
     548:	0480      	lsls	r0, r0, #18
     54a:	0512      	lsls	r2, r2, #20
     54c:	50e2      	str	r2, [r4, r3]
     54e:	50e1      	str	r1, [r4, r3]
     550:	50e0      	str	r0, [r4, r3]
     552:	23be      	movs	r3, #190	; 0xbe
     554:	2218      	movs	r2, #24
     556:	4d2c      	ldr	r5, [pc, #176]	; (608 <vcore_init+0xe0>)
     558:	005b      	lsls	r3, r3, #1
     55a:	50ea      	str	r2, [r5, r3]
     55c:	3a09      	subs	r2, #9
     55e:	3304      	adds	r3, #4
     560:	50ea      	str	r2, [r5, r3]
     562:	2390      	movs	r3, #144	; 0x90
     564:	2280      	movs	r2, #128	; 0x80
     566:	019b      	lsls	r3, r3, #6
     568:	0452      	lsls	r2, r2, #17
     56a:	50e2      	str	r2, [r4, r3]
     56c:	2280      	movs	r2, #128	; 0x80
     56e:	0212      	lsls	r2, r2, #8
     570:	50e2      	str	r2, [r4, r3]
     572:	22fd      	movs	r2, #253	; 0xfd
     574:	4b25      	ldr	r3, [pc, #148]	; (60c <vcore_init+0xe4>)
     576:	681e      	ldr	r6, [r3, #0]
     578:	4032      	ands	r2, r6
     57a:	601a      	str	r2, [r3, #0]
     57c:	22fb      	movs	r2, #251	; 0xfb
     57e:	615f      	str	r7, [r3, #20]
     580:	681e      	ldr	r6, [r3, #0]
     582:	4032      	ands	r2, r6
     584:	601a      	str	r2, [r3, #0]
     586:	2204      	movs	r2, #4
     588:	4e21      	ldr	r6, [pc, #132]	; (610 <vcore_init+0xe8>)
     58a:	615a      	str	r2, [r3, #20]
     58c:	18ad      	adds	r5, r5, r2
     58e:	6030      	str	r0, [r6, #0]
     590:	c602      	stmia	r6!, {r1}
     592:	6fea      	ldr	r2, [r5, #124]	; 0x7c
     594:	4b1f      	ldr	r3, [pc, #124]	; (614 <vcore_init+0xec>)
     596:	4920      	ldr	r1, [pc, #128]	; (618 <vcore_init+0xf0>)
     598:	4013      	ands	r3, r2
     59a:	2280      	movs	r2, #128	; 0x80
     59c:	4313      	orrs	r3, r2
     59e:	67eb      	str	r3, [r5, #124]	; 0x7c
     5a0:	23e0      	movs	r3, #224	; 0xe0
     5a2:	4a1e      	ldr	r2, [pc, #120]	; (61c <vcore_init+0xf4>)
     5a4:	005b      	lsls	r3, r3, #1
     5a6:	58d0      	ldr	r0, [r2, r3]
     5a8:	4001      	ands	r1, r0
     5aa:	50d1      	str	r1, [r2, r3]
     5ac:	58d0      	ldr	r0, [r2, r3]
     5ae:	491c      	ldr	r1, [pc, #112]	; (620 <vcore_init+0xf8>)
     5b0:	4001      	ands	r1, r0
     5b2:	50d1      	str	r1, [r2, r3]
     5b4:	481b      	ldr	r0, [pc, #108]	; (624 <vcore_init+0xfc>)
     5b6:	1c3a      	adds	r2, r7, #0
     5b8:	2108      	movs	r1, #8
     5ba:	f000 ff1d 	bl	13f8 <Chip_IOCON_PinSetI2CMode>
     5be:	1c3a      	adds	r2, r7, #0
     5c0:	2107      	movs	r1, #7
     5c2:	4818      	ldr	r0, [pc, #96]	; (624 <vcore_init+0xfc>)
     5c4:	f000 ff18 	bl	13f8 <Chip_IOCON_PinSetI2CMode>
     5c8:	6fea      	ldr	r2, [r5, #124]	; 0x7c
     5ca:	4b17      	ldr	r3, [pc, #92]	; (628 <vcore_init+0x100>)
     5cc:	4013      	ands	r3, r2
     5ce:	67eb      	str	r3, [r5, #124]	; 0x7c
     5d0:	4d16      	ldr	r5, [pc, #88]	; (62c <vcore_init+0x104>)
     5d2:	1c28      	adds	r0, r5, #0
     5d4:	f000 fd30 	bl	1038 <Chip_I2C_Init>
     5d8:	2327      	movs	r3, #39	; 0x27
     5da:	1c28      	adds	r0, r5, #0
     5dc:	616b      	str	r3, [r5, #20]
     5de:	4914      	ldr	r1, [pc, #80]	; (630 <vcore_init+0x108>)
     5e0:	f001 f88a 	bl	16f8 <Chip_I2CM_SetBusSpeed>
     5e4:	231e      	movs	r3, #30
     5e6:	682a      	ldr	r2, [r5, #0]
     5e8:	4013      	ands	r3, r2
     5ea:	2201      	movs	r2, #1
     5ec:	4313      	orrs	r3, r2
     5ee:	602b      	str	r3, [r5, #0]
     5f0:	2380      	movs	r3, #128	; 0x80
     5f2:	005b      	lsls	r3, r3, #1
     5f4:	67f3      	str	r3, [r6, #124]	; 0x7c
     5f6:	2300      	movs	r3, #0
     5f8:	76a3      	strb	r3, [r4, #26]
     5fa:	7422      	strb	r2, [r4, #16]
     5fc:	7663      	strb	r3, [r4, #25]
     5fe:	76e2      	strb	r2, [r4, #27]
     600:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     602:	46c0      	nop			; (mov r8, r8)
     604:	10000000 	andne	r0, r0, r0
     608:	40048000 	andmi	r8, r4, r0
     60c:	a0004000 	andge	r4, r0, r0
     610:	e000e100 	and	lr, r0, r0, lsl #2
     614:	25efffff 	strbcs	pc, [pc, #4095]!	; 161b <Chip_IRC_SetFreq+0x4b>	; <UNPREDICTABLE>
     618:	01fff7ff 	ldrsheq	pc, [pc, #127]	; 69f <set_voltage+0x6b>	; <UNPREDICTABLE>
     61c:	4000c000 	andmi	ip, r0, r0
     620:	01ffefff 	ldrsheq	lr, [pc, #255]	; 727 <iap_readserialid+0x27>
     624:	40044000 	andmi	r4, r4, r0
     628:	25efff7f 	strbcs	pc, [pc, #3967]!	; 15af <RingBuffer_PopMult+0x65>	; <UNPREDICTABLE>
     62c:	40050000 	andmi	r0, r5, r0
     630:	000186a0 	andeq	r8, r1, r0, lsr #13

00000634 <set_voltage>:
     634:	b570      	push	{r4, r5, r6, lr}
     636:	1c0c      	adds	r4, r1, #0
     638:	2800      	cmp	r0, #0
     63a:	d027      	beq.n	68c <set_voltage+0x58>
     63c:	2801      	cmp	r0, #1
     63e:	d14c      	bne.n	6da <set_voltage+0xa6>
     640:	b20a      	sxth	r2, r1
     642:	23a0      	movs	r3, #160	; 0xa0
     644:	2100      	movs	r1, #0
     646:	061b      	lsls	r3, r3, #24
     648:	428a      	cmp	r2, r1
     64a:	da1c      	bge.n	686 <set_voltage+0x52>
     64c:	26fa      	movs	r6, #250	; 0xfa
     64e:	7419      	strb	r1, [r3, #16]
     650:	00b6      	lsls	r6, r6, #2
     652:	25a0      	movs	r5, #160	; 0xa0
     654:	062d      	lsls	r5, r5, #24
     656:	7e2b      	ldrb	r3, [r5, #24]
     658:	2b00      	cmp	r3, #0
     65a:	d004      	beq.n	666 <set_voltage+0x32>
     65c:	2301      	movs	r3, #1
     65e:	4a21      	ldr	r2, [pc, #132]	; (6e4 <set_voltage+0xb0>)
     660:	76ab      	strb	r3, [r5, #26]
     662:	8013      	strh	r3, [r2, #0]
     664:	e00b      	b.n	67e <set_voltage+0x4a>
     666:	2001      	movs	r0, #1
     668:	3e01      	subs	r6, #1
     66a:	f000 f979 	bl	960 <delay>
     66e:	2e00      	cmp	r6, #0
     670:	d1ef      	bne.n	652 <set_voltage+0x1e>
     672:	2301      	movs	r3, #1
     674:	2202      	movs	r2, #2
     676:	76ae      	strb	r6, [r5, #26]
     678:	742b      	strb	r3, [r5, #16]
     67a:	4b1a      	ldr	r3, [pc, #104]	; (6e4 <set_voltage+0xb0>)
     67c:	801a      	strh	r2, [r3, #0]
     67e:	218f      	movs	r1, #143	; 0x8f
     680:	2000      	movs	r0, #0
     682:	4021      	ands	r1, r4
     684:	e023      	b.n	6ce <set_voltage+0x9a>
     686:	7699      	strb	r1, [r3, #26]
     688:	7418      	strb	r0, [r3, #16]
     68a:	e026      	b.n	6da <set_voltage+0xa6>
     68c:	23a0      	movs	r3, #160	; 0xa0
     68e:	b20a      	sxth	r2, r1
     690:	061b      	lsls	r3, r3, #24
     692:	2a00      	cmp	r2, #0
     694:	da1e      	bge.n	6d4 <set_voltage+0xa0>
     696:	26fa      	movs	r6, #250	; 0xfa
     698:	76d8      	strb	r0, [r3, #27]
     69a:	00b6      	lsls	r6, r6, #2
     69c:	25a0      	movs	r5, #160	; 0xa0
     69e:	062d      	lsls	r5, r5, #24
     6a0:	7beb      	ldrb	r3, [r5, #15]
     6a2:	2b00      	cmp	r3, #0
     6a4:	d004      	beq.n	6b0 <set_voltage+0x7c>
     6a6:	2301      	movs	r3, #1
     6a8:	4a0e      	ldr	r2, [pc, #56]	; (6e4 <set_voltage+0xb0>)
     6aa:	766b      	strb	r3, [r5, #25]
     6ac:	8053      	strh	r3, [r2, #2]
     6ae:	e00b      	b.n	6c8 <set_voltage+0x94>
     6b0:	2001      	movs	r0, #1
     6b2:	3e01      	subs	r6, #1
     6b4:	f000 f954 	bl	960 <delay>
     6b8:	2e00      	cmp	r6, #0
     6ba:	d1ef      	bne.n	69c <set_voltage+0x68>
     6bc:	2301      	movs	r3, #1
     6be:	2202      	movs	r2, #2
     6c0:	766e      	strb	r6, [r5, #25]
     6c2:	76eb      	strb	r3, [r5, #27]
     6c4:	4b07      	ldr	r3, [pc, #28]	; (6e4 <set_voltage+0xb0>)
     6c6:	805a      	strh	r2, [r3, #2]
     6c8:	218f      	movs	r1, #143	; 0x8f
     6ca:	2001      	movs	r0, #1
     6cc:	4021      	ands	r1, r4
     6ce:	f7ff fee1 	bl	494 <ds4412_set_dac>
     6d2:	e002      	b.n	6da <set_voltage+0xa6>
     6d4:	2201      	movs	r2, #1
     6d6:	7658      	strb	r0, [r3, #25]
     6d8:	76da      	strb	r2, [r3, #27]
     6da:	2032      	movs	r0, #50	; 0x32
     6dc:	f000 f94c 	bl	978 <delayus>
     6e0:	2000      	movs	r0, #0
     6e2:	bd70      	pop	{r4, r5, r6, pc}
     6e4:	10000000 	andne	r0, r0, r0

000006e8 <get_pg_state>:
     6e8:	1c03      	adds	r3, r0, #0
     6ea:	2001      	movs	r0, #1
     6ec:	4283      	cmp	r3, r0
     6ee:	d803      	bhi.n	6f8 <get_pg_state+0x10>
     6f0:	1ac0      	subs	r0, r0, r3
     6f2:	4b02      	ldr	r3, [pc, #8]	; (6fc <get_pg_state+0x14>)
     6f4:	0040      	lsls	r0, r0, #1
     6f6:	5c18      	ldrb	r0, [r3, r0]
     6f8:	4770      	bx	lr
     6fa:	46c0      	nop			; (mov r8, r8)
     6fc:	10000000 	andne	r0, r0, r0

00000700 <iap_readserialid>:
     700:	233a      	movs	r3, #58	; 0x3a
     702:	b530      	push	{r4, r5, lr}
     704:	b08b      	sub	sp, #44	; 0x2c
     706:	9300      	str	r3, [sp, #0]
     708:	1c04      	adds	r4, r0, #0
     70a:	a905      	add	r1, sp, #20
     70c:	4668      	mov	r0, sp
     70e:	4b17      	ldr	r3, [pc, #92]	; (76c <iap_readserialid+0x6c>)
     710:	4798      	blx	r3
     712:	9d05      	ldr	r5, [sp, #20]
     714:	2001      	movs	r0, #1
     716:	2d00      	cmp	r5, #0
     718:	d126      	bne.n	768 <iap_readserialid+0x68>
     71a:	9b06      	ldr	r3, [sp, #24]
     71c:	1c20      	adds	r0, r4, #0
     71e:	0c1a      	lsrs	r2, r3, #16
     720:	0619      	lsls	r1, r3, #24
     722:	b29b      	uxth	r3, r3
     724:	0c09      	lsrs	r1, r1, #16
     726:	0a1b      	lsrs	r3, r3, #8
     728:	430b      	orrs	r3, r1
     72a:	0a11      	lsrs	r1, r2, #8
     72c:	0612      	lsls	r2, r2, #24
     72e:	0c12      	lsrs	r2, r2, #16
     730:	430a      	orrs	r2, r1
     732:	041b      	lsls	r3, r3, #16
     734:	4313      	orrs	r3, r2
     736:	a906      	add	r1, sp, #24
     738:	2204      	movs	r2, #4
     73a:	9306      	str	r3, [sp, #24]
     73c:	f001 f892 	bl	1864 <memcpy>
     740:	9b07      	ldr	r3, [sp, #28]
     742:	1d20      	adds	r0, r4, #4
     744:	0c1a      	lsrs	r2, r3, #16
     746:	0619      	lsls	r1, r3, #24
     748:	b29b      	uxth	r3, r3
     74a:	0c09      	lsrs	r1, r1, #16
     74c:	0a1b      	lsrs	r3, r3, #8
     74e:	430b      	orrs	r3, r1
     750:	0a11      	lsrs	r1, r2, #8
     752:	0612      	lsls	r2, r2, #24
     754:	0c12      	lsrs	r2, r2, #16
     756:	430a      	orrs	r2, r1
     758:	041b      	lsls	r3, r3, #16
     75a:	4313      	orrs	r3, r2
     75c:	a907      	add	r1, sp, #28
     75e:	2204      	movs	r2, #4
     760:	9307      	str	r3, [sp, #28]
     762:	f001 f87f 	bl	1864 <memcpy>
     766:	1c28      	adds	r0, r5, #0
     768:	b00b      	add	sp, #44	; 0x2c
     76a:	bd30      	pop	{r4, r5, pc}
     76c:	1fff1ff1 	svcne	0x00ff1ff1

00000770 <led_blink_12v_1f>:
     770:	21a0      	movs	r1, #160	; 0xa0
     772:	4b05      	ldr	r3, [pc, #20]	; (788 <led_blink_12v_1f+0x18>)
     774:	0609      	lsls	r1, r1, #24
     776:	781a      	ldrb	r2, [r3, #0]
     778:	2000      	movs	r0, #0
     77a:	2a00      	cmp	r2, #0
     77c:	d100      	bne.n	780 <led_blink_12v_1f+0x10>
     77e:	2001      	movs	r0, #1
     780:	43d2      	mvns	r2, r2
     782:	7308      	strb	r0, [r1, #12]
     784:	701a      	strb	r2, [r3, #0]
     786:	4770      	bx	lr
     788:	10000004 	andne	r0, r0, r4

0000078c <led_blink_12v_2t>:
     78c:	21a0      	movs	r1, #160	; 0xa0
     78e:	4b05      	ldr	r3, [pc, #20]	; (7a4 <led_blink_12v_2t+0x18>)
     790:	0609      	lsls	r1, r1, #24
     792:	781a      	ldrb	r2, [r3, #0]
     794:	2000      	movs	r0, #0
     796:	2a00      	cmp	r2, #0
     798:	d100      	bne.n	79c <led_blink_12v_2t+0x10>
     79a:	2001      	movs	r0, #1
     79c:	43d2      	mvns	r2, r2
     79e:	7248      	strb	r0, [r1, #9]
     7a0:	701a      	strb	r2, [r3, #0]
     7a2:	4770      	bx	lr
     7a4:	1000000c 	andne	r0, r0, ip

000007a8 <led_blink_12v_2f>:
     7a8:	21a0      	movs	r1, #160	; 0xa0
     7aa:	4b05      	ldr	r3, [pc, #20]	; (7c0 <led_blink_12v_2f+0x18>)
     7ac:	0609      	lsls	r1, r1, #24
     7ae:	781a      	ldrb	r2, [r3, #0]
     7b0:	2000      	movs	r0, #0
     7b2:	2a00      	cmp	r2, #0
     7b4:	d100      	bne.n	7b8 <led_blink_12v_2f+0x10>
     7b6:	2001      	movs	r0, #1
     7b8:	43d2      	mvns	r2, r2
     7ba:	7208      	strb	r0, [r1, #8]
     7bc:	701a      	strb	r2, [r3, #0]
     7be:	4770      	bx	lr
     7c0:	10000012 	andne	r0, r0, r2, lsl r0

000007c4 <led_blink_12v_1t>:
     7c4:	21a0      	movs	r1, #160	; 0xa0
     7c6:	4b05      	ldr	r3, [pc, #20]	; (7dc <led_blink_12v_1t+0x18>)
     7c8:	0609      	lsls	r1, r1, #24
     7ca:	781a      	ldrb	r2, [r3, #0]
     7cc:	2000      	movs	r0, #0
     7ce:	2a00      	cmp	r2, #0
     7d0:	d100      	bne.n	7d4 <led_blink_12v_1t+0x10>
     7d2:	2001      	movs	r0, #1
     7d4:	43d2      	mvns	r2, r2
     7d6:	7348      	strb	r0, [r1, #13]
     7d8:	701a      	strb	r2, [r3, #0]
     7da:	4770      	bx	lr
     7dc:	10000013 	andne	r0, r0, r3, lsl r0

000007e0 <led_init>:
     7e0:	b510      	push	{r4, lr}
     7e2:	238e      	movs	r3, #142	; 0x8e
     7e4:	24a0      	movs	r4, #160	; 0xa0
     7e6:	2280      	movs	r2, #128	; 0x80
     7e8:	0624      	lsls	r4, r4, #24
     7ea:	019b      	lsls	r3, r3, #6
     7ec:	0192      	lsls	r2, r2, #6
     7ee:	50e2      	str	r2, [r4, r3]
     7f0:	2280      	movs	r2, #128	; 0x80
     7f2:	0152      	lsls	r2, r2, #5
     7f4:	50e2      	str	r2, [r4, r3]
     7f6:	2280      	movs	r2, #128	; 0x80
     7f8:	0092      	lsls	r2, r2, #2
     7fa:	50e2      	str	r2, [r4, r3]
     7fc:	3a01      	subs	r2, #1
     7fe:	3aff      	subs	r2, #255	; 0xff
     800:	50e2      	str	r2, [r4, r3]
     802:	20fa      	movs	r0, #250	; 0xfa
     804:	2300      	movs	r3, #0
     806:	0080      	lsls	r0, r0, #2
     808:	7363      	strb	r3, [r4, #13]
     80a:	7323      	strb	r3, [r4, #12]
     80c:	7263      	strb	r3, [r4, #9]
     80e:	7223      	strb	r3, [r4, #8]
     810:	f000 f8a6 	bl	960 <delay>
     814:	2301      	movs	r3, #1
     816:	7363      	strb	r3, [r4, #13]
     818:	7323      	strb	r3, [r4, #12]
     81a:	7263      	strb	r3, [r4, #9]
     81c:	7223      	strb	r3, [r4, #8]
     81e:	bd10      	pop	{r4, pc}

00000820 <set_led_state>:
     820:	b570      	push	{r4, r5, r6, lr}
     822:	1e06      	subs	r6, r0, #0
     824:	d043      	beq.n	8ae <set_led_state+0x8e>
     826:	2801      	cmp	r0, #1
     828:	d000      	beq.n	82c <set_led_state+0xc>
     82a:	e07f      	b.n	92c <set_led_state+0x10c>
     82c:	4d40      	ldr	r5, [pc, #256]	; (930 <set_led_state+0x110>)
     82e:	4c41      	ldr	r4, [pc, #260]	; (934 <set_led_state+0x114>)
     830:	8029      	strh	r1, [r5, #0]
     832:	2302      	movs	r3, #2
     834:	070a      	lsls	r2, r1, #28
     836:	d509      	bpl.n	84c <set_led_state+0x2c>
     838:	21fa      	movs	r1, #250	; 0xfa
     83a:	6822      	ldr	r2, [r4, #0]
     83c:	2003      	movs	r0, #3
     83e:	4313      	orrs	r3, r2
     840:	0049      	lsls	r1, r1, #1
     842:	4a3d      	ldr	r2, [pc, #244]	; (938 <set_led_state+0x118>)
     844:	6023      	str	r3, [r4, #0]
     846:	f000 fb4b 	bl	ee0 <timer_set>
     84a:	e008      	b.n	85e <set_led_state+0x3e>
     84c:	6822      	ldr	r2, [r4, #0]
     84e:	2003      	movs	r0, #3
     850:	439a      	bics	r2, r3
     852:	6022      	str	r2, [r4, #0]
     854:	f000 fb54 	bl	f00 <timer_kill>
     858:	23a0      	movs	r3, #160	; 0xa0
     85a:	061b      	lsls	r3, r3, #24
     85c:	731e      	strb	r6, [r3, #12]
     85e:	882b      	ldrh	r3, [r5, #0]
     860:	2601      	movs	r6, #1
     862:	075b      	lsls	r3, r3, #29
     864:	d509      	bpl.n	87a <set_led_state+0x5a>
     866:	21fa      	movs	r1, #250	; 0xfa
     868:	6823      	ldr	r3, [r4, #0]
     86a:	2002      	movs	r0, #2
     86c:	431e      	orrs	r6, r3
     86e:	0049      	lsls	r1, r1, #1
     870:	4a32      	ldr	r2, [pc, #200]	; (93c <set_led_state+0x11c>)
     872:	6026      	str	r6, [r4, #0]
     874:	f000 fb34 	bl	ee0 <timer_set>
     878:	e008      	b.n	88c <set_led_state+0x6c>
     87a:	6823      	ldr	r3, [r4, #0]
     87c:	2002      	movs	r0, #2
     87e:	43b3      	bics	r3, r6
     880:	6023      	str	r3, [r4, #0]
     882:	f000 fb3d 	bl	f00 <timer_kill>
     886:	23a0      	movs	r3, #160	; 0xa0
     888:	061b      	lsls	r3, r3, #24
     88a:	735e      	strb	r6, [r3, #13]
     88c:	23a0      	movs	r3, #160	; 0xa0
     88e:	8829      	ldrh	r1, [r5, #0]
     890:	061b      	lsls	r3, r3, #24
     892:	2201      	movs	r2, #1
     894:	0788      	lsls	r0, r1, #30
     896:	d502      	bpl.n	89e <set_led_state+0x7e>
     898:	2000      	movs	r0, #0
     89a:	7318      	strb	r0, [r3, #12]
     89c:	e000      	b.n	8a0 <set_led_state+0x80>
     89e:	731a      	strb	r2, [r3, #12]
     8a0:	4211      	tst	r1, r2
     8a2:	d001      	beq.n	8a8 <set_led_state+0x88>
     8a4:	2200      	movs	r2, #0
     8a6:	e000      	b.n	8aa <set_led_state+0x8a>
     8a8:	2201      	movs	r2, #1
     8aa:	735a      	strb	r2, [r3, #13]
     8ac:	e03e      	b.n	92c <set_led_state+0x10c>
     8ae:	2308      	movs	r3, #8
     8b0:	4d1f      	ldr	r5, [pc, #124]	; (930 <set_led_state+0x110>)
     8b2:	4c20      	ldr	r4, [pc, #128]	; (934 <set_led_state+0x114>)
     8b4:	8069      	strh	r1, [r5, #2]
     8b6:	6822      	ldr	r2, [r4, #0]
     8b8:	4219      	tst	r1, r3
     8ba:	d008      	beq.n	8ce <set_led_state+0xae>
     8bc:	21fa      	movs	r1, #250	; 0xfa
     8be:	4313      	orrs	r3, r2
     8c0:	2005      	movs	r0, #5
     8c2:	0049      	lsls	r1, r1, #1
     8c4:	4a1e      	ldr	r2, [pc, #120]	; (940 <set_led_state+0x120>)
     8c6:	6023      	str	r3, [r4, #0]
     8c8:	f000 fb0a 	bl	ee0 <timer_set>
     8cc:	e008      	b.n	8e0 <set_led_state+0xc0>
     8ce:	439a      	bics	r2, r3
     8d0:	2005      	movs	r0, #5
     8d2:	6022      	str	r2, [r4, #0]
     8d4:	f000 fb14 	bl	f00 <timer_kill>
     8d8:	23a0      	movs	r3, #160	; 0xa0
     8da:	2201      	movs	r2, #1
     8dc:	061b      	lsls	r3, r3, #24
     8de:	721a      	strb	r2, [r3, #8]
     8e0:	2004      	movs	r0, #4
     8e2:	886b      	ldrh	r3, [r5, #2]
     8e4:	4203      	tst	r3, r0
     8e6:	d008      	beq.n	8fa <set_led_state+0xda>
     8e8:	21fa      	movs	r1, #250	; 0xfa
     8ea:	6823      	ldr	r3, [r4, #0]
     8ec:	0049      	lsls	r1, r1, #1
     8ee:	4303      	orrs	r3, r0
     8f0:	4a14      	ldr	r2, [pc, #80]	; (944 <set_led_state+0x124>)
     8f2:	6023      	str	r3, [r4, #0]
     8f4:	f000 faf4 	bl	ee0 <timer_set>
     8f8:	e008      	b.n	90c <set_led_state+0xec>
     8fa:	6823      	ldr	r3, [r4, #0]
     8fc:	4383      	bics	r3, r0
     8fe:	6023      	str	r3, [r4, #0]
     900:	f000 fafe 	bl	f00 <timer_kill>
     904:	23a0      	movs	r3, #160	; 0xa0
     906:	2201      	movs	r2, #1
     908:	061b      	lsls	r3, r3, #24
     90a:	725a      	strb	r2, [r3, #9]
     90c:	23a0      	movs	r3, #160	; 0xa0
     90e:	8869      	ldrh	r1, [r5, #2]
     910:	061b      	lsls	r3, r3, #24
     912:	2201      	movs	r2, #1
     914:	0788      	lsls	r0, r1, #30
     916:	d502      	bpl.n	91e <set_led_state+0xfe>
     918:	2000      	movs	r0, #0
     91a:	7218      	strb	r0, [r3, #8]
     91c:	e000      	b.n	920 <set_led_state+0x100>
     91e:	721a      	strb	r2, [r3, #8]
     920:	4211      	tst	r1, r2
     922:	d001      	beq.n	928 <set_led_state+0x108>
     924:	2200      	movs	r2, #0
     926:	e000      	b.n	92a <set_led_state+0x10a>
     928:	2201      	movs	r2, #1
     92a:	725a      	strb	r2, [r3, #9]
     92c:	bd70      	pop	{r4, r5, r6, pc}
     92e:	46c0      	nop			; (mov r8, r8)
     930:	1000000e 	andne	r0, r0, lr
     934:	10000008 	andne	r0, r0, r8
     938:	00000771 	andeq	r0, r0, r1, ror r7
     93c:	000007c5 	andeq	r0, r0, r5, asr #15
     940:	000007a9 	andeq	r0, r0, r9, lsr #15
     944:	0000078d 	andeq	r0, r0, sp, lsl #15

00000948 <get_led_state>:
     948:	2300      	movs	r3, #0
     94a:	2801      	cmp	r0, #1
     94c:	d804      	bhi.n	958 <get_led_state+0x10>
     94e:	3301      	adds	r3, #1
     950:	1a18      	subs	r0, r3, r0
     952:	4098      	lsls	r0, r3
     954:	4b01      	ldr	r3, [pc, #4]	; (95c <get_led_state+0x14>)
     956:	5ac3      	ldrh	r3, [r0, r3]
     958:	1c18      	adds	r0, r3, #0
     95a:	4770      	bx	lr
     95c:	1000000e 	andne	r0, r0, lr

00000960 <delay>:
     960:	2800      	cmp	r0, #0
     962:	d006      	beq.n	972 <delay+0x12>
     964:	4b03      	ldr	r3, [pc, #12]	; (974 <delay+0x14>)
     966:	3801      	subs	r0, #1
     968:	46c0      	nop			; (mov r8, r8)
     96a:	3b01      	subs	r3, #1
     96c:	2b00      	cmp	r3, #0
     96e:	d1fb      	bne.n	968 <delay+0x8>
     970:	e7f6      	b.n	960 <delay>
     972:	4770      	bx	lr
     974:	00000bb8 			; <UNDEFINED> instruction: 0x00000bb8

00000978 <delayus>:
     978:	2800      	cmp	r0, #0
     97a:	d004      	beq.n	986 <delayus+0xe>
     97c:	3801      	subs	r0, #1
     97e:	46c0      	nop			; (mov r8, r8)
     980:	46c0      	nop			; (mov r8, r8)
     982:	46c0      	nop			; (mov r8, r8)
     984:	e7f8      	b.n	978 <delayus>
     986:	4770      	bx	lr

00000988 <main>:
     988:	b5f0      	push	{r4, r5, r6, r7, lr}
     98a:	b087      	sub	sp, #28
     98c:	f000 fd40 	bl	1410 <SystemCoreClockUpdate>
     990:	f000 fb26 	bl	fe0 <Board_Init>
     994:	f7ff fdc8 	bl	528 <vcore_init>
     998:	f000 fa70 	bl	e7c <timer_init>
     99c:	f7ff ff20 	bl	7e0 <led_init>
     9a0:	f7ff fce0 	bl	364 <adc_init>
     9a4:	f000 f980 	bl	ca8 <uart_init>
     9a8:	2000      	movs	r0, #0
     9aa:	49b4      	ldr	r1, [pc, #720]	; (c7c <main+0x2f4>)
     9ac:	1c02      	adds	r2, r0, #0
     9ae:	f000 fa97 	bl	ee0 <timer_set>
     9b2:	21fa      	movs	r1, #250	; 0xfa
     9b4:	2001      	movs	r0, #1
     9b6:	0089      	lsls	r1, r1, #2
     9b8:	2200      	movs	r2, #0
     9ba:	f000 fa91 	bl	ee0 <timer_set>
     9be:	2400      	movs	r4, #0
     9c0:	2c01      	cmp	r4, #1
     9c2:	d100      	bne.n	9c6 <main+0x3e>
     9c4:	e0e1      	b.n	b8a <main+0x202>
     9c6:	f000 f9ef 	bl	da8 <uart_rxrb_cnt>
     9ca:	2827      	cmp	r0, #39	; 0x27
     9cc:	d800      	bhi.n	9d0 <main+0x48>
     9ce:	e0d7      	b.n	b80 <main+0x1f8>
     9d0:	4dab      	ldr	r5, [pc, #684]	; (c80 <main+0x2f8>)
     9d2:	2100      	movs	r1, #0
     9d4:	2228      	movs	r2, #40	; 0x28
     9d6:	1c28      	adds	r0, r5, #0
     9d8:	f000 ff48 	bl	186c <memset>
     9dc:	1c28      	adds	r0, r5, #0
     9de:	2128      	movs	r1, #40	; 0x28
     9e0:	f000 f9ea 	bl	db8 <uart_read>
     9e4:	2400      	movs	r4, #0
     9e6:	1e06      	subs	r6, r0, #0
     9e8:	2e28      	cmp	r6, #40	; 0x28
     9ea:	d000      	beq.n	9ee <main+0x66>
     9ec:	e0d5      	b.n	b9a <main+0x212>
     9ee:	1deb      	adds	r3, r5, #7
     9f0:	7fdf      	ldrb	r7, [r3, #31]
     9f2:	1c2b      	adds	r3, r5, #0
     9f4:	3308      	adds	r3, #8
     9f6:	7fdb      	ldrb	r3, [r3, #31]
     9f8:	023f      	lsls	r7, r7, #8
     9fa:	1da8      	adds	r0, r5, #6
     9fc:	2120      	movs	r1, #32
     9fe:	431f      	orrs	r7, r3
     a00:	f7ff fc98 	bl	334 <crc16>
     a04:	4287      	cmp	r7, r0
     a06:	d000      	beq.n	a0a <main+0x82>
     a08:	e0ba      	b.n	b80 <main+0x1f8>
     a0a:	1c20      	adds	r0, r4, #0
     a0c:	499b      	ldr	r1, [pc, #620]	; (c7c <main+0x2f4>)
     a0e:	1c22      	adds	r2, r4, #0
     a10:	f000 fa66 	bl	ee0 <timer_set>
     a14:	78ab      	ldrb	r3, [r5, #2]
     a16:	2b24      	cmp	r3, #36	; 0x24
     a18:	d100      	bne.n	a1c <main+0x94>
     a1a:	e097      	b.n	b4c <main+0x1c4>
     a1c:	d80c      	bhi.n	a38 <main+0xb0>
     a1e:	2b10      	cmp	r3, #16
     a20:	d018      	beq.n	a54 <main+0xcc>
     a22:	2b22      	cmp	r3, #34	; 0x22
     a24:	d000      	beq.n	a28 <main+0xa0>
     a26:	e0ab      	b.n	b80 <main+0x1f8>
     a28:	79a9      	ldrb	r1, [r5, #6]
     a2a:	79eb      	ldrb	r3, [r5, #7]
     a2c:	0209      	lsls	r1, r1, #8
     a2e:	7928      	ldrb	r0, [r5, #4]
     a30:	4319      	orrs	r1, r3
     a32:	f7ff fdff 	bl	634 <set_voltage>
     a36:	e0a3      	b.n	b80 <main+0x1f8>
     a38:	2b28      	cmp	r3, #40	; 0x28
     a3a:	d100      	bne.n	a3e <main+0xb6>
     a3c:	e091      	b.n	b62 <main+0x1da>
     a3e:	2b30      	cmp	r3, #48	; 0x30
     a40:	d000      	beq.n	a44 <main+0xbc>
     a42:	e09d      	b.n	b80 <main+0x1f8>
     a44:	4d8f      	ldr	r5, [pc, #572]	; (c84 <main+0x2fc>)
     a46:	1c32      	adds	r2, r6, #0
     a48:	1c28      	adds	r0, r5, #0
     a4a:	1c21      	adds	r1, r4, #0
     a4c:	f000 ff0e 	bl	186c <memset>
     a50:	1c2e      	adds	r6, r5, #0
     a52:	e02b      	b.n	aac <main+0x124>
     a54:	4d8b      	ldr	r5, [pc, #556]	; (c84 <main+0x2fc>)
     a56:	1c21      	adds	r1, r4, #0
     a58:	1c32      	adds	r2, r6, #0
     a5a:	1c28      	adds	r0, r5, #0
     a5c:	f000 ff06 	bl	186c <memset>
     a60:	1daf      	adds	r7, r5, #6
     a62:	4889      	ldr	r0, [pc, #548]	; (c88 <main+0x300>)
     a64:	f7ff fe4c 	bl	700 <iap_readserialid>
     a68:	4987      	ldr	r1, [pc, #540]	; (c88 <main+0x300>)
     a6a:	2208      	movs	r2, #8
     a6c:	1c38      	adds	r0, r7, #0
     a6e:	f000 fef9 	bl	1864 <memcpy>
     a72:	1c28      	adds	r0, r5, #0
     a74:	220f      	movs	r2, #15
     a76:	4985      	ldr	r1, [pc, #532]	; (c8c <main+0x304>)
     a78:	300e      	adds	r0, #14
     a7a:	f000 fef3 	bl	1864 <memcpy>
     a7e:	2343      	movs	r3, #67	; 0x43
     a80:	702b      	strb	r3, [r5, #0]
     a82:	330b      	adds	r3, #11
     a84:	706b      	strb	r3, [r5, #1]
     a86:	3b0e      	subs	r3, #14
     a88:	70ab      	strb	r3, [r5, #2]
     a8a:	3b3f      	subs	r3, #63	; 0x3f
     a8c:	712b      	strb	r3, [r5, #4]
     a8e:	716b      	strb	r3, [r5, #5]
     a90:	2120      	movs	r1, #32
     a92:	70ec      	strb	r4, [r5, #3]
     a94:	1c38      	adds	r0, r7, #0
     a96:	f7ff fc4d 	bl	334 <crc16>
     a9a:	1deb      	adds	r3, r5, #7
     a9c:	0a02      	lsrs	r2, r0, #8
     a9e:	77da      	strb	r2, [r3, #31]
     aa0:	1c2b      	adds	r3, r5, #0
     aa2:	3308      	adds	r3, #8
     aa4:	77d8      	strb	r0, [r3, #31]
     aa6:	1c31      	adds	r1, r6, #0
     aa8:	1c28      	adds	r0, r5, #0
     aaa:	e04c      	b.n	b46 <main+0x1be>
     aac:	4b78      	ldr	r3, [pc, #480]	; (c90 <main+0x308>)
     aae:	5ae2      	ldrh	r2, [r4, r3]
     ab0:	1933      	adds	r3, r6, r4
     ab2:	0a11      	lsrs	r1, r2, #8
     ab4:	3402      	adds	r4, #2
     ab6:	7199      	strb	r1, [r3, #6]
     ab8:	71da      	strb	r2, [r3, #7]
     aba:	2c0a      	cmp	r4, #10
     abc:	d1f6      	bne.n	aac <main+0x124>
     abe:	2400      	movs	r4, #0
     ac0:	2000      	movs	r0, #0
     ac2:	f7ff fe11 	bl	6e8 <get_pg_state>
     ac6:	1c20      	adds	r0, r4, #0
     ac8:	742c      	strb	r4, [r5, #16]
     aca:	f7ff fe0d 	bl	6e8 <get_pg_state>
     ace:	7468      	strb	r0, [r5, #17]
     ad0:	2001      	movs	r0, #1
     ad2:	f7ff fe09 	bl	6e8 <get_pg_state>
     ad6:	2001      	movs	r0, #1
     ad8:	74ac      	strb	r4, [r5, #18]
     ada:	f7ff fe05 	bl	6e8 <get_pg_state>
     ade:	74e8      	strb	r0, [r5, #19]
     ae0:	1c20      	adds	r0, r4, #0
     ae2:	f7ff ff31 	bl	948 <get_led_state>
     ae6:	0a00      	lsrs	r0, r0, #8
     ae8:	7528      	strb	r0, [r5, #20]
     aea:	1c20      	adds	r0, r4, #0
     aec:	f7ff ff2c 	bl	948 <get_led_state>
     af0:	7568      	strb	r0, [r5, #21]
     af2:	2001      	movs	r0, #1
     af4:	f7ff ff28 	bl	948 <get_led_state>
     af8:	0a00      	lsrs	r0, r0, #8
     afa:	75a8      	strb	r0, [r5, #22]
     afc:	2001      	movs	r0, #1
     afe:	f7ff ff23 	bl	948 <get_led_state>
     b02:	2101      	movs	r1, #1
     b04:	4b63      	ldr	r3, [pc, #396]	; (c94 <main+0x30c>)
     b06:	75e8      	strb	r0, [r5, #23]
     b08:	5659      	ldrsb	r1, [r3, r1]
     b0a:	881a      	ldrh	r2, [r3, #0]
     b0c:	7629      	strb	r1, [r5, #24]
     b0e:	766a      	strb	r2, [r5, #25]
     b10:	885a      	ldrh	r2, [r3, #2]
     b12:	78db      	ldrb	r3, [r3, #3]
     b14:	2120      	movs	r1, #32
     b16:	b25b      	sxtb	r3, r3
     b18:	76ab      	strb	r3, [r5, #26]
     b1a:	2343      	movs	r3, #67	; 0x43
     b1c:	702b      	strb	r3, [r5, #0]
     b1e:	330b      	adds	r3, #11
     b20:	706b      	strb	r3, [r5, #1]
     b22:	3b06      	subs	r3, #6
     b24:	70ab      	strb	r3, [r5, #2]
     b26:	3b47      	subs	r3, #71	; 0x47
     b28:	712b      	strb	r3, [r5, #4]
     b2a:	716b      	strb	r3, [r5, #5]
     b2c:	70ec      	strb	r4, [r5, #3]
     b2e:	1db0      	adds	r0, r6, #6
     b30:	76ea      	strb	r2, [r5, #27]
     b32:	f7ff fbff 	bl	334 <crc16>
     b36:	1df3      	adds	r3, r6, #7
     b38:	0a02      	lsrs	r2, r0, #8
     b3a:	77da      	strb	r2, [r3, #31]
     b3c:	1c33      	adds	r3, r6, #0
     b3e:	3308      	adds	r3, #8
     b40:	77d8      	strb	r0, [r3, #31]
     b42:	2128      	movs	r1, #40	; 0x28
     b44:	1c30      	adds	r0, r6, #0
     b46:	f000 f96b 	bl	e20 <uart_write>
     b4a:	e019      	b.n	b80 <main+0x1f8>
     b4c:	78eb      	ldrb	r3, [r5, #3]
     b4e:	2b00      	cmp	r3, #0
     b50:	d116      	bne.n	b80 <main+0x1f8>
     b52:	79a9      	ldrb	r1, [r5, #6]
     b54:	79eb      	ldrb	r3, [r5, #7]
     b56:	0209      	lsls	r1, r1, #8
     b58:	7928      	ldrb	r0, [r5, #4]
     b5a:	4319      	orrs	r1, r3
     b5c:	f7ff fe60 	bl	820 <set_led_state>
     b60:	e00e      	b.n	b80 <main+0x1f8>
     b62:	7929      	ldrb	r1, [r5, #4]
     b64:	79ab      	ldrb	r3, [r5, #6]
     b66:	79ea      	ldrb	r2, [r5, #7]
     b68:	2901      	cmp	r1, #1
     b6a:	d809      	bhi.n	b80 <main+0x1f8>
     b6c:	021b      	lsls	r3, r3, #8
     b6e:	4313      	orrs	r3, r2
     b70:	b21a      	sxth	r2, r3
     b72:	2a00      	cmp	r2, #0
     b74:	da04      	bge.n	b80 <main+0x1f8>
     b76:	051b      	lsls	r3, r3, #20
     b78:	4a46      	ldr	r2, [pc, #280]	; (c94 <main+0x30c>)
     b7a:	0049      	lsls	r1, r1, #1
     b7c:	0d1b      	lsrs	r3, r3, #20
     b7e:	528b      	strh	r3, [r1, r2]
     b80:	2000      	movs	r0, #0
     b82:	f000 f9c9 	bl	f18 <timer_istimeout>
     b86:	1c04      	adds	r4, r0, #0
     b88:	e007      	b.n	b9a <main+0x212>
     b8a:	f000 f90d 	bl	da8 <uart_rxrb_cnt>
     b8e:	2400      	movs	r4, #0
     b90:	2327      	movs	r3, #39	; 0x27
     b92:	4283      	cmp	r3, r0
     b94:	4164      	adcs	r4, r4
     b96:	b2e4      	uxtb	r4, r4
     b98:	bf30      	wfi
     b9a:	2001      	movs	r0, #1
     b9c:	f000 f9bc 	bl	f18 <timer_istimeout>
     ba0:	2800      	cmp	r0, #0
     ba2:	d100      	bne.n	ba6 <main+0x21e>
     ba4:	e70c      	b.n	9c0 <main+0x38>
     ba6:	4e3c      	ldr	r6, [pc, #240]	; (c98 <main+0x310>)
     ba8:	4d3c      	ldr	r5, [pc, #240]	; (c9c <main+0x314>)
     baa:	8831      	ldrh	r1, [r6, #0]
     bac:	2003      	movs	r0, #3
     bae:	3103      	adds	r1, #3
     bb0:	0049      	lsls	r1, r1, #1
     bb2:	1869      	adds	r1, r5, r1
     bb4:	f7ff fc42 	bl	43c <adc_read>
     bb8:	8831      	ldrh	r1, [r6, #0]
     bba:	2004      	movs	r0, #4
     bbc:	0049      	lsls	r1, r1, #1
     bbe:	1869      	adds	r1, r5, r1
     bc0:	f7ff fc3c 	bl	43c <adc_read>
     bc4:	8831      	ldrh	r1, [r6, #0]
     bc6:	2001      	movs	r0, #1
     bc8:	3106      	adds	r1, #6
     bca:	0049      	lsls	r1, r1, #1
     bcc:	1869      	adds	r1, r5, r1
     bce:	f7ff fc35 	bl	43c <adc_read>
     bd2:	8831      	ldrh	r1, [r6, #0]
     bd4:	2002      	movs	r0, #2
     bd6:	310c      	adds	r1, #12
     bd8:	0049      	lsls	r1, r1, #1
     bda:	1869      	adds	r1, r5, r1
     bdc:	f7ff fc2e 	bl	43c <adc_read>
     be0:	8831      	ldrh	r1, [r6, #0]
     be2:	2000      	movs	r0, #0
     be4:	3109      	adds	r1, #9
     be6:	0049      	lsls	r1, r1, #1
     be8:	1869      	adds	r1, r5, r1
     bea:	f7ff fc27 	bl	43c <adc_read>
     bee:	8832      	ldrh	r2, [r6, #0]
     bf0:	2300      	movs	r3, #0
     bf2:	3201      	adds	r2, #1
     bf4:	b292      	uxth	r2, r2
     bf6:	2a02      	cmp	r2, #2
     bf8:	d801      	bhi.n	bfe <main+0x276>
     bfa:	8032      	strh	r2, [r6, #0]
     bfc:	e000      	b.n	c00 <main+0x278>
     bfe:	8033      	strh	r3, [r6, #0]
     c00:	2200      	movs	r2, #0
     c02:	ae01      	add	r6, sp, #4
     c04:	9301      	str	r3, [sp, #4]
     c06:	6073      	str	r3, [r6, #4]
     c08:	60b3      	str	r3, [r6, #8]
     c0a:	60f3      	str	r3, [r6, #12]
     c0c:	6133      	str	r3, [r6, #16]
     c0e:	2300      	movs	r3, #0
     c10:	2106      	movs	r1, #6
     c12:	4359      	muls	r1, r3
     c14:	009f      	lsls	r7, r3, #2
     c16:	18a8      	adds	r0, r5, r2
     c18:	5a41      	ldrh	r1, [r0, r1]
     c1a:	59f0      	ldr	r0, [r6, r7]
     c1c:	3301      	adds	r3, #1
     c1e:	1809      	adds	r1, r1, r0
     c20:	51f1      	str	r1, [r6, r7]
     c22:	2b05      	cmp	r3, #5
     c24:	d1f4      	bne.n	c10 <main+0x288>
     c26:	3202      	adds	r2, #2
     c28:	2a06      	cmp	r2, #6
     c2a:	d1f0      	bne.n	c0e <main+0x286>
     c2c:	2700      	movs	r7, #0
     c2e:	007b      	lsls	r3, r7, #1
     c30:	58f0      	ldr	r0, [r6, r3]
     c32:	2103      	movs	r1, #3
     c34:	f000 fe25 	bl	1882 <__aeabi_uidiv>
     c38:	f000 fece 	bl	19d8 <__aeabi_ui2f>
     c3c:	f000 fe88 	bl	1950 <__aeabi_f2uiz>
     c40:	4d13      	ldr	r5, [pc, #76]	; (c90 <main+0x308>)
     c42:	5378      	strh	r0, [r7, r5]
     c44:	3702      	adds	r7, #2
     c46:	2f0a      	cmp	r7, #10
     c48:	d1f1      	bne.n	c2e <main+0x2a6>
     c4a:	4e12      	ldr	r6, [pc, #72]	; (c94 <main+0x30c>)
     c4c:	886a      	ldrh	r2, [r5, #2]
     c4e:	2102      	movs	r1, #2
     c50:	5e73      	ldrsh	r3, [r6, r1]
     c52:	429a      	cmp	r2, r3
     c54:	dc02      	bgt.n	c5c <main+0x2d4>
     c56:	2001      	movs	r0, #1
     c58:	f7ff fc32 	bl	4c0 <vcore_disable>
     c5c:	882a      	ldrh	r2, [r5, #0]
     c5e:	2100      	movs	r1, #0
     c60:	5e73      	ldrsh	r3, [r6, r1]
     c62:	429a      	cmp	r2, r3
     c64:	dc02      	bgt.n	c6c <main+0x2e4>
     c66:	2002      	movs	r0, #2
     c68:	f7ff fc2a 	bl	4c0 <vcore_disable>
     c6c:	21fa      	movs	r1, #250	; 0xfa
     c6e:	2001      	movs	r0, #1
     c70:	0089      	lsls	r1, r1, #2
     c72:	2200      	movs	r2, #0
     c74:	f000 f934 	bl	ee0 <timer_set>
     c78:	e6a2      	b.n	9c0 <main+0x38>
     c7a:	46c0      	nop			; (mov r8, r8)
     c7c:	00000bb8 			; <UNDEFINED> instruction: 0x00000bb8
     c80:	1000006e 	andne	r0, r0, lr, rrx
     c84:	1000001c 	andne	r0, r0, ip, lsl r0
     c88:	10000014 	andne	r0, r0, r4, lsl r0
     c8c:	00001a4a 	andeq	r1, r0, sl, asr #20
     c90:	10000062 	andne	r0, r0, r2, rrx
     c94:	10000096 	mulne	r0, r6, r0
     c98:	1000006c 	andne	r0, r0, ip, rrx
     c9c:	10000044 	andne	r0, r0, r4, asr #32

00000ca0 <SystemInit>:
     ca0:	b508      	push	{r3, lr}
     ca2:	f000 f9c3 	bl	102c <Board_SystemInit>
     ca6:	bd08      	pop	{r3, pc}

00000ca8 <uart_init>:
     ca8:	4a2b      	ldr	r2, [pc, #172]	; (d58 <uart_init+0xb0>)
     caa:	b570      	push	{r4, r5, r6, lr}
     cac:	1d14      	adds	r4, r2, #4
     cae:	6fe1      	ldr	r1, [r4, #124]	; 0x7c
     cb0:	4b2a      	ldr	r3, [pc, #168]	; (d5c <uart_init+0xb4>)
     cb2:	2501      	movs	r5, #1
     cb4:	400b      	ands	r3, r1
     cb6:	2180      	movs	r1, #128	; 0x80
     cb8:	2680      	movs	r6, #128	; 0x80
     cba:	4829      	ldr	r0, [pc, #164]	; (d60 <uart_init+0xb8>)
     cbc:	430b      	orrs	r3, r1
     cbe:	3141      	adds	r1, #65	; 0x41
     cc0:	67e3      	str	r3, [r4, #124]	; 0x7c
     cc2:	31ff      	adds	r1, #255	; 0xff
     cc4:	5843      	ldr	r3, [r0, r1]
     cc6:	0476      	lsls	r6, r6, #17
     cc8:	01db      	lsls	r3, r3, #7
     cca:	09db      	lsrs	r3, r3, #7
     ccc:	432b      	orrs	r3, r5
     cce:	5043      	str	r3, [r0, r1]
     cd0:	5843      	ldr	r3, [r0, r1]
     cd2:	3294      	adds	r2, #148	; 0x94
     cd4:	01db      	lsls	r3, r3, #7
     cd6:	09db      	lsrs	r3, r3, #7
     cd8:	4333      	orrs	r3, r6
     cda:	5043      	str	r3, [r0, r1]
     cdc:	39bd      	subs	r1, #189	; 0xbd
     cde:	6015      	str	r5, [r2, #0]
     ce0:	2000      	movs	r0, #0
     ce2:	39ff      	subs	r1, #255	; 0xff
     ce4:	f000 fb6a 	bl	13bc <Chip_SWM_MovablePinAssign>
     ce8:	1c28      	adds	r0, r5, #0
     cea:	2100      	movs	r1, #0
     cec:	f000 fb66 	bl	13bc <Chip_SWM_MovablePinAssign>
     cf0:	6fe2      	ldr	r2, [r4, #124]	; 0x7c
     cf2:	4b1c      	ldr	r3, [pc, #112]	; (d64 <uart_init+0xbc>)
     cf4:	2604      	movs	r6, #4
     cf6:	4013      	ands	r3, r2
     cf8:	67e3      	str	r3, [r4, #124]	; 0x7c
     cfa:	4c1b      	ldr	r4, [pc, #108]	; (d68 <uart_init+0xc0>)
     cfc:	1c20      	adds	r0, r4, #0
     cfe:	f000 fab1 	bl	1264 <Chip_UART_Init>
     d02:	20e1      	movs	r0, #225	; 0xe1
     d04:	6822      	ldr	r2, [r4, #0]
     d06:	4b19      	ldr	r3, [pc, #100]	; (d6c <uart_init+0xc4>)
     d08:	1c29      	adds	r1, r5, #0
     d0a:	4013      	ands	r3, r2
     d0c:	4333      	orrs	r3, r6
     d0e:	6023      	str	r3, [r4, #0]
     d10:	0340      	lsls	r0, r0, #13
     d12:	f000 fa6b 	bl	11ec <Chip_Clock_SetUSARTNBaseClockRate>
     d16:	21e1      	movs	r1, #225	; 0xe1
     d18:	1c20      	adds	r0, r4, #0
     d1a:	0249      	lsls	r1, r1, #9
     d1c:	f000 faea 	bl	12f4 <Chip_UART_SetBaud>
     d20:	6822      	ldr	r2, [r4, #0]
     d22:	4b13      	ldr	r3, [pc, #76]	; (d70 <uart_init+0xc8>)
     d24:	4913      	ldr	r1, [pc, #76]	; (d74 <uart_init+0xcc>)
     d26:	4013      	ands	r3, r2
     d28:	432b      	orrs	r3, r5
     d2a:	6023      	str	r3, [r4, #0]
     d2c:	6862      	ldr	r2, [r4, #4]
     d2e:	4b12      	ldr	r3, [pc, #72]	; (d78 <uart_init+0xd0>)
     d30:	4812      	ldr	r0, [pc, #72]	; (d7c <uart_init+0xd4>)
     d32:	4013      	ands	r3, r2
     d34:	6063      	str	r3, [r4, #4]
     d36:	1c2a      	adds	r2, r5, #0
     d38:	23a0      	movs	r3, #160	; 0xa0
     d3a:	f000 fb87 	bl	144c <RingBuffer_Init>
     d3e:	1c2a      	adds	r2, r5, #0
     d40:	490f      	ldr	r1, [pc, #60]	; (d80 <uart_init+0xd8>)
     d42:	23a0      	movs	r3, #160	; 0xa0
     d44:	480f      	ldr	r0, [pc, #60]	; (d84 <uart_init+0xdc>)
     d46:	f000 fb81 	bl	144c <RingBuffer_Init>
     d4a:	2208      	movs	r2, #8
     d4c:	4b0e      	ldr	r3, [pc, #56]	; (d88 <uart_init+0xe0>)
     d4e:	60e5      	str	r5, [r4, #12]
     d50:	6126      	str	r6, [r4, #16]
     d52:	601a      	str	r2, [r3, #0]
     d54:	bd70      	pop	{r4, r5, r6, pc}
     d56:	46c0      	nop			; (mov r8, r8)
     d58:	40048000 	andmi	r8, r4, r0
     d5c:	25efffff 	strbcs	pc, [pc, #4095]!	; 1d63 <config_tab+0x2bf>	; <UNPREDICTABLE>
     d60:	4000c000 	andmi	ip, r0, r0
     d64:	25efff7f 	strbcs	pc, [pc, #3967]!	; 1ceb <config_tab+0x247>	; <UNPREDICTABLE>
     d68:	40064000 	andmi	r4, r6, r0
     d6c:	00fcda01 	rscseq	sp, ip, r1, lsl #20
     d70:	00fcda7c 	rscseq	sp, ip, ip, ror sl
     d74:	1000009a 	mulne	r0, sl, r0
     d78:	00010306 	andeq	r0, r1, r6, lsl #6
     d7c:	1000013c 	andne	r0, r0, ip, lsr r1
     d80:	10000164 	andne	r0, r0, r4, ror #2
     d84:	10000150 	andne	r0, r0, r0, asr r1
     d88:	e000e100 	and	lr, r0, r0, lsl #2

00000d8c <UART0_IRQHandler>:
     d8c:	b508      	push	{r3, lr}
     d8e:	4803      	ldr	r0, [pc, #12]	; (d9c <UART0_IRQHandler+0x10>)
     d90:	4903      	ldr	r1, [pc, #12]	; (da0 <UART0_IRQHandler+0x14>)
     d92:	4a04      	ldr	r2, [pc, #16]	; (da4 <UART0_IRQHandler+0x18>)
     d94:	f000 fafc 	bl	1390 <Chip_UART_IRQRBHandler>
     d98:	bd08      	pop	{r3, pc}
     d9a:	46c0      	nop			; (mov r8, r8)
     d9c:	40064000 	andmi	r4, r6, r0
     da0:	1000013c 	andne	r0, r0, ip, lsr r1
     da4:	10000150 	andne	r0, r0, r0, asr r1

00000da8 <uart_rxrb_cnt>:
     da8:	4a02      	ldr	r2, [pc, #8]	; (db4 <uart_rxrb_cnt+0xc>)
     daa:	68d3      	ldr	r3, [r2, #12]
     dac:	6910      	ldr	r0, [r2, #16]
     dae:	1a18      	subs	r0, r3, r0
     db0:	4770      	bx	lr
     db2:	46c0      	nop			; (mov r8, r8)
     db4:	1000013c 	andne	r0, r0, ip, lsr r1

00000db8 <uart_read>:
     db8:	b5f0      	push	{r4, r5, r6, r7, lr}
     dba:	b085      	sub	sp, #20
     dbc:	ab02      	add	r3, sp, #8
     dbe:	1d9d      	adds	r5, r3, #6
     dc0:	2300      	movs	r3, #0
     dc2:	aa02      	add	r2, sp, #8
     dc4:	4e14      	ldr	r6, [pc, #80]	; (e18 <uart_read+0x60>)
     dc6:	1dd7      	adds	r7, r2, #7
     dc8:	9101      	str	r1, [sp, #4]
     dca:	702b      	strb	r3, [r5, #0]
     dcc:	703b      	strb	r3, [r7, #0]
     dce:	1c04      	adds	r4, r0, #0
     dd0:	3301      	adds	r3, #1
     dd2:	4812      	ldr	r0, [pc, #72]	; (e1c <uart_read+0x64>)
     dd4:	1c31      	adds	r1, r6, #0
     dd6:	1c2a      	adds	r2, r5, #0
     dd8:	f000 fad3 	bl	1382 <Chip_UART_ReadRB>
     ddc:	782b      	ldrb	r3, [r5, #0]
     dde:	2b43      	cmp	r3, #67	; 0x43
     de0:	d001      	beq.n	de6 <uart_read+0x2e>
     de2:	2000      	movs	r0, #0
     de4:	e016      	b.n	e14 <uart_read+0x5c>
     de6:	2301      	movs	r3, #1
     de8:	480c      	ldr	r0, [pc, #48]	; (e1c <uart_read+0x64>)
     dea:	1c31      	adds	r1, r6, #0
     dec:	1c3a      	adds	r2, r7, #0
     dee:	f000 fac8 	bl	1382 <Chip_UART_ReadRB>
     df2:	783b      	ldrb	r3, [r7, #0]
     df4:	2b4e      	cmp	r3, #78	; 0x4e
     df6:	d1f4      	bne.n	de2 <uart_read+0x2a>
     df8:	1e20      	subs	r0, r4, #0
     dfa:	d00a      	beq.n	e12 <uart_read+0x5a>
     dfc:	782a      	ldrb	r2, [r5, #0]
     dfe:	7063      	strb	r3, [r4, #1]
     e00:	9b01      	ldr	r3, [sp, #4]
     e02:	7022      	strb	r2, [r4, #0]
     e04:	3b02      	subs	r3, #2
     e06:	1ca2      	adds	r2, r4, #2
     e08:	4804      	ldr	r0, [pc, #16]	; (e1c <uart_read+0x64>)
     e0a:	1c31      	adds	r1, r6, #0
     e0c:	f000 fab9 	bl	1382 <Chip_UART_ReadRB>
     e10:	b280      	uxth	r0, r0
     e12:	3002      	adds	r0, #2
     e14:	b005      	add	sp, #20
     e16:	bdf0      	pop	{r4, r5, r6, r7, pc}
     e18:	1000013c 	andne	r0, r0, ip, lsr r1
     e1c:	40064000 	andmi	r4, r6, r0

00000e20 <uart_write>:
     e20:	b508      	push	{r3, lr}
     e22:	1e02      	subs	r2, r0, #0
     e24:	d004      	beq.n	e30 <uart_write+0x10>
     e26:	1c0b      	adds	r3, r1, #0
     e28:	4802      	ldr	r0, [pc, #8]	; (e34 <uart_write+0x14>)
     e2a:	4903      	ldr	r1, [pc, #12]	; (e38 <uart_write+0x18>)
     e2c:	f000 fa8e 	bl	134c <Chip_UART_SendRB>
     e30:	bd08      	pop	{r3, pc}
     e32:	46c0      	nop			; (mov r8, r8)
     e34:	40064000 	andmi	r4, r6, r0
     e38:	10000150 	andne	r0, r0, r0, asr r1

00000e3c <SysTick_Handler>:
     e3c:	b538      	push	{r3, r4, r5, lr}
     e3e:	4c0d      	ldr	r4, [pc, #52]	; (e74 <SysTick_Handler+0x38>)
     e40:	4d0d      	ldr	r5, [pc, #52]	; (e78 <SysTick_Handler+0x3c>)
     e42:	1f23      	subs	r3, r4, #4
     e44:	781b      	ldrb	r3, [r3, #0]
     e46:	2b00      	cmp	r3, #0
     e48:	d00f      	beq.n	e6a <SysTick_Handler+0x2e>
     e4a:	6823      	ldr	r3, [r4, #0]
     e4c:	2b00      	cmp	r3, #0
     e4e:	d00c      	beq.n	e6a <SysTick_Handler+0x2e>
     e50:	3b01      	subs	r3, #1
     e52:	6023      	str	r3, [r4, #0]
     e54:	2b00      	cmp	r3, #0
     e56:	d108      	bne.n	e6a <SysTick_Handler+0x2e>
     e58:	68a3      	ldr	r3, [r4, #8]
     e5a:	2b00      	cmp	r3, #0
     e5c:	d001      	beq.n	e62 <SysTick_Handler+0x26>
     e5e:	4798      	blx	r3
     e60:	e001      	b.n	e66 <SysTick_Handler+0x2a>
     e62:	2301      	movs	r3, #1
     e64:	7323      	strb	r3, [r4, #12]
     e66:	6863      	ldr	r3, [r4, #4]
     e68:	6023      	str	r3, [r4, #0]
     e6a:	3414      	adds	r4, #20
     e6c:	42ac      	cmp	r4, r5
     e6e:	d1e8      	bne.n	e42 <SysTick_Handler+0x6>
     e70:	bd38      	pop	{r3, r4, r5, pc}
     e72:	46c0      	nop			; (mov r8, r8)
     e74:	1000020c 	andne	r0, r0, ip, lsl #4
     e78:	100002ac 	andne	r0, r0, ip, lsr #5

00000e7c <timer_init>:
     e7c:	b510      	push	{r4, lr}
     e7e:	4b12      	ldr	r3, [pc, #72]	; (ec8 <timer_init+0x4c>)
     e80:	4a12      	ldr	r2, [pc, #72]	; (ecc <timer_init+0x50>)
     e82:	2400      	movs	r4, #0
     e84:	1f19      	subs	r1, r3, #4
     e86:	700c      	strb	r4, [r1, #0]
     e88:	601c      	str	r4, [r3, #0]
     e8a:	605c      	str	r4, [r3, #4]
     e8c:	609c      	str	r4, [r3, #8]
     e8e:	731c      	strb	r4, [r3, #12]
     e90:	3314      	adds	r3, #20
     e92:	4293      	cmp	r3, r2
     e94:	d1f5      	bne.n	e82 <timer_init+0x6>
     e96:	21fa      	movs	r1, #250	; 0xfa
     e98:	4b0d      	ldr	r3, [pc, #52]	; (ed0 <timer_init+0x54>)
     e9a:	0089      	lsls	r1, r1, #2
     e9c:	6818      	ldr	r0, [r3, #0]
     e9e:	f000 fcf0 	bl	1882 <__aeabi_uidiv>
     ea2:	4b0c      	ldr	r3, [pc, #48]	; (ed4 <timer_init+0x58>)
     ea4:	3801      	subs	r0, #1
     ea6:	4298      	cmp	r0, r3
     ea8:	d80c      	bhi.n	ec4 <timer_init+0x48>
     eaa:	4a0b      	ldr	r2, [pc, #44]	; (ed8 <timer_init+0x5c>)
     eac:	490b      	ldr	r1, [pc, #44]	; (edc <timer_init+0x60>)
     eae:	6050      	str	r0, [r2, #4]
     eb0:	20c0      	movs	r0, #192	; 0xc0
     eb2:	6a0b      	ldr	r3, [r1, #32]
     eb4:	0600      	lsls	r0, r0, #24
     eb6:	021b      	lsls	r3, r3, #8
     eb8:	0a1b      	lsrs	r3, r3, #8
     eba:	4303      	orrs	r3, r0
     ebc:	620b      	str	r3, [r1, #32]
     ebe:	2307      	movs	r3, #7
     ec0:	6094      	str	r4, [r2, #8]
     ec2:	6013      	str	r3, [r2, #0]
     ec4:	bd10      	pop	{r4, pc}
     ec6:	46c0      	nop			; (mov r8, r8)
     ec8:	1000020c 	andne	r0, r0, ip, lsl #4
     ecc:	100002ac 	andne	r0, r0, ip, lsr #5
     ed0:	100002a8 	andne	r0, r0, r8, lsr #5
     ed4:	00ffffff 	ldrshteq	pc, [pc], #255	; <UNPREDICTABLE>
     ed8:	e000e010 	and	lr, r0, r0, lsl r0
     edc:	e000ed00 	and	lr, r0, r0, lsl #26

00000ee0 <timer_set>:
     ee0:	2314      	movs	r3, #20
     ee2:	4358      	muls	r0, r3
     ee4:	b510      	push	{r4, lr}
     ee6:	4c05      	ldr	r4, [pc, #20]	; (efc <timer_set+0x1c>)
     ee8:	3b13      	subs	r3, #19
     eea:	5503      	strb	r3, [r0, r4]
     eec:	2300      	movs	r3, #0
     eee:	1820      	adds	r0, r4, r0
     ef0:	6041      	str	r1, [r0, #4]
     ef2:	6081      	str	r1, [r0, #8]
     ef4:	60c2      	str	r2, [r0, #12]
     ef6:	7403      	strb	r3, [r0, #16]
     ef8:	bd10      	pop	{r4, pc}
     efa:	46c0      	nop			; (mov r8, r8)
     efc:	10000208 	andne	r0, r0, r8, lsl #4

00000f00 <timer_kill>:
     f00:	2314      	movs	r3, #20
     f02:	4358      	muls	r0, r3
     f04:	4a03      	ldr	r2, [pc, #12]	; (f14 <timer_kill+0x14>)
     f06:	5c83      	ldrb	r3, [r0, r2]
     f08:	2b00      	cmp	r3, #0
     f0a:	d001      	beq.n	f10 <timer_kill+0x10>
     f0c:	2300      	movs	r3, #0
     f0e:	5483      	strb	r3, [r0, r2]
     f10:	4770      	bx	lr
     f12:	46c0      	nop			; (mov r8, r8)
     f14:	10000208 	andne	r0, r0, r8, lsl #4

00000f18 <timer_istimeout>:
     f18:	2214      	movs	r2, #20
     f1a:	1c13      	adds	r3, r2, #0
     f1c:	4343      	muls	r3, r0
     f1e:	4903      	ldr	r1, [pc, #12]	; (f2c <timer_istimeout+0x14>)
     f20:	5c58      	ldrb	r0, [r3, r1]
     f22:	2800      	cmp	r0, #0
     f24:	d001      	beq.n	f2a <timer_istimeout+0x12>
     f26:	18cb      	adds	r3, r1, r3
     f28:	7c18      	ldrb	r0, [r3, #16]
     f2a:	4770      	bx	lr
     f2c:	10000208 	andne	r0, r0, r8, lsl #4

00000f30 <Board_Debug_Init>:
     f30:	4a23      	ldr	r2, [pc, #140]	; (fc0 <Board_Debug_Init+0x90>)
     f32:	b538      	push	{r3, r4, r5, lr}
     f34:	1d14      	adds	r4, r2, #4
     f36:	6fe1      	ldr	r1, [r4, #124]	; 0x7c
     f38:	4b22      	ldr	r3, [pc, #136]	; (fc4 <Board_Debug_Init+0x94>)
     f3a:	2580      	movs	r5, #128	; 0x80
     f3c:	400b      	ands	r3, r1
     f3e:	2180      	movs	r1, #128	; 0x80
     f40:	4821      	ldr	r0, [pc, #132]	; (fc8 <Board_Debug_Init+0x98>)
     f42:	430b      	orrs	r3, r1
     f44:	3141      	adds	r1, #65	; 0x41
     f46:	67e3      	str	r3, [r4, #124]	; 0x7c
     f48:	31ff      	adds	r1, #255	; 0xff
     f4a:	5843      	ldr	r3, [r0, r1]
     f4c:	03ad      	lsls	r5, r5, #14
     f4e:	01db      	lsls	r3, r3, #7
     f50:	09db      	lsrs	r3, r3, #7
     f52:	432b      	orrs	r3, r5
     f54:	2580      	movs	r5, #128	; 0x80
     f56:	5043      	str	r3, [r0, r1]
     f58:	5843      	ldr	r3, [r0, r1]
     f5a:	03ed      	lsls	r5, r5, #15
     f5c:	01db      	lsls	r3, r3, #7
     f5e:	09db      	lsrs	r3, r3, #7
     f60:	432b      	orrs	r3, r5
     f62:	5043      	str	r3, [r0, r1]
     f64:	2501      	movs	r5, #1
     f66:	2011      	movs	r0, #17
     f68:	3294      	adds	r2, #148	; 0x94
     f6a:	6015      	str	r5, [r2, #0]
     f6c:	1c01      	adds	r1, r0, #0
     f6e:	f000 fa25 	bl	13bc <Chip_SWM_MovablePinAssign>
     f72:	2012      	movs	r0, #18
     f74:	1c01      	adds	r1, r0, #0
     f76:	f000 fa21 	bl	13bc <Chip_SWM_MovablePinAssign>
     f7a:	6fe2      	ldr	r2, [r4, #124]	; 0x7c
     f7c:	4b13      	ldr	r3, [pc, #76]	; (fcc <Board_Debug_Init+0x9c>)
     f7e:	4013      	ands	r3, r2
     f80:	67e3      	str	r3, [r4, #124]	; 0x7c
     f82:	4c13      	ldr	r4, [pc, #76]	; (fd0 <Board_Debug_Init+0xa0>)
     f84:	1c20      	adds	r0, r4, #0
     f86:	f000 f96d 	bl	1264 <Chip_UART_Init>
     f8a:	6822      	ldr	r2, [r4, #0]
     f8c:	4b11      	ldr	r3, [pc, #68]	; (fd4 <Board_Debug_Init+0xa4>)
     f8e:	20e1      	movs	r0, #225	; 0xe1
     f90:	4013      	ands	r3, r2
     f92:	2204      	movs	r2, #4
     f94:	4313      	orrs	r3, r2
     f96:	6023      	str	r3, [r4, #0]
     f98:	1c29      	adds	r1, r5, #0
     f9a:	0340      	lsls	r0, r0, #13
     f9c:	f000 f926 	bl	11ec <Chip_Clock_SetUSARTNBaseClockRate>
     fa0:	21e1      	movs	r1, #225	; 0xe1
     fa2:	1c20      	adds	r0, r4, #0
     fa4:	0249      	lsls	r1, r1, #9
     fa6:	f000 f9a5 	bl	12f4 <Chip_UART_SetBaud>
     faa:	6821      	ldr	r1, [r4, #0]
     fac:	4b0a      	ldr	r3, [pc, #40]	; (fd8 <Board_Debug_Init+0xa8>)
     fae:	4019      	ands	r1, r3
     fb0:	4329      	orrs	r1, r5
     fb2:	6021      	str	r1, [r4, #0]
     fb4:	6862      	ldr	r2, [r4, #4]
     fb6:	4b09      	ldr	r3, [pc, #36]	; (fdc <Board_Debug_Init+0xac>)
     fb8:	4013      	ands	r3, r2
     fba:	6063      	str	r3, [r4, #4]
     fbc:	bd38      	pop	{r3, r4, r5, pc}
     fbe:	46c0      	nop			; (mov r8, r8)
     fc0:	40048000 	andmi	r8, r4, r0
     fc4:	25efffff 	strbcs	pc, [pc, #4095]!	; 1fcb <__exidx_end+0x1d3>	; <UNPREDICTABLE>
     fc8:	4000c000 	andmi	ip, r0, r0
     fcc:	25efff7f 	strbcs	pc, [pc, #3967]!	; 1f53 <__exidx_end+0x15b>	; <UNPREDICTABLE>
     fd0:	40068000 	andmi	r8, r6, r0
     fd4:	00fcda01 	rscseq	sp, ip, r1, lsl #20
     fd8:	00fcda7c 	rscseq	sp, ip, ip, ror sl
     fdc:	00010306 	andeq	r0, r1, r6, lsl #6

00000fe0 <Board_Init>:
     fe0:	b510      	push	{r4, lr}
     fe2:	24a0      	movs	r4, #160	; 0xa0
     fe4:	0624      	lsls	r4, r4, #24
     fe6:	f7ff ffa3 	bl	f30 <Board_Debug_Init>
     fea:	1c20      	adds	r0, r4, #0
     fec:	f000 fa18 	bl	1420 <Chip_GPIO_Init>
     ff0:	228e      	movs	r2, #142	; 0x8e
     ff2:	2380      	movs	r3, #128	; 0x80
     ff4:	0192      	lsls	r2, r2, #6
     ff6:	029b      	lsls	r3, r3, #10
     ff8:	2180      	movs	r1, #128	; 0x80
     ffa:	50a3      	str	r3, [r4, r2]
     ffc:	2301      	movs	r3, #1
     ffe:	0249      	lsls	r1, r1, #9
    1000:	7463      	strb	r3, [r4, #17]
    1002:	50a1      	str	r1, [r4, r2]
    1004:	2180      	movs	r1, #128	; 0x80
    1006:	0509      	lsls	r1, r1, #20
    1008:	7423      	strb	r3, [r4, #16]
    100a:	50a1      	str	r1, [r4, r2]
    100c:	76e3      	strb	r3, [r4, #27]
    100e:	bd10      	pop	{r4, pc}

00001010 <Board_SetupMuxing>:
    1010:	4a04      	ldr	r2, [pc, #16]	; (1024 <Board_SetupMuxing+0x14>)
    1012:	4b05      	ldr	r3, [pc, #20]	; (1028 <Board_SetupMuxing+0x18>)
    1014:	6fd1      	ldr	r1, [r2, #124]	; 0x7c
    1016:	400b      	ands	r3, r1
    1018:	2180      	movs	r1, #128	; 0x80
    101a:	02c9      	lsls	r1, r1, #11
    101c:	430b      	orrs	r3, r1
    101e:	67d3      	str	r3, [r2, #124]	; 0x7c
    1020:	4770      	bx	lr
    1022:	46c0      	nop			; (mov r8, r8)
    1024:	40048004 	andmi	r8, r4, r4
    1028:	25efffff 	strbcs	pc, [pc, #4095]!	; 202f <__exidx_end+0x237>	; <UNPREDICTABLE>

0000102c <Board_SystemInit>:
    102c:	b508      	push	{r3, lr}
    102e:	f7ff ffef 	bl	1010 <Board_SetupMuxing>
    1032:	f000 fa01 	bl	1438 <Chip_SetupIrcClocking>
    1036:	bd08      	pop	{r3, pc}

00001038 <Chip_I2C_Init>:
    1038:	b530      	push	{r4, r5, lr}
    103a:	4c18      	ldr	r4, [pc, #96]	; (109c <Chip_I2C_Init+0x64>)
    103c:	2216      	movs	r2, #22
    103e:	42a0      	cmp	r0, r4
    1040:	d008      	beq.n	1054 <Chip_I2C_Init+0x1c>
    1042:	4b17      	ldr	r3, [pc, #92]	; (10a0 <Chip_I2C_Init+0x68>)
    1044:	3201      	adds	r2, #1
    1046:	4298      	cmp	r0, r3
    1048:	d004      	beq.n	1054 <Chip_I2C_Init+0x1c>
    104a:	4b16      	ldr	r3, [pc, #88]	; (10a4 <Chip_I2C_Init+0x6c>)
    104c:	3a02      	subs	r2, #2
    104e:	4298      	cmp	r0, r3
    1050:	d000      	beq.n	1054 <Chip_I2C_Init+0x1c>
    1052:	3a10      	subs	r2, #16
    1054:	2101      	movs	r1, #1
    1056:	4091      	lsls	r1, r2
    1058:	4d13      	ldr	r5, [pc, #76]	; (10a8 <Chip_I2C_Init+0x70>)
    105a:	4a14      	ldr	r2, [pc, #80]	; (10ac <Chip_I2C_Init+0x74>)
    105c:	6feb      	ldr	r3, [r5, #124]	; 0x7c
    105e:	4013      	ands	r3, r2
    1060:	430b      	orrs	r3, r1
    1062:	67eb      	str	r3, [r5, #124]	; 0x7c
    1064:	220f      	movs	r2, #15
    1066:	42a0      	cmp	r0, r4
    1068:	d008      	beq.n	107c <Chip_I2C_Init+0x44>
    106a:	4b0d      	ldr	r3, [pc, #52]	; (10a0 <Chip_I2C_Init+0x68>)
    106c:	3201      	adds	r2, #1
    106e:	4298      	cmp	r0, r3
    1070:	d004      	beq.n	107c <Chip_I2C_Init+0x44>
    1072:	4b0c      	ldr	r3, [pc, #48]	; (10a4 <Chip_I2C_Init+0x6c>)
    1074:	3a02      	subs	r2, #2
    1076:	4298      	cmp	r0, r3
    1078:	d000      	beq.n	107c <Chip_I2C_Init+0x44>
    107a:	3a08      	subs	r2, #8
    107c:	2301      	movs	r3, #1
    107e:	4093      	lsls	r3, r2
    1080:	1c18      	adds	r0, r3, #0
    1082:	490b      	ldr	r1, [pc, #44]	; (10b0 <Chip_I2C_Init+0x78>)
    1084:	4b0b      	ldr	r3, [pc, #44]	; (10b4 <Chip_I2C_Init+0x7c>)
    1086:	684c      	ldr	r4, [r1, #4]
    1088:	4303      	orrs	r3, r0
    108a:	439c      	bics	r4, r3
    108c:	604c      	str	r4, [r1, #4]
    108e:	684b      	ldr	r3, [r1, #4]
    1090:	4a09      	ldr	r2, [pc, #36]	; (10b8 <Chip_I2C_Init+0x80>)
    1092:	4013      	ands	r3, r2
    1094:	4303      	orrs	r3, r0
    1096:	604b      	str	r3, [r1, #4]
    1098:	bd30      	pop	{r4, r5, pc}
    109a:	46c0      	nop			; (mov r8, r8)
    109c:	40070000 	andmi	r0, r7, r0
    10a0:	40074000 	andmi	r4, r7, r0
    10a4:	40054000 	andmi	r4, r5, r0
    10a8:	40048004 	andmi	r8, r4, r4
    10ac:	25efffff 	strbcs	pc, [pc, #4095]!	; 20b3 <__exidx_end+0x2bb>	; <UNPREDICTABLE>
    10b0:	40048000 	andmi	r8, r4, r0
    10b4:	fffe2000 			; <UNDEFINED> instruction: 0xfffe2000
    10b8:	0001dfff 	strdeq	sp, [r1], -pc	; <UNPREDICTABLE>

000010bc <Chip_Clock_SetSystemPLLSource>:
    10bc:	2200      	movs	r2, #0
    10be:	4b03      	ldr	r3, [pc, #12]	; (10cc <Chip_Clock_SetSystemPLLSource+0x10>)
    10c0:	6418      	str	r0, [r3, #64]	; 0x40
    10c2:	645a      	str	r2, [r3, #68]	; 0x44
    10c4:	3201      	adds	r2, #1
    10c6:	645a      	str	r2, [r3, #68]	; 0x44
    10c8:	4770      	bx	lr
    10ca:	46c0      	nop			; (mov r8, r8)
    10cc:	40048000 	andmi	r8, r4, r0

000010d0 <Chip_Clock_SetMainClockSource>:
    10d0:	2200      	movs	r2, #0
    10d2:	4b03      	ldr	r3, [pc, #12]	; (10e0 <Chip_Clock_SetMainClockSource+0x10>)
    10d4:	6718      	str	r0, [r3, #112]	; 0x70
    10d6:	675a      	str	r2, [r3, #116]	; 0x74
    10d8:	3201      	adds	r2, #1
    10da:	675a      	str	r2, [r3, #116]	; 0x74
    10dc:	4770      	bx	lr
    10de:	46c0      	nop			; (mov r8, r8)
    10e0:	40048000 	andmi	r8, r4, r0

000010e4 <Chip_Clock_GetWDTOSCRate>:
    10e4:	b508      	push	{r3, lr}
    10e6:	4b07      	ldr	r3, [pc, #28]	; (1104 <Chip_Clock_GetWDTOSCRate+0x20>)
    10e8:	6a59      	ldr	r1, [r3, #36]	; 0x24
    10ea:	231f      	movs	r3, #31
    10ec:	05ca      	lsls	r2, r1, #23
    10ee:	0f12      	lsrs	r2, r2, #28
    10f0:	4019      	ands	r1, r3
    10f2:	4b05      	ldr	r3, [pc, #20]	; (1108 <Chip_Clock_GetWDTOSCRate+0x24>)
    10f4:	0092      	lsls	r2, r2, #2
    10f6:	3101      	adds	r1, #1
    10f8:	0049      	lsls	r1, r1, #1
    10fa:	58d0      	ldr	r0, [r2, r3]
    10fc:	f000 fbc1 	bl	1882 <__aeabi_uidiv>
    1100:	bd08      	pop	{r3, pc}
    1102:	46c0      	nop			; (mov r8, r8)
    1104:	40048000 	andmi	r8, r4, r0
    1108:	00001a64 	andeq	r1, r0, r4, ror #20

0000110c <Chip_Clock_GetSystemPLLInClockRate>:
    110c:	4b08      	ldr	r3, [pc, #32]	; (1130 <Chip_Clock_GetSystemPLLInClockRate+0x24>)
    110e:	6c1a      	ldr	r2, [r3, #64]	; 0x40
    1110:	2303      	movs	r3, #3
    1112:	4013      	ands	r3, r2
    1114:	2b01      	cmp	r3, #1
    1116:	d006      	beq.n	1126 <Chip_Clock_GetSystemPLLInClockRate+0x1a>
    1118:	2b03      	cmp	r3, #3
    111a:	d006      	beq.n	112a <Chip_Clock_GetSystemPLLInClockRate+0x1e>
    111c:	2000      	movs	r0, #0
    111e:	2b00      	cmp	r3, #0
    1120:	d105      	bne.n	112e <Chip_Clock_GetSystemPLLInClockRate+0x22>
    1122:	4804      	ldr	r0, [pc, #16]	; (1134 <Chip_Clock_GetSystemPLLInClockRate+0x28>)
    1124:	e003      	b.n	112e <Chip_Clock_GetSystemPLLInClockRate+0x22>
    1126:	4b04      	ldr	r3, [pc, #16]	; (1138 <Chip_Clock_GetSystemPLLInClockRate+0x2c>)
    1128:	e000      	b.n	112c <Chip_Clock_GetSystemPLLInClockRate+0x20>
    112a:	4b04      	ldr	r3, [pc, #16]	; (113c <Chip_Clock_GetSystemPLLInClockRate+0x30>)
    112c:	6818      	ldr	r0, [r3, #0]
    112e:	4770      	bx	lr
    1130:	40048000 	andmi	r8, r4, r0
    1134:	00b71b00 	adcseq	r1, r7, r0, lsl #22
    1138:	00001a5c 	andeq	r1, r0, ip, asr sl
    113c:	00001a60 	andeq	r1, r0, r0, ror #20

00001140 <Chip_Clock_GetSystemPLLOutClockRate>:
    1140:	4b04      	ldr	r3, [pc, #16]	; (1154 <Chip_Clock_GetSystemPLLOutClockRate+0x14>)
    1142:	b510      	push	{r4, lr}
    1144:	689c      	ldr	r4, [r3, #8]
    1146:	f7ff ffe1 	bl	110c <Chip_Clock_GetSystemPLLInClockRate>
    114a:	231f      	movs	r3, #31
    114c:	4023      	ands	r3, r4
    114e:	3301      	adds	r3, #1
    1150:	4358      	muls	r0, r3
    1152:	bd10      	pop	{r4, pc}
    1154:	40048000 	andmi	r8, r4, r0

00001158 <Chip_Clock_GetMainClockRate>:
    1158:	b508      	push	{r3, lr}
    115a:	4b0a      	ldr	r3, [pc, #40]	; (1184 <Chip_Clock_GetMainClockRate+0x2c>)
    115c:	6f1a      	ldr	r2, [r3, #112]	; 0x70
    115e:	2303      	movs	r3, #3
    1160:	4013      	ands	r3, r2
    1162:	2b02      	cmp	r3, #2
    1164:	d006      	beq.n	1174 <Chip_Clock_GetMainClockRate+0x1c>
    1166:	2b03      	cmp	r3, #3
    1168:	d007      	beq.n	117a <Chip_Clock_GetMainClockRate+0x22>
    116a:	2b01      	cmp	r3, #1
    116c:	d108      	bne.n	1180 <Chip_Clock_GetMainClockRate+0x28>
    116e:	f7ff ffcd 	bl	110c <Chip_Clock_GetSystemPLLInClockRate>
    1172:	e006      	b.n	1182 <Chip_Clock_GetMainClockRate+0x2a>
    1174:	f7ff ffb6 	bl	10e4 <Chip_Clock_GetWDTOSCRate>
    1178:	e003      	b.n	1182 <Chip_Clock_GetMainClockRate+0x2a>
    117a:	f7ff ffe1 	bl	1140 <Chip_Clock_GetSystemPLLOutClockRate>
    117e:	e000      	b.n	1182 <Chip_Clock_GetMainClockRate+0x2a>
    1180:	4801      	ldr	r0, [pc, #4]	; (1188 <Chip_Clock_GetMainClockRate+0x30>)
    1182:	bd08      	pop	{r3, pc}
    1184:	40048000 	andmi	r8, r4, r0
    1188:	00b71b00 	adcseq	r1, r7, r0, lsl #22

0000118c <Chip_Clock_GetSystemClockRate>:
    118c:	b508      	push	{r3, lr}
    118e:	f7ff ffe3 	bl	1158 <Chip_Clock_GetMainClockRate>
    1192:	4b03      	ldr	r3, [pc, #12]	; (11a0 <Chip_Clock_GetSystemClockRate+0x14>)
    1194:	6f99      	ldr	r1, [r3, #120]	; 0x78
    1196:	b2c9      	uxtb	r1, r1
    1198:	f000 fb73 	bl	1882 <__aeabi_uidiv>
    119c:	bd08      	pop	{r3, pc}
    119e:	46c0      	nop			; (mov r8, r8)
    11a0:	40048000 	andmi	r8, r4, r0

000011a4 <Chip_Clock_GetUSARTNBaseClockRate>:
    11a4:	b538      	push	{r3, r4, r5, lr}
    11a6:	2000      	movs	r0, #0
    11a8:	24ff      	movs	r4, #255	; 0xff
    11aa:	4b0d      	ldr	r3, [pc, #52]	; (11e0 <Chip_Clock_GetUSARTNBaseClockRate+0x3c>)
    11ac:	681d      	ldr	r5, [r3, #0]
    11ae:	4025      	ands	r5, r4
    11b0:	4285      	cmp	r5, r0
    11b2:	d013      	beq.n	11dc <Chip_Clock_GetUSARTNBaseClockRate+0x38>
    11b4:	f7ff ffd0 	bl	1158 <Chip_Clock_GetMainClockRate>
    11b8:	1c29      	adds	r1, r5, #0
    11ba:	f000 fb62 	bl	1882 <__aeabi_uidiv>
    11be:	4b09      	ldr	r3, [pc, #36]	; (11e4 <Chip_Clock_GetUSARTNBaseClockRate+0x40>)
    11c0:	681a      	ldr	r2, [r3, #0]
    11c2:	4014      	ands	r4, r2
    11c4:	2cff      	cmp	r4, #255	; 0xff
    11c6:	d109      	bne.n	11dc <Chip_Clock_GetUSARTNBaseClockRate+0x38>
    11c8:	4b07      	ldr	r3, [pc, #28]	; (11e8 <Chip_Clock_GetUSARTNBaseClockRate+0x44>)
    11ca:	0e01      	lsrs	r1, r0, #24
    11cc:	681a      	ldr	r2, [r3, #0]
    11ce:	0200      	lsls	r0, r0, #8
    11d0:	4014      	ands	r4, r2
    11d2:	1c62      	adds	r2, r4, #1
    11d4:	32ff      	adds	r2, #255	; 0xff
    11d6:	2300      	movs	r3, #0
    11d8:	f000 fb8c 	bl	18f4 <__aeabi_uldivmod>
    11dc:	bd38      	pop	{r3, r4, r5, pc}
    11de:	46c0      	nop			; (mov r8, r8)
    11e0:	40048094 	mulmi	r4, r4, r0
    11e4:	400480f0 	strdmi	r8, [r4], -r0
    11e8:	400480f4 	strdmi	r8, [r4], -r4

000011ec <Chip_Clock_SetUSARTNBaseClockRate>:
    11ec:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    11ee:	1c05      	adds	r5, r0, #0
    11f0:	1c0f      	adds	r7, r1, #0
    11f2:	f7ff ffb1 	bl	1158 <Chip_Clock_GetMainClockRate>
    11f6:	1c29      	adds	r1, r5, #0
    11f8:	1c06      	adds	r6, r0, #0
    11fa:	f000 fb42 	bl	1882 <__aeabi_uidiv>
    11fe:	1e01      	subs	r1, r0, #0
    1200:	d100      	bne.n	1204 <Chip_Clock_SetUSARTNBaseClockRate+0x18>
    1202:	3101      	adds	r1, #1
    1204:	24ff      	movs	r4, #255	; 0xff
    1206:	1c08      	adds	r0, r1, #0
    1208:	4b10      	ldr	r3, [pc, #64]	; (124c <Chip_Clock_SetUSARTNBaseClockRate+0x60>)
    120a:	4020      	ands	r0, r4
    120c:	6018      	str	r0, [r3, #0]
    120e:	4a10      	ldr	r2, [pc, #64]	; (1250 <Chip_Clock_SetUSARTNBaseClockRate+0x64>)
    1210:	4810      	ldr	r0, [pc, #64]	; (1254 <Chip_Clock_SetUSARTNBaseClockRate+0x68>)
    1212:	2f00      	cmp	r7, #0
    1214:	d015      	beq.n	1242 <Chip_Clock_SetUSARTNBaseClockRate+0x56>
    1216:	6857      	ldr	r7, [r2, #4]
    1218:	4b0f      	ldr	r3, [pc, #60]	; (1258 <Chip_Clock_SetUSARTNBaseClockRate+0x6c>)
    121a:	403b      	ands	r3, r7
    121c:	6053      	str	r3, [r2, #4]
    121e:	6857      	ldr	r7, [r2, #4]
    1220:	4b0e      	ldr	r3, [pc, #56]	; (125c <Chip_Clock_SetUSARTNBaseClockRate+0x70>)
    1222:	403b      	ands	r3, r7
    1224:	2704      	movs	r7, #4
    1226:	433b      	orrs	r3, r7
    1228:	6053      	str	r3, [r2, #4]
    122a:	6004      	str	r4, [r0, #0]
    122c:	1c30      	adds	r0, r6, #0
    122e:	f000 fb28 	bl	1882 <__aeabi_uidiv>
    1232:	1c29      	adds	r1, r5, #0
    1234:	0200      	lsls	r0, r0, #8
    1236:	f000 fb24 	bl	1882 <__aeabi_uidiv>
    123a:	4b09      	ldr	r3, [pc, #36]	; (1260 <Chip_Clock_SetUSARTNBaseClockRate+0x74>)
    123c:	4004      	ands	r4, r0
    123e:	601c      	str	r4, [r3, #0]
    1240:	e000      	b.n	1244 <Chip_Clock_SetUSARTNBaseClockRate+0x58>
    1242:	6007      	str	r7, [r0, #0]
    1244:	f7ff ffae 	bl	11a4 <Chip_Clock_GetUSARTNBaseClockRate>
    1248:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    124a:	46c0      	nop			; (mov r8, r8)
    124c:	40048094 	mulmi	r4, r4, r0
    1250:	40048000 	andmi	r8, r4, r0
    1254:	400480f0 	strdmi	r8, [r4], -r0
    1258:	0001dffb 	strdeq	sp, [r1], -fp
    125c:	0001dfff 	strdeq	sp, [r1], -pc	; <UNPREDICTABLE>
    1260:	400480f4 	strdmi	r8, [r4], -r4

00001264 <Chip_UART_Init>:
    1264:	b570      	push	{r4, r5, r6, lr}
    1266:	4c19      	ldr	r4, [pc, #100]	; (12cc <Chip_UART_Init+0x68>)
    1268:	210e      	movs	r1, #14
    126a:	42a0      	cmp	r0, r4
    126c:	d005      	beq.n	127a <Chip_UART_Init+0x16>
    126e:	4b18      	ldr	r3, [pc, #96]	; (12d0 <Chip_UART_Init+0x6c>)
    1270:	18c1      	adds	r1, r0, r3
    1272:	424a      	negs	r2, r1
    1274:	4151      	adcs	r1, r2
    1276:	2310      	movs	r3, #16
    1278:	1a59      	subs	r1, r3, r1
    127a:	2501      	movs	r5, #1
    127c:	408d      	lsls	r5, r1
    127e:	4e15      	ldr	r6, [pc, #84]	; (12d4 <Chip_UART_Init+0x70>)
    1280:	4915      	ldr	r1, [pc, #84]	; (12d8 <Chip_UART_Init+0x74>)
    1282:	6ff2      	ldr	r2, [r6, #124]	; 0x7c
    1284:	4b15      	ldr	r3, [pc, #84]	; (12dc <Chip_UART_Init+0x78>)
    1286:	400a      	ands	r2, r1
    1288:	432a      	orrs	r2, r5
    128a:	67f2      	str	r2, [r6, #124]	; 0x7c
    128c:	4a14      	ldr	r2, [pc, #80]	; (12e0 <Chip_UART_Init+0x7c>)
    128e:	42a0      	cmp	r0, r4
    1290:	d107      	bne.n	12a2 <Chip_UART_Init+0x3e>
    1292:	6858      	ldr	r0, [r3, #4]
    1294:	4913      	ldr	r1, [pc, #76]	; (12e4 <Chip_UART_Init+0x80>)
    1296:	4001      	ands	r1, r0
    1298:	6059      	str	r1, [r3, #4]
    129a:	6859      	ldr	r1, [r3, #4]
    129c:	400a      	ands	r2, r1
    129e:	2108      	movs	r1, #8
    12a0:	e011      	b.n	12c6 <Chip_UART_Init+0x62>
    12a2:	4911      	ldr	r1, [pc, #68]	; (12e8 <Chip_UART_Init+0x84>)
    12a4:	4288      	cmp	r0, r1
    12a6:	d107      	bne.n	12b8 <Chip_UART_Init+0x54>
    12a8:	6858      	ldr	r0, [r3, #4]
    12aa:	4910      	ldr	r1, [pc, #64]	; (12ec <Chip_UART_Init+0x88>)
    12ac:	4001      	ands	r1, r0
    12ae:	6059      	str	r1, [r3, #4]
    12b0:	6859      	ldr	r1, [r3, #4]
    12b2:	400a      	ands	r2, r1
    12b4:	2110      	movs	r1, #16
    12b6:	e006      	b.n	12c6 <Chip_UART_Init+0x62>
    12b8:	6858      	ldr	r0, [r3, #4]
    12ba:	490d      	ldr	r1, [pc, #52]	; (12f0 <Chip_UART_Init+0x8c>)
    12bc:	4001      	ands	r1, r0
    12be:	6059      	str	r1, [r3, #4]
    12c0:	6859      	ldr	r1, [r3, #4]
    12c2:	400a      	ands	r2, r1
    12c4:	2120      	movs	r1, #32
    12c6:	430a      	orrs	r2, r1
    12c8:	605a      	str	r2, [r3, #4]
    12ca:	bd70      	pop	{r4, r5, r6, pc}
    12cc:	40064000 	andmi	r4, r6, r0
    12d0:	bff98000 	svclt	0x00f98000
    12d4:	40048004 	andmi	r8, r4, r4
    12d8:	25efffff 	strbcs	pc, [pc, #4095]!	; 22df <__exidx_end+0x4e7>	; <UNPREDICTABLE>
    12dc:	40048000 	andmi	r8, r4, r0
    12e0:	0001dfff 	strdeq	sp, [r1], -pc	; <UNPREDICTABLE>
    12e4:	0001dff7 	strdeq	sp, [r1], -r7
    12e8:	40068000 	andmi	r8, r6, r0
    12ec:	0001dfef 	andeq	sp, r1, pc, ror #31
    12f0:	0001dfdf 	ldrdeq	sp, [r1], -pc	; <UNPREDICTABLE>

000012f4 <Chip_UART_SetBaud>:
    12f4:	b538      	push	{r3, r4, r5, lr}
    12f6:	1c0c      	adds	r4, r1, #0
    12f8:	1c05      	adds	r5, r0, #0
    12fa:	f7ff ff53 	bl	11a4 <Chip_Clock_GetUSARTNBaseClockRate>
    12fe:	0121      	lsls	r1, r4, #4
    1300:	f000 fabf 	bl	1882 <__aeabi_uidiv>
    1304:	3801      	subs	r0, #1
    1306:	6228      	str	r0, [r5, #32]
    1308:	bd38      	pop	{r3, r4, r5, pc}

0000130a <Chip_UART_RXIntHandlerRB>:
    130a:	b537      	push	{r0, r1, r2, r4, r5, lr}
    130c:	1c04      	adds	r4, r0, #0
    130e:	1c0d      	adds	r5, r1, #0
    1310:	68a3      	ldr	r3, [r4, #8]
    1312:	07db      	lsls	r3, r3, #31
    1314:	d507      	bpl.n	1326 <Chip_UART_RXIntHandlerRB+0x1c>
    1316:	466a      	mov	r2, sp
    1318:	6963      	ldr	r3, [r4, #20]
    131a:	1dd1      	adds	r1, r2, #7
    131c:	1c28      	adds	r0, r5, #0
    131e:	700b      	strb	r3, [r1, #0]
    1320:	f000 f89c 	bl	145c <RingBuffer_Insert>
    1324:	e7f4      	b.n	1310 <Chip_UART_RXIntHandlerRB+0x6>
    1326:	bd37      	pop	{r0, r1, r2, r4, r5, pc}

00001328 <Chip_UART_TXIntHandlerRB>:
    1328:	b573      	push	{r0, r1, r4, r5, r6, lr}
    132a:	1c05      	adds	r5, r0, #0
    132c:	1c0e      	adds	r6, r1, #0
    132e:	68ab      	ldr	r3, [r5, #8]
    1330:	075b      	lsls	r3, r3, #29
    1332:	d50a      	bpl.n	134a <Chip_UART_TXIntHandlerRB+0x22>
    1334:	466b      	mov	r3, sp
    1336:	1ddc      	adds	r4, r3, #7
    1338:	1c30      	adds	r0, r6, #0
    133a:	1c21      	adds	r1, r4, #0
    133c:	f000 f8ec 	bl	1518 <RingBuffer_Pop>
    1340:	2800      	cmp	r0, #0
    1342:	d002      	beq.n	134a <Chip_UART_TXIntHandlerRB+0x22>
    1344:	7823      	ldrb	r3, [r4, #0]
    1346:	61eb      	str	r3, [r5, #28]
    1348:	e7f1      	b.n	132e <Chip_UART_TXIntHandlerRB+0x6>
    134a:	bd73      	pop	{r0, r1, r4, r5, r6, pc}

0000134c <Chip_UART_SendRB>:
    134c:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    134e:	9301      	str	r3, [sp, #4]
    1350:	2304      	movs	r3, #4
    1352:	1c06      	adds	r6, r0, #0
    1354:	1c0f      	adds	r7, r1, #0
    1356:	1c15      	adds	r5, r2, #0
    1358:	6103      	str	r3, [r0, #16]
    135a:	1c08      	adds	r0, r1, #0
    135c:	1c11      	adds	r1, r2, #0
    135e:	9a01      	ldr	r2, [sp, #4]
    1360:	f000 f897 	bl	1492 <RingBuffer_InsertMult>
    1364:	1c04      	adds	r4, r0, #0
    1366:	1c39      	adds	r1, r7, #0
    1368:	1c30      	adds	r0, r6, #0
    136a:	f7ff ffdd 	bl	1328 <Chip_UART_TXIntHandlerRB>
    136e:	9b01      	ldr	r3, [sp, #4]
    1370:	1929      	adds	r1, r5, r4
    1372:	1b1a      	subs	r2, r3, r4
    1374:	1c38      	adds	r0, r7, #0
    1376:	f000 f88c 	bl	1492 <RingBuffer_InsertMult>
    137a:	2304      	movs	r3, #4
    137c:	1900      	adds	r0, r0, r4
    137e:	60f3      	str	r3, [r6, #12]
    1380:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001382 <Chip_UART_ReadRB>:
    1382:	b508      	push	{r3, lr}
    1384:	1c08      	adds	r0, r1, #0
    1386:	1c11      	adds	r1, r2, #0
    1388:	1c1a      	adds	r2, r3, #0
    138a:	f000 f8de 	bl	154a <RingBuffer_PopMult>
    138e:	bd08      	pop	{r3, pc}

00001390 <Chip_UART_IRQRBHandler>:
    1390:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    1392:	2604      	movs	r6, #4
    1394:	6883      	ldr	r3, [r0, #8]
    1396:	1c04      	adds	r4, r0, #0
    1398:	1c0f      	adds	r7, r1, #0
    139a:	1c15      	adds	r5, r2, #0
    139c:	4233      	tst	r3, r6
    139e:	d007      	beq.n	13b0 <Chip_UART_IRQRBHandler+0x20>
    13a0:	1c11      	adds	r1, r2, #0
    13a2:	f7ff ffc1 	bl	1328 <Chip_UART_TXIntHandlerRB>
    13a6:	68ea      	ldr	r2, [r5, #12]
    13a8:	692b      	ldr	r3, [r5, #16]
    13aa:	429a      	cmp	r2, r3
    13ac:	d100      	bne.n	13b0 <Chip_UART_IRQRBHandler+0x20>
    13ae:	6126      	str	r6, [r4, #16]
    13b0:	1c39      	adds	r1, r7, #0
    13b2:	1c20      	adds	r0, r4, #0
    13b4:	f7ff ffa9 	bl	130a <Chip_UART_RXIntHandlerRB>
    13b8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

000013bc <Chip_SWM_MovablePinAssign>:
    13bc:	230f      	movs	r3, #15
    13be:	b510      	push	{r4, lr}
    13c0:	24ff      	movs	r4, #255	; 0xff
    13c2:	4003      	ands	r3, r0
    13c4:	00db      	lsls	r3, r3, #3
    13c6:	409c      	lsls	r4, r3
    13c8:	4a05      	ldr	r2, [pc, #20]	; (13e0 <Chip_SWM_MovablePinAssign+0x24>)
    13ca:	0900      	lsrs	r0, r0, #4
    13cc:	0080      	lsls	r0, r0, #2
    13ce:	1880      	adds	r0, r0, r2
    13d0:	6802      	ldr	r2, [r0, #0]
    13d2:	4099      	lsls	r1, r3
    13d4:	43a2      	bics	r2, r4
    13d6:	1c13      	adds	r3, r2, #0
    13d8:	430b      	orrs	r3, r1
    13da:	6003      	str	r3, [r0, #0]
    13dc:	bd10      	pop	{r4, pc}
    13de:	46c0      	nop			; (mov r8, r8)
    13e0:	4000c000 	andmi	ip, r0, r0

000013e4 <Chip_IOCON_PinSetMode>:
    13e4:	0089      	lsls	r1, r1, #2
    13e6:	1841      	adds	r1, r0, r1
    13e8:	2018      	movs	r0, #24
    13ea:	680b      	ldr	r3, [r1, #0]
    13ec:	00d2      	lsls	r2, r2, #3
    13ee:	4383      	bics	r3, r0
    13f0:	431a      	orrs	r2, r3
    13f2:	600a      	str	r2, [r1, #0]
    13f4:	4770      	bx	lr
	...

000013f8 <Chip_IOCON_PinSetI2CMode>:
    13f8:	0089      	lsls	r1, r1, #2
    13fa:	1841      	adds	r1, r0, r1
    13fc:	6808      	ldr	r0, [r1, #0]
    13fe:	4b03      	ldr	r3, [pc, #12]	; (140c <Chip_IOCON_PinSetI2CMode+0x14>)
    1400:	0212      	lsls	r2, r2, #8
    1402:	4003      	ands	r3, r0
    1404:	431a      	orrs	r2, r3
    1406:	600a      	str	r2, [r1, #0]
    1408:	4770      	bx	lr
    140a:	46c0      	nop			; (mov r8, r8)
    140c:	fffffcff 			; <UNDEFINED> instruction: 0xfffffcff

00001410 <SystemCoreClockUpdate>:
    1410:	b508      	push	{r3, lr}
    1412:	f7ff febb 	bl	118c <Chip_Clock_GetSystemClockRate>
    1416:	4b01      	ldr	r3, [pc, #4]	; (141c <SystemCoreClockUpdate+0xc>)
    1418:	6018      	str	r0, [r3, #0]
    141a:	bd08      	pop	{r3, pc}
    141c:	100002a8 	andne	r0, r0, r8, lsr #5

00001420 <Chip_GPIO_Init>:
    1420:	4a03      	ldr	r2, [pc, #12]	; (1430 <Chip_GPIO_Init+0x10>)
    1422:	4b04      	ldr	r3, [pc, #16]	; (1434 <Chip_GPIO_Init+0x14>)
    1424:	6fd1      	ldr	r1, [r2, #124]	; 0x7c
    1426:	400b      	ands	r3, r1
    1428:	2140      	movs	r1, #64	; 0x40
    142a:	430b      	orrs	r3, r1
    142c:	67d3      	str	r3, [r2, #124]	; 0x7c
    142e:	4770      	bx	lr
    1430:	40048004 	andmi	r8, r4, r4
    1434:	25efffff 	strbcs	pc, [pc, #4095]!	; 243b <__exidx_end+0x643>	; <UNPREDICTABLE>

00001438 <Chip_SetupIrcClocking>:
    1438:	b508      	push	{r3, lr}
    143a:	4802      	ldr	r0, [pc, #8]	; (1444 <Chip_SetupIrcClocking+0xc>)
    143c:	4902      	ldr	r1, [pc, #8]	; (1448 <Chip_SetupIrcClocking+0x10>)
    143e:	f000 f8c7 	bl	15d0 <Chip_IRC_SetFreq>
    1442:	bd08      	pop	{r3, pc}
    1444:	03938700 	orrseq	r8, r3, #0, 14
    1448:	01c9c380 	biceq	ip, r9, r0, lsl #7

0000144c <RingBuffer_Init>:
    144c:	6043      	str	r3, [r0, #4]
    144e:	2300      	movs	r3, #0
    1450:	6001      	str	r1, [r0, #0]
    1452:	6082      	str	r2, [r0, #8]
    1454:	6103      	str	r3, [r0, #16]
    1456:	60c3      	str	r3, [r0, #12]
    1458:	2001      	movs	r0, #1
    145a:	4770      	bx	lr

0000145c <RingBuffer_Insert>:
    145c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    145e:	1c04      	adds	r4, r0, #0
    1460:	68c3      	ldr	r3, [r0, #12]
    1462:	6807      	ldr	r7, [r0, #0]
    1464:	6862      	ldr	r2, [r4, #4]
    1466:	6900      	ldr	r0, [r0, #16]
    1468:	1a1b      	subs	r3, r3, r0
    146a:	2000      	movs	r0, #0
    146c:	4293      	cmp	r3, r2
    146e:	da0f      	bge.n	1490 <RingBuffer_Insert+0x34>
    1470:	1c0d      	adds	r5, r1, #0
    1472:	68e0      	ldr	r0, [r4, #12]
    1474:	1c11      	adds	r1, r2, #0
    1476:	f000 fa04 	bl	1882 <__aeabi_uidiv>
    147a:	68a6      	ldr	r6, [r4, #8]
    147c:	4371      	muls	r1, r6
    147e:	1c32      	adds	r2, r6, #0
    1480:	1878      	adds	r0, r7, r1
    1482:	1c29      	adds	r1, r5, #0
    1484:	f000 f9ee 	bl	1864 <memcpy>
    1488:	2001      	movs	r0, #1
    148a:	68e3      	ldr	r3, [r4, #12]
    148c:	3301      	adds	r3, #1
    148e:	60e3      	str	r3, [r4, #12]
    1490:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00001492 <RingBuffer_InsertMult>:
    1492:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    1494:	6803      	ldr	r3, [r0, #0]
    1496:	6846      	ldr	r6, [r0, #4]
    1498:	9301      	str	r3, [sp, #4]
    149a:	68c3      	ldr	r3, [r0, #12]
    149c:	6904      	ldr	r4, [r0, #16]
    149e:	1b1c      	subs	r4, r3, r4
    14a0:	2300      	movs	r3, #0
    14a2:	42b4      	cmp	r4, r6
    14a4:	da36      	bge.n	1514 <RingBuffer_InsertMult+0x82>
    14a6:	68c3      	ldr	r3, [r0, #12]
    14a8:	6907      	ldr	r7, [r0, #16]
    14aa:	9100      	str	r1, [sp, #0]
    14ac:	1c04      	adds	r4, r0, #0
    14ae:	1c31      	adds	r1, r6, #0
    14b0:	68c0      	ldr	r0, [r0, #12]
    14b2:	1bdf      	subs	r7, r3, r7
    14b4:	1c15      	adds	r5, r2, #0
    14b6:	f000 f9e4 	bl	1882 <__aeabi_uidiv>
    14ba:	1bf7      	subs	r7, r6, r7
    14bc:	187b      	adds	r3, r7, r1
    14be:	1c38      	adds	r0, r7, #0
    14c0:	42b3      	cmp	r3, r6
    14c2:	d300      	bcc.n	14c6 <RingBuffer_InsertMult+0x34>
    14c4:	1a70      	subs	r0, r6, r1
    14c6:	1a3f      	subs	r7, r7, r0
    14c8:	1e06      	subs	r6, r0, #0
    14ca:	42ae      	cmp	r6, r5
    14cc:	dd00      	ble.n	14d0 <RingBuffer_InsertMult+0x3e>
    14ce:	1c2e      	adds	r6, r5, #0
    14d0:	1bad      	subs	r5, r5, r6
    14d2:	42bd      	cmp	r5, r7
    14d4:	dd00      	ble.n	14d8 <RingBuffer_InsertMult+0x46>
    14d6:	1c3d      	adds	r5, r7, #0
    14d8:	68a2      	ldr	r2, [r4, #8]
    14da:	9b01      	ldr	r3, [sp, #4]
    14dc:	4351      	muls	r1, r2
    14de:	4372      	muls	r2, r6
    14e0:	1858      	adds	r0, r3, r1
    14e2:	9900      	ldr	r1, [sp, #0]
    14e4:	f000 f9be 	bl	1864 <memcpy>
    14e8:	68e3      	ldr	r3, [r4, #12]
    14ea:	6861      	ldr	r1, [r4, #4]
    14ec:	18f0      	adds	r0, r6, r3
    14ee:	60e0      	str	r0, [r4, #12]
    14f0:	f000 f9c7 	bl	1882 <__aeabi_uidiv>
    14f4:	68a7      	ldr	r7, [r4, #8]
    14f6:	6823      	ldr	r3, [r4, #0]
    14f8:	4379      	muls	r1, r7
    14fa:	1858      	adds	r0, r3, r1
    14fc:	1c39      	adds	r1, r7, #0
    14fe:	1c3a      	adds	r2, r7, #0
    1500:	4371      	muls	r1, r6
    1502:	9b00      	ldr	r3, [sp, #0]
    1504:	436a      	muls	r2, r5
    1506:	1859      	adds	r1, r3, r1
    1508:	f000 f9ac 	bl	1864 <memcpy>
    150c:	68e3      	ldr	r3, [r4, #12]
    150e:	195b      	adds	r3, r3, r5
    1510:	60e3      	str	r3, [r4, #12]
    1512:	1973      	adds	r3, r6, r5
    1514:	1c18      	adds	r0, r3, #0
    1516:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001518 <RingBuffer_Pop>:
    1518:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    151a:	68c2      	ldr	r2, [r0, #12]
    151c:	6903      	ldr	r3, [r0, #16]
    151e:	1c04      	adds	r4, r0, #0
    1520:	6807      	ldr	r7, [r0, #0]
    1522:	2000      	movs	r0, #0
    1524:	429a      	cmp	r2, r3
    1526:	d00f      	beq.n	1548 <RingBuffer_Pop+0x30>
    1528:	1c0d      	adds	r5, r1, #0
    152a:	6920      	ldr	r0, [r4, #16]
    152c:	6861      	ldr	r1, [r4, #4]
    152e:	f000 f9a8 	bl	1882 <__aeabi_uidiv>
    1532:	68a6      	ldr	r6, [r4, #8]
    1534:	1c28      	adds	r0, r5, #0
    1536:	4371      	muls	r1, r6
    1538:	1c32      	adds	r2, r6, #0
    153a:	1879      	adds	r1, r7, r1
    153c:	f000 f992 	bl	1864 <memcpy>
    1540:	2001      	movs	r0, #1
    1542:	6923      	ldr	r3, [r4, #16]
    1544:	3301      	adds	r3, #1
    1546:	6123      	str	r3, [r4, #16]
    1548:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0000154a <RingBuffer_PopMult>:
    154a:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    154c:	6803      	ldr	r3, [r0, #0]
    154e:	68c4      	ldr	r4, [r0, #12]
    1550:	9301      	str	r3, [sp, #4]
    1552:	6903      	ldr	r3, [r0, #16]
    1554:	2600      	movs	r6, #0
    1556:	429c      	cmp	r4, r3
    1558:	d038      	beq.n	15cc <RingBuffer_PopMult+0x82>
    155a:	6846      	ldr	r6, [r0, #4]
    155c:	68c7      	ldr	r7, [r0, #12]
    155e:	6903      	ldr	r3, [r0, #16]
    1560:	9100      	str	r1, [sp, #0]
    1562:	1c04      	adds	r4, r0, #0
    1564:	1c31      	adds	r1, r6, #0
    1566:	6900      	ldr	r0, [r0, #16]
    1568:	1aff      	subs	r7, r7, r3
    156a:	1c15      	adds	r5, r2, #0
    156c:	f000 f989 	bl	1882 <__aeabi_uidiv>
    1570:	187b      	adds	r3, r7, r1
    1572:	1c38      	adds	r0, r7, #0
    1574:	42b3      	cmp	r3, r6
    1576:	d300      	bcc.n	157a <RingBuffer_PopMult+0x30>
    1578:	1a70      	subs	r0, r6, r1
    157a:	1a3f      	subs	r7, r7, r0
    157c:	1e06      	subs	r6, r0, #0
    157e:	42ae      	cmp	r6, r5
    1580:	dd00      	ble.n	1584 <RingBuffer_PopMult+0x3a>
    1582:	1c2e      	adds	r6, r5, #0
    1584:	1bad      	subs	r5, r5, r6
    1586:	42bd      	cmp	r5, r7
    1588:	dd00      	ble.n	158c <RingBuffer_PopMult+0x42>
    158a:	1c3d      	adds	r5, r7, #0
    158c:	68a2      	ldr	r2, [r4, #8]
    158e:	9b01      	ldr	r3, [sp, #4]
    1590:	4351      	muls	r1, r2
    1592:	9800      	ldr	r0, [sp, #0]
    1594:	4372      	muls	r2, r6
    1596:	1859      	adds	r1, r3, r1
    1598:	f000 f964 	bl	1864 <memcpy>
    159c:	68a7      	ldr	r7, [r4, #8]
    159e:	6923      	ldr	r3, [r4, #16]
    15a0:	1c39      	adds	r1, r7, #0
    15a2:	4371      	muls	r1, r6
    15a4:	18f0      	adds	r0, r6, r3
    15a6:	9b00      	ldr	r3, [sp, #0]
    15a8:	6120      	str	r0, [r4, #16]
    15aa:	185b      	adds	r3, r3, r1
    15ac:	6861      	ldr	r1, [r4, #4]
    15ae:	9300      	str	r3, [sp, #0]
    15b0:	f000 f967 	bl	1882 <__aeabi_uidiv>
    15b4:	1c3a      	adds	r2, r7, #0
    15b6:	4379      	muls	r1, r7
    15b8:	6823      	ldr	r3, [r4, #0]
    15ba:	436a      	muls	r2, r5
    15bc:	1859      	adds	r1, r3, r1
    15be:	9800      	ldr	r0, [sp, #0]
    15c0:	f000 f950 	bl	1864 <memcpy>
    15c4:	6923      	ldr	r3, [r4, #16]
    15c6:	1976      	adds	r6, r6, r5
    15c8:	195b      	adds	r3, r3, r5
    15ca:	6123      	str	r3, [r4, #16]
    15cc:	1c30      	adds	r0, r6, #0
    15ce:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

000015d0 <Chip_IRC_SetFreq>:
    15d0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    15d2:	1c05      	adds	r5, r0, #0
    15d4:	1c08      	adds	r0, r1, #0
    15d6:	4927      	ldr	r1, [pc, #156]	; (1674 <Chip_IRC_SetFreq+0xa4>)
    15d8:	f000 f953 	bl	1882 <__aeabi_uidiv>
    15dc:	2400      	movs	r4, #0
    15de:	1e06      	subs	r6, r0, #0
    15e0:	2e1e      	cmp	r6, #30
    15e2:	d845      	bhi.n	1670 <Chip_IRC_SetFreq+0xa0>
    15e4:	1c28      	adds	r0, r5, #0
    15e6:	4923      	ldr	r1, [pc, #140]	; (1674 <Chip_IRC_SetFreq+0xa4>)
    15e8:	f000 f94b 	bl	1882 <__aeabi_uidiv>
    15ec:	2860      	cmp	r0, #96	; 0x60
    15ee:	d83f      	bhi.n	1670 <Chip_IRC_SetFreq+0xa0>
    15f0:	1c25      	adds	r5, r4, #0
    15f2:	240c      	movs	r4, #12
    15f4:	436c      	muls	r4, r5
    15f6:	4f20      	ldr	r7, [pc, #128]	; (1678 <Chip_IRC_SetFreq+0xa8>)
    15f8:	b283      	uxth	r3, r0
    15fa:	5be2      	ldrh	r2, [r4, r7]
    15fc:	429a      	cmp	r2, r3
    15fe:	d124      	bne.n	164a <Chip_IRC_SetFreq+0x7a>
    1600:	193c      	adds	r4, r7, r4
    1602:	8862      	ldrh	r2, [r4, #2]
    1604:	b2b3      	uxth	r3, r6
    1606:	429a      	cmp	r2, r3
    1608:	d11f      	bne.n	164a <Chip_IRC_SetFreq+0x7a>
    160a:	4b1c      	ldr	r3, [pc, #112]	; (167c <Chip_IRC_SetFreq+0xac>)
    160c:	2002      	movs	r0, #2
    160e:	801d      	strh	r5, [r3, #0]
    1610:	f000 f916 	bl	1840 <Chip_SYSCTL_PowerUp>
    1614:	2000      	movs	r0, #0
    1616:	f7ff fd51 	bl	10bc <Chip_Clock_SetSystemPLLSource>
    161a:	2000      	movs	r0, #0
    161c:	f7ff fd58 	bl	10d0 <Chip_Clock_SetMainClockSource>
    1620:	4b17      	ldr	r3, [pc, #92]	; (1680 <Chip_IRC_SetFreq+0xb0>)
    1622:	2080      	movs	r0, #128	; 0x80
    1624:	691a      	ldr	r2, [r3, #16]
    1626:	2201      	movs	r2, #1
    1628:	611a      	str	r2, [r3, #16]
    162a:	f000 f8f9 	bl	1820 <Chip_SYSCTL_PowerDown>
    162e:	2303      	movs	r3, #3
    1630:	221f      	movs	r2, #31
    1632:	8921      	ldrh	r1, [r4, #8]
    1634:	2080      	movs	r0, #128	; 0x80
    1636:	400b      	ands	r3, r1
    1638:	0159      	lsls	r1, r3, #5
    163a:	88e3      	ldrh	r3, [r4, #6]
    163c:	4c11      	ldr	r4, [pc, #68]	; (1684 <Chip_IRC_SetFreq+0xb4>)
    163e:	4013      	ands	r3, r2
    1640:	430b      	orrs	r3, r1
    1642:	60a3      	str	r3, [r4, #8]
    1644:	f000 f8fc 	bl	1840 <Chip_SYSCTL_PowerUp>
    1648:	e004      	b.n	1654 <Chip_IRC_SetFreq+0x84>
    164a:	3501      	adds	r5, #1
    164c:	2d47      	cmp	r5, #71	; 0x47
    164e:	d1d0      	bne.n	15f2 <Chip_IRC_SetFreq+0x22>
    1650:	2400      	movs	r4, #0
    1652:	e00d      	b.n	1670 <Chip_IRC_SetFreq+0xa0>
    1654:	2601      	movs	r6, #1
    1656:	68e3      	ldr	r3, [r4, #12]
    1658:	4233      	tst	r3, r6
    165a:	d0fb      	beq.n	1654 <Chip_IRC_SetFreq+0x84>
    165c:	240c      	movs	r4, #12
    165e:	436c      	muls	r4, r5
    1660:	193f      	adds	r7, r7, r4
    1662:	897a      	ldrh	r2, [r7, #10]
    1664:	4b07      	ldr	r3, [pc, #28]	; (1684 <Chip_IRC_SetFreq+0xb4>)
    1666:	2003      	movs	r0, #3
    1668:	679a      	str	r2, [r3, #120]	; 0x78
    166a:	f7ff fd31 	bl	10d0 <Chip_Clock_SetMainClockSource>
    166e:	1c34      	adds	r4, r6, #0
    1670:	1c20      	adds	r0, r4, #0
    1672:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    1674:	000f4240 	andeq	r4, pc, r0, asr #4
    1678:	00001aa4 	andeq	r1, r0, r4, lsr #21
    167c:	10000204 	andne	r0, r0, r4, lsl #4
    1680:	40040000 	andmi	r0, r4, r0
    1684:	40048000 	andmi	r8, r4, r0

00001688 <Chip_ADC_Init>:
    1688:	b538      	push	{r3, r4, r5, lr}
    168a:	1c04      	adds	r4, r0, #0
    168c:	2010      	movs	r0, #16
    168e:	1c0d      	adds	r5, r1, #0
    1690:	f000 f8d6 	bl	1840 <Chip_SYSCTL_PowerUp>
    1694:	4a05      	ldr	r2, [pc, #20]	; (16ac <Chip_ADC_Init+0x24>)
    1696:	4b06      	ldr	r3, [pc, #24]	; (16b0 <Chip_ADC_Init+0x28>)
    1698:	6fd1      	ldr	r1, [r2, #124]	; 0x7c
    169a:	400b      	ands	r3, r1
    169c:	2180      	movs	r1, #128	; 0x80
    169e:	0449      	lsls	r1, r1, #17
    16a0:	430b      	orrs	r3, r1
    16a2:	67d3      	str	r3, [r2, #124]	; 0x7c
    16a4:	2300      	movs	r3, #0
    16a6:	6663      	str	r3, [r4, #100]	; 0x64
    16a8:	6025      	str	r5, [r4, #0]
    16aa:	bd38      	pop	{r3, r4, r5, pc}
    16ac:	40048004 	andmi	r8, r4, r4
    16b0:	25efffff 	strbcs	pc, [pc, #4095]!	; 26b7 <__exidx_end+0x8bf>	; <UNPREDICTABLE>

000016b4 <Chip_ADC_StartCalibration>:
    16b4:	2280      	movs	r2, #128	; 0x80
    16b6:	b538      	push	{r3, r4, r5, lr}
    16b8:	6803      	ldr	r3, [r0, #0]
    16ba:	05d2      	lsls	r2, r2, #23
    16bc:	4313      	orrs	r3, r2
    16be:	6003      	str	r3, [r0, #0]
    16c0:	6802      	ldr	r2, [r0, #0]
    16c2:	4b0a      	ldr	r3, [pc, #40]	; (16ec <Chip_ADC_StartCalibration+0x38>)
    16c4:	1c04      	adds	r4, r0, #0
    16c6:	4013      	ands	r3, r2
    16c8:	6003      	str	r3, [r0, #0]
    16ca:	f7ff fd5f 	bl	118c <Chip_Clock_GetSystemClockRate>
    16ce:	4908      	ldr	r1, [pc, #32]	; (16f0 <Chip_ADC_StartCalibration+0x3c>)
    16d0:	f000 f8d7 	bl	1882 <__aeabi_uidiv>
    16d4:	23ff      	movs	r3, #255	; 0xff
    16d6:	6825      	ldr	r5, [r4, #0]
    16d8:	3801      	subs	r0, #1
    16da:	b2c0      	uxtb	r0, r0
    16dc:	439d      	bics	r5, r3
    16de:	4305      	orrs	r5, r0
    16e0:	6025      	str	r5, [r4, #0]
    16e2:	6822      	ldr	r2, [r4, #0]
    16e4:	4b03      	ldr	r3, [pc, #12]	; (16f4 <Chip_ADC_StartCalibration+0x40>)
    16e6:	4013      	ands	r3, r2
    16e8:	6023      	str	r3, [r4, #0]
    16ea:	bd38      	pop	{r3, r4, r5, pc}
    16ec:	fffffeff 			; <UNDEFINED> instruction: 0xfffffeff
    16f0:	0007a120 	andeq	sl, r7, r0, lsr #2
    16f4:	fffffbff 			; <UNDEFINED> instruction: 0xfffffbff

000016f8 <Chip_I2CM_SetBusSpeed>:
    16f8:	b538      	push	{r3, r4, r5, lr}
    16fa:	1c04      	adds	r4, r0, #0
    16fc:	1c0d      	adds	r5, r1, #0
    16fe:	f7ff fd45 	bl	118c <Chip_Clock_GetSystemClockRate>
    1702:	6961      	ldr	r1, [r4, #20]
    1704:	b289      	uxth	r1, r1
    1706:	3101      	adds	r1, #1
    1708:	4369      	muls	r1, r5
    170a:	f000 f8ba 	bl	1882 <__aeabi_uidiv>
    170e:	0842      	lsrs	r2, r0, #1
    1710:	b292      	uxth	r2, r2
    1712:	1a80      	subs	r0, r0, r2
    1714:	b280      	uxth	r0, r0
    1716:	2302      	movs	r3, #2
    1718:	2a01      	cmp	r2, #1
    171a:	d904      	bls.n	1726 <Chip_I2CM_SetBusSpeed+0x2e>
    171c:	1c13      	adds	r3, r2, #0
    171e:	2a09      	cmp	r2, #9
    1720:	d900      	bls.n	1724 <Chip_I2CM_SetBusSpeed+0x2c>
    1722:	2309      	movs	r3, #9
    1724:	b29b      	uxth	r3, r3
    1726:	2202      	movs	r2, #2
    1728:	2801      	cmp	r0, #1
    172a:	d904      	bls.n	1736 <Chip_I2CM_SetBusSpeed+0x3e>
    172c:	1c02      	adds	r2, r0, #0
    172e:	2809      	cmp	r0, #9
    1730:	d900      	bls.n	1734 <Chip_I2CM_SetBusSpeed+0x3c>
    1732:	2209      	movs	r2, #9
    1734:	b292      	uxth	r2, r2
    1736:	3b02      	subs	r3, #2
    1738:	3a02      	subs	r2, #2
    173a:	011b      	lsls	r3, r3, #4
    173c:	4313      	orrs	r3, r2
    173e:	6263      	str	r3, [r4, #36]	; 0x24
    1740:	bd38      	pop	{r3, r4, r5, pc}

00001742 <Chip_I2CM_XferHandler>:
    1742:	2210      	movs	r2, #16
    1744:	1c03      	adds	r3, r0, #0
    1746:	6840      	ldr	r0, [r0, #4]
    1748:	b510      	push	{r4, lr}
    174a:	4210      	tst	r0, r2
    174c:	d001      	beq.n	1752 <Chip_I2CM_XferHandler+0x10>
    174e:	2005      	movs	r0, #5
    1750:	e003      	b.n	175a <Chip_I2CM_XferHandler+0x18>
    1752:	2240      	movs	r2, #64	; 0x40
    1754:	4210      	tst	r0, r2
    1756:	d003      	beq.n	1760 <Chip_I2CM_XferHandler+0x1e>
    1758:	2003      	movs	r0, #3
    175a:	8188      	strh	r0, [r1, #12]
    175c:	605a      	str	r2, [r3, #4]
    175e:	e03b      	b.n	17d8 <Chip_I2CM_XferHandler+0x96>
    1760:	2201      	movs	r2, #1
    1762:	4210      	tst	r0, r2
    1764:	d037      	beq.n	17d6 <Chip_I2CM_XferHandler+0x94>
    1766:	6858      	ldr	r0, [r3, #4]
    1768:	0700      	lsls	r0, r0, #28
    176a:	0f40      	lsrs	r0, r0, #29
    176c:	2804      	cmp	r0, #4
    176e:	d832      	bhi.n	17d6 <Chip_I2CM_XferHandler+0x94>
    1770:	f000 f963 	bl	1a3a <__gnu_thumb1_case_uqi>
    1774:	2a120603 	bcs	482f88 <__top_MFlash32+0x47af88>
    1778:	2201002e 	andcs	r0, r1, #46	; 0x2e
    177c:	60da      	str	r2, [r3, #12]
    177e:	e02b      	b.n	17d8 <Chip_I2CM_XferHandler+0x96>
    1780:	684a      	ldr	r2, [r1, #4]
    1782:	1c50      	adds	r0, r2, #1
    1784:	6048      	str	r0, [r1, #4]
    1786:	6a98      	ldr	r0, [r3, #40]	; 0x28
    1788:	7010      	strb	r0, [r2, #0]
    178a:	894a      	ldrh	r2, [r1, #10]
    178c:	3a01      	subs	r2, #1
    178e:	b292      	uxth	r2, r2
    1790:	814a      	strh	r2, [r1, #10]
    1792:	2a00      	cmp	r2, #0
    1794:	d019      	beq.n	17ca <Chip_I2CM_XferHandler+0x88>
    1796:	e009      	b.n	17ac <Chip_I2CM_XferHandler+0x6a>
    1798:	890a      	ldrh	r2, [r1, #8]
    179a:	2a00      	cmp	r2, #0
    179c:	d008      	beq.n	17b0 <Chip_I2CM_XferHandler+0x6e>
    179e:	6808      	ldr	r0, [r1, #0]
    17a0:	3a01      	subs	r2, #1
    17a2:	1c44      	adds	r4, r0, #1
    17a4:	600c      	str	r4, [r1, #0]
    17a6:	7800      	ldrb	r0, [r0, #0]
    17a8:	6298      	str	r0, [r3, #40]	; 0x28
    17aa:	810a      	strh	r2, [r1, #8]
    17ac:	2201      	movs	r2, #1
    17ae:	e009      	b.n	17c4 <Chip_I2CM_XferHandler+0x82>
    17b0:	894a      	ldrh	r2, [r1, #10]
    17b2:	2a00      	cmp	r2, #0
    17b4:	d009      	beq.n	17ca <Chip_I2CM_XferHandler+0x88>
    17b6:	2001      	movs	r0, #1
    17b8:	7b8a      	ldrb	r2, [r1, #14]
    17ba:	0052      	lsls	r2, r2, #1
    17bc:	4302      	orrs	r2, r0
    17be:	b2d2      	uxtb	r2, r2
    17c0:	629a      	str	r2, [r3, #40]	; 0x28
    17c2:	2202      	movs	r2, #2
    17c4:	621a      	str	r2, [r3, #32]
    17c6:	e007      	b.n	17d8 <Chip_I2CM_XferHandler+0x96>
    17c8:	2202      	movs	r2, #2
    17ca:	818a      	strh	r2, [r1, #12]
    17cc:	2204      	movs	r2, #4
    17ce:	e7f9      	b.n	17c4 <Chip_I2CM_XferHandler+0x82>
    17d0:	2204      	movs	r2, #4
    17d2:	818a      	strh	r2, [r1, #12]
    17d4:	e7f6      	b.n	17c4 <Chip_I2CM_XferHandler+0x82>
    17d6:	818a      	strh	r2, [r1, #12]
    17d8:	8988      	ldrh	r0, [r1, #12]
    17da:	38ff      	subs	r0, #255	; 0xff
    17dc:	1e43      	subs	r3, r0, #1
    17de:	4198      	sbcs	r0, r3
    17e0:	bd10      	pop	{r4, pc}

000017e2 <Chip_I2CM_Xfer>:
    17e2:	23ff      	movs	r3, #255	; 0xff
    17e4:	818b      	strh	r3, [r1, #12]
    17e6:	3baf      	subs	r3, #175	; 0xaf
    17e8:	6043      	str	r3, [r0, #4]
    17ea:	7b8b      	ldrb	r3, [r1, #14]
    17ec:	005a      	lsls	r2, r3, #1
    17ee:	890b      	ldrh	r3, [r1, #8]
    17f0:	4259      	negs	r1, r3
    17f2:	414b      	adcs	r3, r1
    17f4:	4313      	orrs	r3, r2
    17f6:	b2db      	uxtb	r3, r3
    17f8:	6283      	str	r3, [r0, #40]	; 0x28
    17fa:	2302      	movs	r3, #2
    17fc:	6203      	str	r3, [r0, #32]
    17fe:	4770      	bx	lr

00001800 <Chip_I2CM_XferBlocking>:
    1800:	b538      	push	{r3, r4, r5, lr}
    1802:	1c04      	adds	r4, r0, #0
    1804:	1c0d      	adds	r5, r1, #0
    1806:	f7ff ffec 	bl	17e2 <Chip_I2CM_Xfer>
    180a:	6863      	ldr	r3, [r4, #4]
    180c:	07db      	lsls	r3, r3, #31
    180e:	d5fc      	bpl.n	180a <Chip_I2CM_XferBlocking+0xa>
    1810:	1c20      	adds	r0, r4, #0
    1812:	1c29      	adds	r1, r5, #0
    1814:	f7ff ff95 	bl	1742 <Chip_I2CM_XferHandler>
    1818:	2800      	cmp	r0, #0
    181a:	d0f6      	beq.n	180a <Chip_I2CM_XferBlocking+0xa>
    181c:	bd38      	pop	{r3, r4, r5, pc}
	...

00001820 <Chip_SYSCTL_PowerDown>:
    1820:	228e      	movs	r2, #142	; 0x8e
    1822:	4905      	ldr	r1, [pc, #20]	; (1838 <Chip_SYSCTL_PowerDown+0x18>)
    1824:	0092      	lsls	r2, r2, #2
    1826:	588b      	ldr	r3, [r1, r2]
    1828:	4318      	orrs	r0, r3
    182a:	4b04      	ldr	r3, [pc, #16]	; (183c <Chip_SYSCTL_PowerDown+0x1c>)
    182c:	4018      	ands	r0, r3
    182e:	23da      	movs	r3, #218	; 0xda
    1830:	01db      	lsls	r3, r3, #7
    1832:	4318      	orrs	r0, r3
    1834:	5088      	str	r0, [r1, r2]
    1836:	4770      	bx	lr
    1838:	40048000 	andmi	r8, r4, r0
    183c:	000080ff 	strdeq	r8, [r0], -pc	; <UNPREDICTABLE>

00001840 <Chip_SYSCTL_PowerUp>:
    1840:	218e      	movs	r1, #142	; 0x8e
    1842:	b510      	push	{r4, lr}
    1844:	4c05      	ldr	r4, [pc, #20]	; (185c <Chip_SYSCTL_PowerUp+0x1c>)
    1846:	0089      	lsls	r1, r1, #2
    1848:	5863      	ldr	r3, [r4, r1]
    184a:	4a05      	ldr	r2, [pc, #20]	; (1860 <Chip_SYSCTL_PowerUp+0x20>)
    184c:	4013      	ands	r3, r2
    184e:	4002      	ands	r2, r0
    1850:	4393      	bics	r3, r2
    1852:	22da      	movs	r2, #218	; 0xda
    1854:	01d2      	lsls	r2, r2, #7
    1856:	4313      	orrs	r3, r2
    1858:	5063      	str	r3, [r4, r1]
    185a:	bd10      	pop	{r4, pc}
    185c:	40048000 	andmi	r8, r4, r0
    1860:	000080ff 	strdeq	r8, [r0], -pc	; <UNPREDICTABLE>

00001864 <memcpy>:
    1864:	b508      	push	{r3, lr}
    1866:	f000 f8bd 	bl	19e4 <__aeabi_memcpy>
    186a:	bd08      	pop	{r3, pc}

0000186c <memset>:
    186c:	b508      	push	{r3, lr}
    186e:	f000 f8cf 	bl	1a10 <__aeabi_lowlevel_memset>
    1872:	bd08      	pop	{r3, pc}

00001874 <__weak_main>:
    1874:	b508      	push	{r3, lr}
    1876:	f7ff f887 	bl	988 <main>
    187a:	bd08      	pop	{r3, pc}

0000187c <__aeabi_idiv>:
    187c:	0003      	movs	r3, r0
    187e:	430b      	orrs	r3, r1
    1880:	d421      	bmi.n	18c6 <idiv_negative>

00001882 <__aeabi_uidiv>:
    1882:	2900      	cmp	r1, #0
    1884:	d031      	beq.n	18ea <idiv_divzero>
    1886:	2201      	movs	r2, #1
    1888:	07d2      	lsls	r2, r2, #31
    188a:	0903      	lsrs	r3, r0, #4
    188c:	e001      	b.n	1892 <div_search4a>

0000188e <div_search4>:
    188e:	0109      	lsls	r1, r1, #4
    1890:	0912      	lsrs	r2, r2, #4

00001892 <div_search4a>:
    1892:	4299      	cmp	r1, r3
    1894:	d9fb      	bls.n	188e <div_search4>
    1896:	0843      	lsrs	r3, r0, #1
    1898:	e001      	b.n	189e <div_search1a>

0000189a <div_search1>:
    189a:	0049      	lsls	r1, r1, #1
    189c:	0852      	lsrs	r2, r2, #1

0000189e <div_search1a>:
    189e:	4299      	cmp	r1, r3
    18a0:	d9fb      	bls.n	189a <div_search1>
    18a2:	e000      	b.n	18a6 <div_loop1a>

000018a4 <div_loop1>:
    18a4:	0849      	lsrs	r1, r1, #1

000018a6 <div_loop1a>:
    18a6:	1a40      	subs	r0, r0, r1
    18a8:	d307      	bcc.n	18ba <div1>

000018aa <div2>:
    18aa:	4152      	adcs	r2, r2
    18ac:	d3fa      	bcc.n	18a4 <div_loop1>
    18ae:	4601      	mov	r1, r0
    18b0:	4610      	mov	r0, r2
    18b2:	4770      	bx	lr

000018b4 <div_loop2>:
    18b4:	0849      	lsrs	r1, r1, #1
    18b6:	1840      	adds	r0, r0, r1
    18b8:	d2f7      	bcs.n	18aa <div2>

000018ba <div1>:
    18ba:	1892      	adds	r2, r2, r2
    18bc:	d3fa      	bcc.n	18b4 <div_loop2>
    18be:	1840      	adds	r0, r0, r1
    18c0:	4601      	mov	r1, r0
    18c2:	4610      	mov	r0, r2
    18c4:	4770      	bx	lr

000018c6 <idiv_negative>:
    18c6:	0fcb      	lsrs	r3, r1, #31
    18c8:	d000      	beq.n	18cc <idiv_neg1>
    18ca:	4249      	negs	r1, r1

000018cc <idiv_neg1>:
    18cc:	1002      	asrs	r2, r0, #32
    18ce:	d500      	bpl.n	18d2 <idiv_neg2>
    18d0:	4240      	negs	r0, r0

000018d2 <idiv_neg2>:
    18d2:	4053      	eors	r3, r2
    18d4:	b508      	push	{r3, lr}
    18d6:	f7ff ffd4 	bl	1882 <__aeabi_uidiv>
    18da:	bc0c      	pop	{r2, r3}

000018dc <idiv_sign>:
    18dc:	1052      	asrs	r2, r2, #1
    18de:	d300      	bcc.n	18e2 <idiv_sign1>
    18e0:	4240      	negs	r0, r0

000018e2 <idiv_sign1>:
    18e2:	2a00      	cmp	r2, #0
    18e4:	d500      	bpl.n	18e8 <idiv_ret>
    18e6:	4249      	negs	r1, r1

000018e8 <idiv_ret>:
    18e8:	4718      	bx	r3

000018ea <idiv_divzero>:
    18ea:	46f4      	mov	ip, lr
    18ec:	2000      	movs	r0, #0
    18ee:	f000 f82e 	bl	194e <__aeabi_idiv0>
    18f2:	4760      	bx	ip

000018f4 <__aeabi_uldivmod>:
    18f4:	b5f0      	push	{r4, r5, r6, r7, lr}
    18f6:	0017      	movs	r7, r2
    18f8:	431f      	orrs	r7, r3
    18fa:	d023      	beq.n	1944 <ldiv_divzero>
    18fc:	2601      	movs	r6, #1
    18fe:	0844      	lsrs	r4, r0, #1
    1900:	07cf      	lsls	r7, r1, #31
    1902:	433c      	orrs	r4, r7
    1904:	084d      	lsrs	r5, r1, #1

00001906 <loop1>:
    1906:	1aa7      	subs	r7, r4, r2
    1908:	462f      	mov	r7, r5
    190a:	419f      	sbcs	r7, r3
    190c:	d303      	bcc.n	1916 <loop1_end>
    190e:	1892      	adds	r2, r2, r2
    1910:	415b      	adcs	r3, r3
    1912:	3601      	adds	r6, #1
    1914:	e7f7      	b.n	1906 <loop1>

00001916 <loop1_end>:
    1916:	2400      	movs	r4, #0
    1918:	2500      	movs	r5, #0
    191a:	e005      	b.n	1928 <loop_start>

0000191c <loop>:
    191c:	0852      	lsrs	r2, r2, #1
    191e:	07df      	lsls	r7, r3, #31
    1920:	433a      	orrs	r2, r7
    1922:	085b      	lsrs	r3, r3, #1
    1924:	1924      	adds	r4, r4, r4
    1926:	416d      	adcs	r5, r5

00001928 <loop_start>:
    1928:	1a87      	subs	r7, r0, r2
    192a:	460f      	mov	r7, r1
    192c:	419f      	sbcs	r7, r3
    192e:	d302      	bcc.n	1936 <ldiv1>
    1930:	1a80      	subs	r0, r0, r2
    1932:	4199      	sbcs	r1, r3
    1934:	3401      	adds	r4, #1

00001936 <ldiv1>:
    1936:	3e01      	subs	r6, #1
    1938:	d1f0      	bne.n	191c <loop>
    193a:	4602      	mov	r2, r0
    193c:	460b      	mov	r3, r1
    193e:	4620      	mov	r0, r4
    1940:	4629      	mov	r1, r5
    1942:	bdf0      	pop	{r4, r5, r6, r7, pc}

00001944 <ldiv_divzero>:
    1944:	2000      	movs	r0, #0
    1946:	2100      	movs	r1, #0
    1948:	f000 f801 	bl	194e <__aeabi_idiv0>
    194c:	bdf0      	pop	{r4, r5, r6, r7, pc}

0000194e <__aeabi_idiv0>:
    194e:	4770      	bx	lr

00001950 <__aeabi_f2uiz>:
    1950:	b510      	push	{r4, lr}
    1952:	2480      	movs	r4, #128	; 0x80
    1954:	239e      	movs	r3, #158	; 0x9e
    1956:	0dc1      	lsrs	r1, r0, #23
    1958:	0202      	lsls	r2, r0, #8
    195a:	0624      	lsls	r4, r4, #24
    195c:	4322      	orrs	r2, r4
    195e:	1a5b      	subs	r3, r3, r1
    1960:	d402      	bmi.n	1968 <__aeabi_f2uiz+0x18>
    1962:	40da      	lsrs	r2, r3
    1964:	1c10      	adds	r0, r2, #0
    1966:	e006      	b.n	1976 <__aeabi_f2uiz+0x26>
    1968:	29fe      	cmp	r1, #254	; 0xfe
    196a:	d902      	bls.n	1972 <__aeabi_f2uiz+0x22>
    196c:	2000      	movs	r0, #0
    196e:	42a2      	cmp	r2, r4
    1970:	d101      	bne.n	1976 <__aeabi_f2uiz+0x26>
    1972:	0a09      	lsrs	r1, r1, #8
    1974:	1e48      	subs	r0, r1, #1
    1976:	bd10      	pop	{r4, pc}

00001978 <__bhs_ui2f>:
    1978:	2800      	cmp	r0, #0
    197a:	d02b      	beq.n	19d4 <__bhs_ui2f+0x5c>
    197c:	0c03      	lsrs	r3, r0, #16
    197e:	d101      	bne.n	1984 <__bhs_ui2f+0xc>
    1980:	0400      	lsls	r0, r0, #16
    1982:	e002      	b.n	198a <__bhs_ui2f+0x12>
    1984:	2380      	movs	r3, #128	; 0x80
    1986:	051b      	lsls	r3, r3, #20
    1988:	18c9      	adds	r1, r1, r3
    198a:	0e03      	lsrs	r3, r0, #24
    198c:	d101      	bne.n	1992 <__bhs_ui2f+0x1a>
    198e:	0200      	lsls	r0, r0, #8
    1990:	e002      	b.n	1998 <__bhs_ui2f+0x20>
    1992:	2380      	movs	r3, #128	; 0x80
    1994:	04db      	lsls	r3, r3, #19
    1996:	18c9      	adds	r1, r1, r3
    1998:	0f03      	lsrs	r3, r0, #28
    199a:	d101      	bne.n	19a0 <__bhs_ui2f+0x28>
    199c:	0100      	lsls	r0, r0, #4
    199e:	e002      	b.n	19a6 <__bhs_ui2f+0x2e>
    19a0:	2380      	movs	r3, #128	; 0x80
    19a2:	049b      	lsls	r3, r3, #18
    19a4:	18c9      	adds	r1, r1, r3
    19a6:	0f83      	lsrs	r3, r0, #30
    19a8:	d101      	bne.n	19ae <__bhs_ui2f+0x36>
    19aa:	0080      	lsls	r0, r0, #2
    19ac:	e002      	b.n	19b4 <__bhs_ui2f+0x3c>
    19ae:	2380      	movs	r3, #128	; 0x80
    19b0:	045b      	lsls	r3, r3, #17
    19b2:	18c9      	adds	r1, r1, r3
    19b4:	2800      	cmp	r0, #0
    19b6:	db01      	blt.n	19bc <__bhs_ui2f+0x44>
    19b8:	0040      	lsls	r0, r0, #1
    19ba:	e002      	b.n	19c2 <__bhs_ui2f+0x4a>
    19bc:	2380      	movs	r3, #128	; 0x80
    19be:	041b      	lsls	r3, r3, #16
    19c0:	18c9      	adds	r1, r1, r3
    19c2:	3080      	adds	r0, #128	; 0x80
    19c4:	1203      	asrs	r3, r0, #8
    19c6:	1859      	adds	r1, r3, r1
    19c8:	0600      	lsls	r0, r0, #24
    19ca:	d101      	bne.n	19d0 <__bhs_ui2f+0x58>
    19cc:	2301      	movs	r3, #1
    19ce:	4399      	bics	r1, r3
    19d0:	1c08      	adds	r0, r1, #0
    19d2:	e000      	b.n	19d6 <__bhs_ui2f+0x5e>
    19d4:	2000      	movs	r0, #0
    19d6:	4770      	bx	lr

000019d8 <__aeabi_ui2f>:
    19d8:	2180      	movs	r1, #128	; 0x80
    19da:	b508      	push	{r3, lr}
    19dc:	05c9      	lsls	r1, r1, #23
    19de:	f7ff ffcb 	bl	1978 <__bhs_ui2f>
    19e2:	bd08      	pop	{r3, pc}

000019e4 <__aeabi_memcpy>:
    19e4:	4684      	mov	ip, r0
    19e6:	0783      	lsls	r3, r0, #30
    19e8:	d108      	bne.n	19fc <copy1_start>
    19ea:	078b      	lsls	r3, r1, #30
    19ec:	d106      	bne.n	19fc <copy1_start>
    19ee:	1f13      	subs	r3, r2, #4
    19f0:	d304      	bcc.n	19fc <copy1_start>

000019f2 <copy4>:
    19f2:	c904      	ldmia	r1!, {r2}
    19f4:	c004      	stmia	r0!, {r2}
    19f6:	3b04      	subs	r3, #4
    19f8:	d2fb      	bcs.n	19f2 <copy4>
    19fa:	1d1a      	adds	r2, r3, #4

000019fc <copy1_start>:
    19fc:	4252      	negs	r2, r2
    19fe:	d005      	beq.n	1a0c <copy1_ret>
    1a00:	1a89      	subs	r1, r1, r2
    1a02:	1a80      	subs	r0, r0, r2

00001a04 <copy1>:
    1a04:	5c8b      	ldrb	r3, [r1, r2]
    1a06:	5483      	strb	r3, [r0, r2]
    1a08:	3201      	adds	r2, #1
    1a0a:	d1fb      	bne.n	1a04 <copy1>

00001a0c <copy1_ret>:
    1a0c:	4660      	mov	r0, ip
    1a0e:	4770      	bx	lr

00001a10 <__aeabi_lowlevel_memset>:
    1a10:	4684      	mov	ip, r0
    1a12:	3a04      	subs	r2, #4
    1a14:	d309      	bcc.n	1a2a <memset1>
    1a16:	0783      	lsls	r3, r0, #30
    1a18:	d107      	bne.n	1a2a <memset1>
    1a1a:	0609      	lsls	r1, r1, #24
    1a1c:	0a0b      	lsrs	r3, r1, #8
    1a1e:	4319      	orrs	r1, r3
    1a20:	0c0b      	lsrs	r3, r1, #16
    1a22:	4319      	orrs	r1, r3

00001a24 <memset4>:
    1a24:	3a04      	subs	r2, #4
    1a26:	c002      	stmia	r0!, {r1}
    1a28:	d2fc      	bcs.n	1a24 <memset4>

00001a2a <memset1>:
    1a2a:	3204      	adds	r2, #4
    1a2c:	d003      	beq.n	1a36 <memset1_ret>

00001a2e <memset1a>:
    1a2e:	7001      	strb	r1, [r0, #0]
    1a30:	3001      	adds	r0, #1
    1a32:	3a01      	subs	r2, #1
    1a34:	d1fb      	bne.n	1a2e <memset1a>

00001a36 <memset1_ret>:
    1a36:	4660      	mov	r0, ip
    1a38:	4770      	bx	lr

00001a3a <__gnu_thumb1_case_uqi>:
    1a3a:	468c      	mov	ip, r1
    1a3c:	4671      	mov	r1, lr
    1a3e:	3901      	subs	r1, #1
    1a40:	5c09      	ldrb	r1, [r1, r0]
    1a42:	0049      	lsls	r1, r1, #1
    1a44:	448e      	add	lr, r1
    1a46:	4661      	mov	r1, ip
    1a48:	4770      	bx	lr
    1a4a:	37314338 			; <UNDEFINED> instruction: 0x37314338
    1a4e:	382d3131 	stmdacc	sp!, {r0, r4, r5, r8, ip, sp}
    1a52:	30646338 	rsbcc	r6, r4, r8, lsr r3
    1a56:	00303030 	eorseq	r3, r0, r0, lsr r0
	...

00001a5c <OscRateIn>:
    1a5c:	00b71b00 	adcseq	r1, r7, r0, lsl #22

00001a60 <ExtRateIn>:
    1a60:	00000000 	andeq	r0, r0, r0

00001a64 <wdtOSCRate>:
    1a64:	00000000 	andeq	r0, r0, r0
    1a68:	000927c0 	andeq	r2, r9, r0, asr #15
    1a6c:	00100590 	mulseq	r0, r0, r5
    1a70:	00155cc0 	andseq	r5, r5, r0, asr #25
    1a74:	001ab3f0 			; <UNDEFINED> instruction: 0x001ab3f0
    1a78:	00200b20 	eoreq	r0, r0, r0, lsr #22
    1a7c:	00249f00 	eoreq	r9, r4, r0, lsl #30
    1a80:	002932e0 	eoreq	r3, r9, r0, ror #5
    1a84:	002dc6c0 	eoreq	ip, sp, r0, asr #13
    1a88:	00319750 	eorseq	r9, r1, r0, asr r7
    1a8c:	003567e0 	eorseq	r6, r5, r0, ror #15
    1a90:	00393870 	eorseq	r3, r9, r0, ror r8
    1a94:	003d0900 	eorseq	r0, sp, r0, lsl #18
    1a98:	00401640 	subeq	r1, r0, r0, asr #12
    1a9c:	00432380 	subeq	r2, r3, r0, lsl #7
    1aa0:	004630c0 	subeq	r3, r6, r0, asr #1

00001aa4 <config_tab>:
    1aa4:	000c000c 	andeq	r0, ip, ip
    1aa8:	000000c0 	andeq	r0, r0, r0, asr #1
    1aac:	00010003 	andeq	r0, r1, r3
    1ab0:	0006000c 	andeq	r0, r6, ip
    1ab4:	000000c0 	andeq	r0, r0, r0, asr #1
    1ab8:	00020003 	andeq	r0, r2, r3
    1abc:	0004000c 	andeq	r0, r4, ip
    1ac0:	000000c0 	andeq	r0, r0, r0, asr #1
    1ac4:	00030003 	andeq	r0, r3, r3
    1ac8:	0003000c 	andeq	r0, r3, ip
    1acc:	000000c0 	andeq	r0, r0, r0, asr #1
    1ad0:	00040003 	andeq	r0, r4, r3
    1ad4:	0002000c 	andeq	r0, r2, ip
    1ad8:	000000c0 	andeq	r0, r0, r0, asr #1
    1adc:	00060003 	andeq	r0, r6, r3
    1ae0:	0001000c 	andeq	r0, r1, ip
    1ae4:	000000c0 	andeq	r0, r0, r0, asr #1
    1ae8:	000c0003 	andeq	r0, ip, r3
    1aec:	00180018 	andseq	r0, r8, r8, lsl r0
    1af0:	000100c0 	andeq	r0, r1, r0, asr #1
    1af4:	00010002 	andeq	r0, r1, r2
    1af8:	000c0018 	andeq	r0, ip, r8, lsl r0
    1afc:	000100c0 	andeq	r0, r1, r0, asr #1
    1b00:	00020002 	andeq	r0, r2, r2
    1b04:	00080018 	andeq	r0, r8, r8, lsl r0
    1b08:	000100c0 	andeq	r0, r1, r0, asr #1
    1b0c:	00030002 	andeq	r0, r3, r2
    1b10:	00060018 	andeq	r0, r6, r8, lsl r0
    1b14:	000100c0 	andeq	r0, r1, r0, asr #1
    1b18:	00040002 	andeq	r0, r4, r2
    1b1c:	00040018 	andeq	r0, r4, r8, lsl r0
    1b20:	000100c0 	andeq	r0, r1, r0, asr #1
    1b24:	00060002 	andeq	r0, r6, r2
    1b28:	00030018 	andeq	r0, r3, r8, lsl r0
    1b2c:	000100c0 	andeq	r0, r1, r0, asr #1
    1b30:	00080002 	andeq	r0, r8, r2
    1b34:	00020018 	andeq	r0, r2, r8, lsl r0
    1b38:	000100c0 	andeq	r0, r1, r0, asr #1
    1b3c:	000c0002 	andeq	r0, ip, r2
    1b40:	00010018 	andeq	r0, r1, r8, lsl r0
    1b44:	000100c0 	andeq	r0, r1, r0, asr #1
    1b48:	00180002 	andseq	r0, r8, r2
    1b4c:	00120024 	andseq	r0, r2, r4, lsr #32
    1b50:	00020120 	andeq	r0, r2, r0, lsr #2
    1b54:	00020002 	andeq	r0, r2, r2
    1b58:	000c0024 	andeq	r0, ip, r4, lsr #32
    1b5c:	00020120 	andeq	r0, r2, r0, lsr #2
    1b60:	00030002 	andeq	r0, r3, r2
    1b64:	00090024 	andeq	r0, r9, r4, lsr #32
    1b68:	00020120 	andeq	r0, r2, r0, lsr #2
    1b6c:	00040002 	andeq	r0, r4, r2
    1b70:	00060024 	andeq	r0, r6, r4, lsr #32
    1b74:	00020120 	andeq	r0, r2, r0, lsr #2
    1b78:	00060002 	andeq	r0, r6, r2
    1b7c:	00040024 	andeq	r0, r4, r4, lsr #32
    1b80:	00020120 	andeq	r0, r2, r0, lsr #2
    1b84:	00090002 	andeq	r0, r9, r2
    1b88:	00030024 	andeq	r0, r3, r4, lsr #32
    1b8c:	00020120 	andeq	r0, r2, r0, lsr #2
    1b90:	000c0002 	andeq	r0, ip, r2
    1b94:	00020024 	andeq	r0, r2, r4, lsr #32
    1b98:	00020120 	andeq	r0, r2, r0, lsr #2
    1b9c:	00120002 	andseq	r0, r2, r2
    1ba0:	00010024 	andeq	r0, r1, r4, lsr #32
    1ba4:	00020120 	andeq	r0, r2, r0, lsr #2
    1ba8:	00240002 	eoreq	r0, r4, r2
    1bac:	00180030 	andseq	r0, r8, r0, lsr r0
    1bb0:	000300c0 	andeq	r0, r3, r0, asr #1
    1bb4:	00020001 	andeq	r0, r2, r1
    1bb8:	00100030 	andseq	r0, r0, r0, lsr r0
    1bbc:	000300c0 	andeq	r0, r3, r0, asr #1
    1bc0:	00030001 	andeq	r0, r3, r1
    1bc4:	000c0030 	andeq	r0, ip, r0, lsr r0
    1bc8:	000300c0 	andeq	r0, r3, r0, asr #1
    1bcc:	00040001 	andeq	r0, r4, r1
    1bd0:	00080030 	andeq	r0, r8, r0, lsr r0
    1bd4:	000300c0 	andeq	r0, r3, r0, asr #1
    1bd8:	00060001 	andeq	r0, r6, r1
    1bdc:	00060030 	andeq	r0, r6, r0, lsr r0
    1be0:	000300c0 	andeq	r0, r3, r0, asr #1
    1be4:	00080001 	andeq	r0, r8, r1
    1be8:	00040030 	andeq	r0, r4, r0, lsr r0
    1bec:	000300c0 	andeq	r0, r3, r0, asr #1
    1bf0:	000c0001 	andeq	r0, ip, r1
    1bf4:	00030030 	andeq	r0, r3, r0, lsr r0
    1bf8:	000300c0 	andeq	r0, r3, r0, asr #1
    1bfc:	00100001 	andseq	r0, r0, r1
    1c00:	00020030 	andeq	r0, r2, r0, lsr r0
    1c04:	000300c0 	andeq	r0, r3, r0, asr #1
    1c08:	00180001 	andseq	r0, r8, r1
    1c0c:	00010030 	andeq	r0, r1, r0, lsr r0
    1c10:	000300c0 	andeq	r0, r3, r0, asr #1
    1c14:	00300001 	eorseq	r0, r0, r1
    1c18:	001e003c 	andseq	r0, lr, ip, lsr r0
    1c1c:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c20:	00020001 	andeq	r0, r2, r1
    1c24:	0014003c 	andseq	r0, r4, ip, lsr r0
    1c28:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c2c:	00030001 	andeq	r0, r3, r1
    1c30:	000f003c 	andeq	r0, pc, ip, lsr r0	; <UNPREDICTABLE>
    1c34:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c38:	00040001 	andeq	r0, r4, r1
    1c3c:	000c003c 	andeq	r0, ip, ip, lsr r0
    1c40:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c44:	00050001 	andeq	r0, r5, r1
    1c48:	000a003c 	andeq	r0, sl, ip, lsr r0
    1c4c:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c50:	00060001 	andeq	r0, r6, r1
    1c54:	0006003c 	andeq	r0, r6, ip, lsr r0
    1c58:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c5c:	000a0001 	andeq	r0, sl, r1
    1c60:	0005003c 	andeq	r0, r5, ip, lsr r0
    1c64:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c68:	000c0001 	andeq	r0, ip, r1
    1c6c:	0004003c 	andeq	r0, r4, ip, lsr r0
    1c70:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c74:	000f0001 	andeq	r0, pc, r1
    1c78:	0003003c 	andeq	r0, r3, ip, lsr r0
    1c7c:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c80:	00140001 	andseq	r0, r4, r1
    1c84:	0002003c 	andeq	r0, r2, ip, lsr r0
    1c88:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c8c:	001e0001 	andseq	r0, lr, r1
    1c90:	0001003c 	andeq	r0, r1, ip, lsr r0
    1c94:	000400f0 	strdeq	r0, [r4], -r0	; <UNPREDICTABLE>
    1c98:	003c0001 	eorseq	r0, ip, r1
    1c9c:	00180048 	andseq	r0, r8, r8, asr #32
    1ca0:	00050120 	andeq	r0, r5, r0, lsr #2
    1ca4:	00030001 	andeq	r0, r3, r1
    1ca8:	00120048 	andseq	r0, r2, r8, asr #32
    1cac:	00050120 	andeq	r0, r5, r0, lsr #2
    1cb0:	00040001 	andeq	r0, r4, r1
    1cb4:	000c0048 	andeq	r0, ip, r8, asr #32
    1cb8:	00050120 	andeq	r0, r5, r0, lsr #2
    1cbc:	00060001 	andeq	r0, r6, r1
    1cc0:	00090048 	andeq	r0, r9, r8, asr #32
    1cc4:	00050120 	andeq	r0, r5, r0, lsr #2
    1cc8:	00080001 	andeq	r0, r8, r1
    1ccc:	00080048 	andeq	r0, r8, r8, asr #32
    1cd0:	00050120 	andeq	r0, r5, r0, lsr #2
    1cd4:	00090001 	andeq	r0, r9, r1
    1cd8:	00060048 	andeq	r0, r6, r8, asr #32
    1cdc:	00050120 	andeq	r0, r5, r0, lsr #2
    1ce0:	000c0001 	andeq	r0, ip, r1
    1ce4:	00040048 	andeq	r0, r4, r8, asr #32
    1ce8:	00050120 	andeq	r0, r5, r0, lsr #2
    1cec:	00120001 	andseq	r0, r2, r1
    1cf0:	00030048 	andeq	r0, r3, r8, asr #32
    1cf4:	00050120 	andeq	r0, r5, r0, lsr #2
    1cf8:	00180001 	andseq	r0, r8, r1
    1cfc:	00020048 	andeq	r0, r2, r8, asr #32
    1d00:	00050120 	andeq	r0, r5, r0, lsr #2
    1d04:	00240001 	eoreq	r0, r4, r1
    1d08:	00010048 	andeq	r0, r1, r8, asr #32
    1d0c:	00050120 	andeq	r0, r5, r0, lsr #2
    1d10:	00480001 	subeq	r0, r8, r1
    1d14:	001c0054 	andseq	r0, ip, r4, asr r0
    1d18:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d1c:	00030000 	andeq	r0, r3, r0
    1d20:	00150054 	andseq	r0, r5, r4, asr r0
    1d24:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d28:	00040000 	andeq	r0, r4, r0
    1d2c:	000e0054 	andeq	r0, lr, r4, asr r0
    1d30:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d34:	00060000 	andeq	r0, r6, r0
    1d38:	000c0054 	andeq	r0, ip, r4, asr r0
    1d3c:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d40:	00070000 	andeq	r0, r7, r0
    1d44:	00070054 	andeq	r0, r7, r4, asr r0
    1d48:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d4c:	000c0000 	andeq	r0, ip, r0
    1d50:	00060054 	andeq	r0, r6, r4, asr r0
    1d54:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d58:	000e0000 	andeq	r0, lr, r0
    1d5c:	00040054 	andeq	r0, r4, r4, asr r0
    1d60:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d64:	00150000 	andseq	r0, r5, r0
    1d68:	00030054 	andeq	r0, r3, r4, asr r0
    1d6c:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d70:	001c0000 	andseq	r0, ip, r0
    1d74:	00020054 	andeq	r0, r2, r4, asr r0
    1d78:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d7c:	002a0000 	eoreq	r0, sl, r0
    1d80:	00010054 	andeq	r0, r1, r4, asr r0
    1d84:	000600a8 	andeq	r0, r6, r8, lsr #1
    1d88:	00540000 	subseq	r0, r4, r0
    1d8c:	00180060 	andseq	r0, r8, r0, rrx
    1d90:	000700c0 	andeq	r0, r7, r0, asr #1
    1d94:	00040000 	andeq	r0, r4, r0
    1d98:	00100060 	andseq	r0, r0, r0, rrx
    1d9c:	000700c0 	andeq	r0, r7, r0, asr #1
    1da0:	00060000 	andeq	r0, r6, r0
    1da4:	000c0060 	andeq	r0, ip, r0, rrx
    1da8:	000700c0 	andeq	r0, r7, r0, asr #1
    1dac:	00080000 	andeq	r0, r8, r0
    1db0:	00080060 	andeq	r0, r8, r0, rrx
    1db4:	000700c0 	andeq	r0, r7, r0, asr #1
    1db8:	000c0000 	andeq	r0, ip, r0
    1dbc:	00060060 	andeq	r0, r6, r0, rrx
    1dc0:	000700c0 	andeq	r0, r7, r0, asr #1
    1dc4:	00100000 	andseq	r0, r0, r0
    1dc8:	00040060 	andeq	r0, r4, r0, rrx
    1dcc:	000700c0 	andeq	r0, r7, r0, asr #1
    1dd0:	00180000 	andseq	r0, r8, r0
    1dd4:	00030060 	andeq	r0, r3, r0, rrx
    1dd8:	000700c0 	andeq	r0, r7, r0, asr #1
    1ddc:	00200000 	eoreq	r0, r0, r0
    1de0:	00020060 	andeq	r0, r2, r0, rrx
    1de4:	000700c0 	andeq	r0, r7, r0, asr #1
    1de8:	00300000 	eorseq	r0, r0, r0
    1dec:	00010060 	andeq	r0, r1, r0, rrx
    1df0:	000700c0 	andeq	r0, r7, r0, asr #1
    1df4:	00600000 	rsbeq	r0, r0, r0

Disassembly of section .bss:

10000000 <_bss>:
10000000:	00000000 	andeq	r0, r0, r0

10000004 <open_12v_1f.7110>:
10000004:	00000000 	andeq	r0, r0, r0

10000008 <led_blink_flag>:
10000008:	00000000 	andeq	r0, r0, r0

1000000c <open_12v_2t.7114>:
	...

1000000e <led_state>:
1000000e:	00000000 	andeq	r0, r0, r0

10000012 <open_12v_2f.7118>:
	...

10000013 <open_12v_1t.7106>:
	...

10000014 <g_dna>:
	...

1000001c <g_ackpkg>:
	...

10000044 <g_adc_buf>:
	...

10000062 <g_adc_val>:
	...

1000006c <adc_cnt.7255>:
	...

1000006e <g_reqpkg>:
	...

10000096 <g_ntc_max>:
10000096:	00000000 	andeq	r0, r0, r0

1000009a <uart_rxdata>:
	...

1000013c <uart_rxrb>:
	...

10000150 <uart_txrb>:
	...

10000164 <uart_txdata>:
	...

10000204 <config_tab_idx>:
10000204:	00000000 	andeq	r0, r0, r0

10000208 <tmrlist>:
	...

100002a8 <SystemCoreClock>:
100002a8:	00000000 	andeq	r0, r0, r0

Disassembly of section .comment:

00000000 <.comment>:
   0:	3a434347 	bcc	10d0d24 <__top_MFlash32+0x10c8d24>
   4:	4e472820 	cdpmi	8, 4, cr2, cr7, cr0, {1}
   8:	6f542055 	svcvs	0x00542055
   c:	20736c6f 	rsbscs	r6, r3, pc, ror #24
  10:	20726f66 	rsbscs	r6, r2, r6, ror #30
  14:	204d5241 	subcs	r5, sp, r1, asr #4
  18:	65626d45 	strbvs	r6, [r2, #-3397]!	; 0xd45
  1c:	64656464 	strbtvs	r6, [r5], #-1124	; 0x464
  20:	6f725020 	svcvs	0x00725020
  24:	73736563 	cmnvc	r3, #415236096	; 0x18c00000
  28:	2973726f 	ldmdbcs	r3!, {r0, r1, r2, r3, r5, r6, r9, ip, sp, lr}^
  2c:	392e3420 	stmdbcc	lr!, {r5, sl, ip, sp}
  30:	3220332e 	eorcc	r3, r0, #-1207959552	; 0xb8000000
  34:	30353130 	eorscc	r3, r5, r0, lsr r1
  38:	20393235 	eorscs	r3, r9, r5, lsr r2
  3c:	6c657228 	sfmvs	f7, 2, [r5], #-160	; 0xffffff60
  40:	65736165 	ldrbvs	r6, [r3, #-357]!	; 0x165
  44:	415b2029 	cmpmi	fp, r9, lsr #32
  48:	652f4d52 	strvs	r4, [pc, #-3410]!	; fffff2fe <_vStackTop+0xefffd2fe>
  4c:	6465626d 	strbtvs	r6, [r5], #-621	; 0x26d
  50:	2d646564 	cfstr64cs	mvdx6, [r4, #-400]!	; 0xfffffe70
  54:	2d395f34 	ldccs	15, cr5, [r9, #-208]!	; 0xffffff30
  58:	6e617262 	cdpvs	2, 6, cr7, cr1, cr2, {3}
  5c:	72206863 	eorvc	r6, r0, #6488064	; 0x630000
  60:	73697665 	cmnvc	r9, #105906176	; 0x6500000
  64:	206e6f69 	rsbcs	r6, lr, r9, ror #30
  68:	32343232 	eorscc	r3, r4, #536870915	; 0x20000003
  6c:	005d3838 	subseq	r3, sp, r8, lsr r8

Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:
   0:	00002e41 	andeq	r2, r0, r1, asr #28
   4:	61656100 	cmnvs	r5, r0, lsl #2
   8:	01006962 	tsteq	r0, r2, ror #18
   c:	00000024 	andeq	r0, r0, r4, lsr #32
  10:	726f4305 	rsbvc	r4, pc, #335544320	; 0x14000000
  14:	2d786574 	cfldr64cs	mvdx6, [r8, #-464]!	; 0xfffffe30
  18:	0600304d 	streq	r3, [r0], -sp, asr #32
  1c:	094d070c 	stmdbeq	sp, {r2, r3, r8, r9, sl}^
  20:	14041201 	strne	r1, [r4], #-513	; 0x201
  24:	17011501 	strne	r1, [r1, -r1, lsl #10]
  28:	1a011803 	bne	4603c <__top_MFlash32+0x3e03c>
  2c:	Address 0x0000002c is out of bounds.

