
pmu741.axf:     file format elf32-littlearm


Disassembly of section .text:

00000000 <g_pfnVectors>:
       0:	10001000 	andne	r1, r0, r0
       4:	00000103 	andeq	r0, r0, r3, lsl #2
       8:	000000d5 	ldrdeq	r0, [r0], -r5
       c:	000000d7 	ldrdeq	r0, [r0], -r7
	...
      2c:	000000d9 	ldrdeq	r0, [r0], -r9
	...
      38:	000000db 	ldrdeq	r0, [r0], -fp
      3c:	000000dd 	ldrdeq	r0, [r0], -sp
      40:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      44:	00000411 	andeq	r0, r0, r1, lsl r4
      48:	00000431 	andeq	r0, r0, r1, lsr r4
      4c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      50:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      54:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      58:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      5c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      60:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      64:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      78:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      7c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      80:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      84:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      88:	00000db1 			; <UNDEFINED> instruction: 0x00000db1
      8c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      90:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      94:	00000d01 	andeq	r0, r0, r1, lsl #26
      98:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      9c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      a0:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      a4:	00000921 	andeq	r0, r0, r1, lsr #18
      a8:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      ac:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      b8:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      bc:	00000000 	andeq	r0, r0, r0

000000c0 <__data_section_table>:
      c0:	00001a78 	andeq	r1, r0, r8, ror sl
      c4:	10000000 	andne	r0, r0, r0
      c8:	00000008 	andeq	r0, r0, r8

000000cc <__bss_section_table>:
      cc:	10000008 	andne	r0, r0, r8
      d0:	000002b4 			; <UNDEFINED> instruction: 0x000002b4

000000d4 <NMI_Handler>:
      d4:	e7fe      	b.n	d4 <NMI_Handler>

000000d6 <HardFault_Handler>:
      d6:	e7fe      	b.n	d6 <HardFault_Handler>

000000d8 <SVC_Handler>:
      d8:	e7fe      	b.n	d8 <SVC_Handler>

000000da <PendSV_Handler>:
      da:	e7fe      	b.n	da <PendSV_Handler>

000000dc <SysTick_Handler>:
      dc:	e7fe      	b.n	dc <SysTick_Handler>

000000de <ADC_IRQHandler>:
      de:	e7fe      	b.n	de <ADC_IRQHandler>

000000e0 <data_init>:
      e0:	2300      	movs	r3, #0
      e2:	b510      	push	{r4, lr}
      e4:	4293      	cmp	r3, r2
      e6:	d203      	bcs.n	f0 <data_init+0x10>
      e8:	581c      	ldr	r4, [r3, r0]
      ea:	505c      	str	r4, [r3, r1]
      ec:	3304      	adds	r3, #4
      ee:	e7f9      	b.n	e4 <data_init+0x4>
      f0:	bd10      	pop	{r4, pc}

000000f2 <bss_init>:
      f2:	2300      	movs	r3, #0
      f4:	428b      	cmp	r3, r1
      f6:	d203      	bcs.n	100 <bss_init+0xe>
      f8:	2200      	movs	r2, #0
      fa:	501a      	str	r2, [r3, r0]
      fc:	3304      	adds	r3, #4
      fe:	e7f9      	b.n	f4 <bss_init+0x2>
     100:	4770      	bx	lr

00000102 <ResetISR>:
     102:	b510      	push	{r4, lr}
     104:	4c0c      	ldr	r4, [pc, #48]	; (138 <ResetISR+0x36>)
     106:	4b0d      	ldr	r3, [pc, #52]	; (13c <ResetISR+0x3a>)
     108:	429c      	cmp	r4, r3
     10a:	d206      	bcs.n	11a <ResetISR+0x18>
     10c:	6820      	ldr	r0, [r4, #0]
     10e:	6861      	ldr	r1, [r4, #4]
     110:	68a2      	ldr	r2, [r4, #8]
     112:	f7ff ffe5 	bl	e0 <data_init>
     116:	340c      	adds	r4, #12
     118:	e7f5      	b.n	106 <ResetISR+0x4>
     11a:	4b09      	ldr	r3, [pc, #36]	; (140 <ResetISR+0x3e>)
     11c:	429c      	cmp	r4, r3
     11e:	d205      	bcs.n	12c <ResetISR+0x2a>
     120:	6820      	ldr	r0, [r4, #0]
     122:	6861      	ldr	r1, [r4, #4]
     124:	f7ff ffe5 	bl	f2 <bss_init>
     128:	3408      	adds	r4, #8
     12a:	e7f6      	b.n	11a <ResetISR+0x18>
     12c:	f000 fd94 	bl	c58 <SystemInit>
     130:	f001 fa12 	bl	1558 <__weak_main>
     134:	e7fe      	b.n	134 <ResetISR+0x32>
     136:	46c0      	nop			; (mov r8, r8)
     138:	000000c0 	andeq	r0, r0, r0, asr #1
     13c:	000000cc 	andeq	r0, r0, ip, asr #1
     140:	000000d4 	ldrdeq	r0, [r0], -r4
     144:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     148:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     14c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     150:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     154:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     158:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     15c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     160:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     164:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     168:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     16c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     170:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     174:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     178:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     17c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     180:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     184:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     188:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     18c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     190:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     194:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     198:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     19c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     200:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     204:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     208:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     20c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     210:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     214:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     218:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     21c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     220:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     224:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     228:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     22c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     230:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     234:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     238:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     23c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     240:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     244:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     248:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     24c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     250:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     254:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     258:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     25c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     260:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     264:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     268:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     26c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     270:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     274:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     278:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     27c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     280:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     284:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     288:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     28c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     290:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     294:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     298:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     29c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

000002fc <CRP_WORD>:
     2fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

00000300 <shitfer>:
     300:	2308      	movs	r3, #8
     302:	2280      	movs	r2, #128	; 0x80
     304:	b530      	push	{r4, r5, lr}
     306:	1c04      	adds	r4, r0, #0
     308:	4014      	ands	r4, r2
     30a:	1e65      	subs	r5, r4, #1
     30c:	41ac      	sbcs	r4, r5
     30e:	0049      	lsls	r1, r1, #1
     310:	1909      	adds	r1, r1, r4
     312:	4c06      	ldr	r4, [pc, #24]	; (32c <shitfer+0x2c>)
     314:	0852      	lsrs	r2, r2, #1
     316:	42a1      	cmp	r1, r4
     318:	d902      	bls.n	320 <shitfer+0x20>
     31a:	4c05      	ldr	r4, [pc, #20]	; (330 <shitfer+0x30>)
     31c:	b289      	uxth	r1, r1
     31e:	4061      	eors	r1, r4
     320:	3b01      	subs	r3, #1
     322:	2b00      	cmp	r3, #0
     324:	d1ef      	bne.n	306 <shitfer+0x6>
     326:	b288      	uxth	r0, r1
     328:	bd30      	pop	{r4, r5, pc}
     32a:	46c0      	nop			; (mov r8, r8)
     32c:	0000ffff 	strdeq	pc, [r0], -pc	; <UNPREDICTABLE>
     330:	00001021 	andeq	r1, r0, r1, lsr #32

00000334 <crc16>:
     334:	b570      	push	{r4, r5, r6, lr}
     336:	1c0e      	adds	r6, r1, #0
     338:	1c05      	adds	r5, r0, #0
     33a:	1c04      	adds	r4, r0, #0
     33c:	2100      	movs	r1, #0
     33e:	1b33      	subs	r3, r6, r4
     340:	18eb      	adds	r3, r5, r3
     342:	2b00      	cmp	r3, #0
     344:	dd05      	ble.n	352 <crc16+0x1e>
     346:	7820      	ldrb	r0, [r4, #0]
     348:	f7ff ffda 	bl	300 <shitfer>
     34c:	3401      	adds	r4, #1
     34e:	1c01      	adds	r1, r0, #0
     350:	e7f5      	b.n	33e <crc16+0xa>
     352:	2000      	movs	r0, #0
     354:	f7ff ffd4 	bl	300 <shitfer>
     358:	1c01      	adds	r1, r0, #0
     35a:	2000      	movs	r0, #0
     35c:	f7ff ffd0 	bl	300 <shitfer>
     360:	bd70      	pop	{r4, r5, r6, pc}
	...

00000364 <adc_init>:
     364:	b513      	push	{r0, r1, r4, lr}
     366:	4c15      	ldr	r4, [pc, #84]	; (3bc <adc_init+0x58>)
     368:	2100      	movs	r1, #0
     36a:	1c20      	adds	r0, r4, #0
     36c:	2217      	movs	r2, #23
     36e:	2301      	movs	r3, #1
     370:	f000 ff10 	bl	1194 <Chip_IOCON_PinMuxSet>
     374:	1c20      	adds	r0, r4, #0
     376:	2100      	movs	r1, #0
     378:	220e      	movs	r2, #14
     37a:	2302      	movs	r3, #2
     37c:	f000 ff0a 	bl	1194 <Chip_IOCON_PinMuxSet>
     380:	1c20      	adds	r0, r4, #0
     382:	2100      	movs	r1, #0
     384:	2216      	movs	r2, #22
     386:	2301      	movs	r3, #1
     388:	f000 ff04 	bl	1194 <Chip_IOCON_PinMuxSet>
     38c:	1c20      	adds	r0, r4, #0
     38e:	2100      	movs	r1, #0
     390:	2210      	movs	r2, #16
     392:	2301      	movs	r3, #1
     394:	f000 fefe 	bl	1194 <Chip_IOCON_PinMuxSet>
     398:	1c20      	adds	r0, r4, #0
     39a:	2100      	movs	r1, #0
     39c:	220d      	movs	r2, #13
     39e:	2302      	movs	r3, #2
     3a0:	f000 fef8 	bl	1194 <Chip_IOCON_PinMuxSet>
     3a4:	1c20      	adds	r0, r4, #0
     3a6:	220c      	movs	r2, #12
     3a8:	2302      	movs	r3, #2
     3aa:	2100      	movs	r1, #0
     3ac:	f000 fef2 	bl	1194 <Chip_IOCON_PinMuxSet>
     3b0:	4803      	ldr	r0, [pc, #12]	; (3c0 <adc_init+0x5c>)
     3b2:	4669      	mov	r1, sp
     3b4:	f000 fdf2 	bl	f9c <Chip_ADC_Init>
     3b8:	bd13      	pop	{r0, r1, r4, pc}
     3ba:	46c0      	nop			; (mov r8, r8)
     3bc:	40044000 	andmi	r4, r4, r0
     3c0:	4001c000 	andmi	ip, r1, r0

000003c4 <adc_read>:
     3c4:	b538      	push	{r3, r4, r5, lr}
     3c6:	1c04      	adds	r4, r0, #0
     3c8:	2201      	movs	r2, #1
     3ca:	4810      	ldr	r0, [pc, #64]	; (40c <adc_read+0x48>)
     3cc:	1c0d      	adds	r5, r1, #0
     3ce:	1c21      	adds	r1, r4, #0
     3d0:	f000 fe4e 	bl	1070 <Chip_ADC_EnableChannel>
     3d4:	480d      	ldr	r0, [pc, #52]	; (40c <adc_read+0x48>)
     3d6:	2101      	movs	r1, #1
     3d8:	2200      	movs	r2, #0
     3da:	f000 fe35 	bl	1048 <Chip_ADC_SetStartMode>
     3de:	480b      	ldr	r0, [pc, #44]	; (40c <adc_read+0x48>)
     3e0:	1c21      	adds	r1, r4, #0
     3e2:	2200      	movs	r2, #0
     3e4:	f000 fe15 	bl	1012 <Chip_ADC_ReadStatus>
     3e8:	2801      	cmp	r0, #1
     3ea:	d1f8      	bne.n	3de <adc_read+0x1a>
     3ec:	1c2a      	adds	r2, r5, #0
     3ee:	1c21      	adds	r1, r4, #0
     3f0:	4806      	ldr	r0, [pc, #24]	; (40c <adc_read+0x48>)
     3f2:	f000 fe03 	bl	ffc <Chip_ADC_ReadValue>
     3f6:	1c21      	adds	r1, r4, #0
     3f8:	4804      	ldr	r0, [pc, #16]	; (40c <adc_read+0x48>)
     3fa:	2200      	movs	r2, #0
     3fc:	f000 fe38 	bl	1070 <Chip_ADC_EnableChannel>
     400:	2100      	movs	r1, #0
     402:	4802      	ldr	r0, [pc, #8]	; (40c <adc_read+0x48>)
     404:	1c0a      	adds	r2, r1, #0
     406:	f000 fe1f 	bl	1048 <Chip_ADC_SetStartMode>
     40a:	bd38      	pop	{r3, r4, r5, pc}
     40c:	4001c000 	andmi	ip, r1, r0

00000410 <FLEX_INT1_IRQHandler>:
     410:	2302      	movs	r3, #2
     412:	4a05      	ldr	r2, [pc, #20]	; (428 <FLEX_INT1_IRQHandler+0x18>)
     414:	2100      	movs	r1, #0
     416:	8013      	strh	r3, [r2, #0]
     418:	22a0      	movs	r2, #160	; 0xa0
     41a:	05d2      	lsls	r2, r2, #23
     41c:	7451      	strb	r1, [r2, #17]
     41e:	3101      	adds	r1, #1
     420:	7251      	strb	r1, [r2, #9]
     422:	4a02      	ldr	r2, [pc, #8]	; (42c <FLEX_INT1_IRQHandler+0x1c>)
     424:	6253      	str	r3, [r2, #36]	; 0x24
     426:	4770      	bx	lr
     428:	1000000a 	andne	r0, r0, sl
     42c:	4004c000 	andmi	ip, r4, r0

00000430 <FLEX_INT2_IRQHandler>:
     430:	2202      	movs	r2, #2
     432:	4b06      	ldr	r3, [pc, #24]	; (44c <FLEX_INT2_IRQHandler+0x1c>)
     434:	805a      	strh	r2, [r3, #2]
     436:	23a0      	movs	r3, #160	; 0xa0
     438:	2200      	movs	r2, #0
     43a:	05db      	lsls	r3, r3, #23
     43c:	72da      	strb	r2, [r3, #11]
     43e:	3201      	adds	r2, #1
     440:	721a      	strb	r2, [r3, #8]
     442:	4b03      	ldr	r3, [pc, #12]	; (450 <FLEX_INT2_IRQHandler+0x20>)
     444:	3203      	adds	r2, #3
     446:	625a      	str	r2, [r3, #36]	; 0x24
     448:	4770      	bx	lr
     44a:	46c0      	nop			; (mov r8, r8)
     44c:	1000000a 	andne	r0, r0, sl
     450:	4004c000 	andmi	ip, r4, r0

00000454 <vcore_init>:
     454:	b538      	push	{r3, r4, r5, lr}
     456:	4c44      	ldr	r4, [pc, #272]	; (568 <vcore_init+0x114>)
     458:	2100      	movs	r1, #0
     45a:	1c20      	adds	r0, r4, #0
     45c:	2215      	movs	r2, #21
     45e:	2310      	movs	r3, #16
     460:	f000 fe98 	bl	1194 <Chip_IOCON_PinMuxSet>
     464:	1c20      	adds	r0, r4, #0
     466:	2100      	movs	r1, #0
     468:	2207      	movs	r2, #7
     46a:	2310      	movs	r3, #16
     46c:	f000 fe92 	bl	1194 <Chip_IOCON_PinMuxSet>
     470:	1c20      	adds	r0, r4, #0
     472:	2100      	movs	r1, #0
     474:	2206      	movs	r2, #6
     476:	2310      	movs	r3, #16
     478:	f000 fe8c 	bl	1194 <Chip_IOCON_PinMuxSet>
     47c:	1c20      	adds	r0, r4, #0
     47e:	2100      	movs	r1, #0
     480:	2209      	movs	r2, #9
     482:	2310      	movs	r3, #16
     484:	f000 fe86 	bl	1194 <Chip_IOCON_PinMuxSet>
     488:	1c20      	adds	r0, r4, #0
     48a:	2100      	movs	r1, #0
     48c:	2208      	movs	r2, #8
     48e:	2310      	movs	r3, #16
     490:	f000 fe80 	bl	1194 <Chip_IOCON_PinMuxSet>
     494:	1c20      	adds	r0, r4, #0
     496:	2100      	movs	r1, #0
     498:	2202      	movs	r2, #2
     49a:	2310      	movs	r3, #16
     49c:	f000 fe7a 	bl	1194 <Chip_IOCON_PinMuxSet>
     4a0:	1c20      	adds	r0, r4, #0
     4a2:	2100      	movs	r1, #0
     4a4:	2203      	movs	r2, #3
     4a6:	2310      	movs	r3, #16
     4a8:	f000 fe74 	bl	1194 <Chip_IOCON_PinMuxSet>
     4ac:	1c20      	adds	r0, r4, #0
     4ae:	2100      	movs	r1, #0
     4b0:	2211      	movs	r2, #17
     4b2:	2310      	movs	r3, #16
     4b4:	f000 fe6e 	bl	1194 <Chip_IOCON_PinMuxSet>
     4b8:	1c20      	adds	r0, r4, #0
     4ba:	2100      	movs	r1, #0
     4bc:	220b      	movs	r2, #11
     4be:	2311      	movs	r3, #17
     4c0:	f000 fe68 	bl	1194 <Chip_IOCON_PinMuxSet>
     4c4:	23a0      	movs	r3, #160	; 0xa0
     4c6:	2280      	movs	r2, #128	; 0x80
     4c8:	2080      	movs	r0, #128	; 0x80
     4ca:	05db      	lsls	r3, r3, #23
     4cc:	0192      	lsls	r2, r2, #6
     4ce:	5899      	ldr	r1, [r3, r2]
     4d0:	0380      	lsls	r0, r0, #14
     4d2:	4301      	orrs	r1, r0
     4d4:	2080      	movs	r0, #128	; 0x80
     4d6:	5099      	str	r1, [r3, r2]
     4d8:	5899      	ldr	r1, [r3, r2]
     4da:	2408      	movs	r4, #8
     4dc:	4301      	orrs	r1, r0
     4de:	5099      	str	r1, [r3, r2]
     4e0:	5899      	ldr	r1, [r3, r2]
     4e2:	3840      	subs	r0, #64	; 0x40
     4e4:	4301      	orrs	r1, r0
     4e6:	5099      	str	r1, [r3, r2]
     4e8:	5899      	ldr	r1, [r3, r2]
     4ea:	30c1      	adds	r0, #193	; 0xc1
     4ec:	30ff      	adds	r0, #255	; 0xff
     4ee:	4301      	orrs	r1, r0
     4f0:	5099      	str	r1, [r3, r2]
     4f2:	5899      	ldr	r1, [r3, r2]
     4f4:	3801      	subs	r0, #1
     4f6:	38ff      	subs	r0, #255	; 0xff
     4f8:	4301      	orrs	r1, r0
     4fa:	2080      	movs	r0, #128	; 0x80
     4fc:	5099      	str	r1, [r3, r2]
     4fe:	5899      	ldr	r1, [r3, r2]
     500:	0280      	lsls	r0, r0, #10
     502:	4301      	orrs	r1, r0
     504:	2080      	movs	r0, #128	; 0x80
     506:	5099      	str	r1, [r3, r2]
     508:	5899      	ldr	r1, [r3, r2]
     50a:	0100      	lsls	r0, r0, #4
     50c:	4301      	orrs	r1, r0
     50e:	5099      	str	r1, [r3, r2]
     510:	2104      	movs	r1, #4
     512:	2580      	movs	r5, #128	; 0x80
     514:	5898      	ldr	r0, [r3, r2]
     516:	032d      	lsls	r5, r5, #12
     518:	4388      	bics	r0, r1
     51a:	5098      	str	r0, [r3, r2]
     51c:	5898      	ldr	r0, [r3, r2]
     51e:	43a0      	bics	r0, r4
     520:	5098      	str	r0, [r3, r2]
     522:	4a12      	ldr	r2, [pc, #72]	; (56c <vcore_init+0x118>)
     524:	1854      	adds	r4, r2, r1
     526:	6fe0      	ldr	r0, [r4, #124]	; 0x7c
     528:	4328      	orrs	r0, r5
     52a:	67e0      	str	r0, [r4, #124]	; 0x7c
     52c:	24be      	movs	r4, #190	; 0xbe
     52e:	2002      	movs	r0, #2
     530:	2503      	movs	r5, #3
     532:	0064      	lsls	r4, r4, #1
     534:	5110      	str	r0, [r2, r4]
     536:	1864      	adds	r4, r4, r1
     538:	5115      	str	r5, [r2, r4]
     53a:	4a0d      	ldr	r2, [pc, #52]	; (570 <vcore_init+0x11c>)
     53c:	6814      	ldr	r4, [r2, #0]
     53e:	4384      	bics	r4, r0
     540:	6014      	str	r4, [r2, #0]
     542:	6814      	ldr	r4, [r2, #0]
     544:	438c      	bics	r4, r1
     546:	6014      	str	r4, [r2, #0]
     548:	6150      	str	r0, [r2, #20]
     54a:	6151      	str	r1, [r2, #20]
     54c:	4a09      	ldr	r2, [pc, #36]	; (574 <vcore_init+0x120>)
     54e:	6010      	str	r0, [r2, #0]
     550:	6011      	str	r1, [r2, #0]
     552:	2200      	movs	r2, #0
     554:	3903      	subs	r1, #3
     556:	755a      	strb	r2, [r3, #21]
     558:	71da      	strb	r2, [r3, #7]
     55a:	719a      	strb	r2, [r3, #6]
     55c:	745a      	strb	r2, [r3, #17]
     55e:	7259      	strb	r1, [r3, #9]
     560:	72da      	strb	r2, [r3, #11]
     562:	7219      	strb	r1, [r3, #8]
     564:	bd38      	pop	{r3, r4, r5, pc}
     566:	46c0      	nop			; (mov r8, r8)
     568:	40044000 	andmi	r4, r4, r0
     56c:	40048000 	andmi	r8, r4, r0
     570:	4004c000 	andmi	ip, r4, r0
     574:	e000e100 	and	lr, r0, r0, lsl #2

00000578 <set_voltage>:
     578:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
     57a:	4b33      	ldr	r3, [pc, #204]	; (648 <set_voltage+0xd0>)
     57c:	4c33      	ldr	r4, [pc, #204]	; (64c <set_voltage+0xd4>)
     57e:	8018      	strh	r0, [r3, #0]
     580:	4b33      	ldr	r3, [pc, #204]	; (650 <set_voltage+0xd8>)
     582:	4004      	ands	r4, r0
     584:	4018      	ands	r0, r3
     586:	23a0      	movs	r3, #160	; 0xa0
     588:	2200      	movs	r2, #0
     58a:	2507      	movs	r5, #7
     58c:	1124      	asrs	r4, r4, #4
     58e:	0100      	lsls	r0, r0, #4
     590:	4304      	orrs	r4, r0
     592:	05db      	lsls	r3, r3, #23
     594:	b2a7      	uxth	r7, r4
     596:	719a      	strb	r2, [r3, #6]
     598:	1c3e      	adds	r6, r7, #0
     59a:	2201      	movs	r2, #1
     59c:	23a0      	movs	r3, #160	; 0xa0
     59e:	412e      	asrs	r6, r5
     5a0:	2000      	movs	r0, #0
     5a2:	05db      	lsls	r3, r3, #23
     5a4:	4016      	ands	r6, r2
     5a6:	71d8      	strb	r0, [r3, #7]
     5a8:	755e      	strb	r6, [r3, #21]
     5aa:	71da      	strb	r2, [r3, #7]
     5ac:	3d01      	subs	r5, #1
     5ae:	d2f3      	bcs.n	598 <set_voltage+0x20>
     5b0:	2180      	movs	r1, #128	; 0x80
     5b2:	0109      	lsls	r1, r1, #4
     5b4:	71d8      	strb	r0, [r3, #7]
     5b6:	4039      	ands	r1, r7
     5b8:	719a      	strb	r2, [r3, #6]
     5ba:	7198      	strb	r0, [r3, #6]
     5bc:	4281      	cmp	r1, r0
     5be:	d019      	beq.n	5f4 <set_voltage+0x7c>
     5c0:	26fa      	movs	r6, #250	; 0xfa
     5c2:	7258      	strb	r0, [r3, #9]
     5c4:	00b6      	lsls	r6, r6, #2
     5c6:	25a0      	movs	r5, #160	; 0xa0
     5c8:	05ed      	lsls	r5, r5, #23
     5ca:	78ab      	ldrb	r3, [r5, #2]
     5cc:	2b00      	cmp	r3, #0
     5ce:	d004      	beq.n	5da <set_voltage+0x62>
     5d0:	2301      	movs	r3, #1
     5d2:	4a20      	ldr	r2, [pc, #128]	; (654 <set_voltage+0xdc>)
     5d4:	746b      	strb	r3, [r5, #17]
     5d6:	8013      	strh	r3, [r2, #0]
     5d8:	e00e      	b.n	5f8 <set_voltage+0x80>
     5da:	2001      	movs	r0, #1
     5dc:	3e01      	subs	r6, #1
     5de:	f000 f993 	bl	908 <delay>
     5e2:	2e00      	cmp	r6, #0
     5e4:	d1ef      	bne.n	5c6 <set_voltage+0x4e>
     5e6:	2301      	movs	r3, #1
     5e8:	2202      	movs	r2, #2
     5ea:	746e      	strb	r6, [r5, #17]
     5ec:	726b      	strb	r3, [r5, #9]
     5ee:	4b19      	ldr	r3, [pc, #100]	; (654 <set_voltage+0xdc>)
     5f0:	801a      	strh	r2, [r3, #0]
     5f2:	e001      	b.n	5f8 <set_voltage+0x80>
     5f4:	7459      	strb	r1, [r3, #17]
     5f6:	725a      	strb	r2, [r3, #9]
     5f8:	23a0      	movs	r3, #160	; 0xa0
     5fa:	2200      	movs	r2, #0
     5fc:	b224      	sxth	r4, r4
     5fe:	05db      	lsls	r3, r3, #23
     600:	4294      	cmp	r4, r2
     602:	da19      	bge.n	638 <set_voltage+0xc0>
     604:	25fa      	movs	r5, #250	; 0xfa
     606:	721a      	strb	r2, [r3, #8]
     608:	00ad      	lsls	r5, r5, #2
     60a:	24a0      	movs	r4, #160	; 0xa0
     60c:	05e4      	lsls	r4, r4, #23
     60e:	78e3      	ldrb	r3, [r4, #3]
     610:	2b00      	cmp	r3, #0
     612:	d004      	beq.n	61e <set_voltage+0xa6>
     614:	2301      	movs	r3, #1
     616:	4a0f      	ldr	r2, [pc, #60]	; (654 <set_voltage+0xdc>)
     618:	72e3      	strb	r3, [r4, #11]
     61a:	8053      	strh	r3, [r2, #2]
     61c:	e00f      	b.n	63e <set_voltage+0xc6>
     61e:	2001      	movs	r0, #1
     620:	3d01      	subs	r5, #1
     622:	f000 f971 	bl	908 <delay>
     626:	2d00      	cmp	r5, #0
     628:	d1ef      	bne.n	60a <set_voltage+0x92>
     62a:	2301      	movs	r3, #1
     62c:	2202      	movs	r2, #2
     62e:	72e5      	strb	r5, [r4, #11]
     630:	7223      	strb	r3, [r4, #8]
     632:	4b08      	ldr	r3, [pc, #32]	; (654 <set_voltage+0xdc>)
     634:	805a      	strh	r2, [r3, #2]
     636:	e002      	b.n	63e <set_voltage+0xc6>
     638:	72da      	strb	r2, [r3, #11]
     63a:	2201      	movs	r2, #1
     63c:	721a      	strb	r2, [r3, #8]
     63e:	2028      	movs	r0, #40	; 0x28
     640:	f000 f962 	bl	908 <delay>
     644:	2000      	movs	r0, #0
     646:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     648:	10000008 	andne	r0, r0, r8
     64c:	fffff0f0 			; <UNDEFINED> instruction: 0xfffff0f0
     650:	00000f0f 	andeq	r0, r0, pc, lsl #30
     654:	1000000a 	andne	r0, r0, sl

00000658 <get_pg_state>:
     658:	1c03      	adds	r3, r0, #0
     65a:	2001      	movs	r0, #1
     65c:	4283      	cmp	r3, r0
     65e:	d803      	bhi.n	668 <get_pg_state+0x10>
     660:	1ac0      	subs	r0, r0, r3
     662:	4b02      	ldr	r3, [pc, #8]	; (66c <get_pg_state+0x14>)
     664:	0040      	lsls	r0, r0, #1
     666:	5c18      	ldrb	r0, [r3, r0]
     668:	4770      	bx	lr
     66a:	46c0      	nop			; (mov r8, r8)
     66c:	1000000a 	andne	r0, r0, sl

00000670 <iap_readserialid>:
     670:	233a      	movs	r3, #58	; 0x3a
     672:	b530      	push	{r4, r5, lr}
     674:	b08b      	sub	sp, #44	; 0x2c
     676:	9300      	str	r3, [sp, #0]
     678:	1c04      	adds	r4, r0, #0
     67a:	a905      	add	r1, sp, #20
     67c:	4668      	mov	r0, sp
     67e:	4b17      	ldr	r3, [pc, #92]	; (6dc <iap_readserialid+0x6c>)
     680:	4798      	blx	r3
     682:	9d05      	ldr	r5, [sp, #20]
     684:	2001      	movs	r0, #1
     686:	2d00      	cmp	r5, #0
     688:	d126      	bne.n	6d8 <iap_readserialid+0x68>
     68a:	9b06      	ldr	r3, [sp, #24]
     68c:	1c20      	adds	r0, r4, #0
     68e:	0c1a      	lsrs	r2, r3, #16
     690:	0619      	lsls	r1, r3, #24
     692:	b29b      	uxth	r3, r3
     694:	0c09      	lsrs	r1, r1, #16
     696:	0a1b      	lsrs	r3, r3, #8
     698:	430b      	orrs	r3, r1
     69a:	0a11      	lsrs	r1, r2, #8
     69c:	0612      	lsls	r2, r2, #24
     69e:	0c12      	lsrs	r2, r2, #16
     6a0:	430a      	orrs	r2, r1
     6a2:	041b      	lsls	r3, r3, #16
     6a4:	4313      	orrs	r3, r2
     6a6:	a906      	add	r1, sp, #24
     6a8:	2204      	movs	r2, #4
     6aa:	9306      	str	r3, [sp, #24]
     6ac:	f000 ff4c 	bl	1548 <memcpy>
     6b0:	9b07      	ldr	r3, [sp, #28]
     6b2:	1d20      	adds	r0, r4, #4
     6b4:	0c1a      	lsrs	r2, r3, #16
     6b6:	0619      	lsls	r1, r3, #24
     6b8:	b29b      	uxth	r3, r3
     6ba:	0c09      	lsrs	r1, r1, #16
     6bc:	0a1b      	lsrs	r3, r3, #8
     6be:	430b      	orrs	r3, r1
     6c0:	0a11      	lsrs	r1, r2, #8
     6c2:	0612      	lsls	r2, r2, #24
     6c4:	0c12      	lsrs	r2, r2, #16
     6c6:	430a      	orrs	r2, r1
     6c8:	041b      	lsls	r3, r3, #16
     6ca:	4313      	orrs	r3, r2
     6cc:	a907      	add	r1, sp, #28
     6ce:	2204      	movs	r2, #4
     6d0:	9307      	str	r3, [sp, #28]
     6d2:	f000 ff39 	bl	1548 <memcpy>
     6d6:	1c28      	adds	r0, r5, #0
     6d8:	b00b      	add	sp, #44	; 0x2c
     6da:	bd30      	pop	{r4, r5, pc}
     6dc:	1fff1ff1 	svcne	0x00ff1ff1

000006e0 <led_blink_12v_1f>:
     6e0:	21a0      	movs	r1, #160	; 0xa0
     6e2:	4b05      	ldr	r3, [pc, #20]	; (6f8 <led_blink_12v_1f+0x18>)
     6e4:	05c9      	lsls	r1, r1, #23
     6e6:	781a      	ldrb	r2, [r3, #0]
     6e8:	2000      	movs	r0, #0
     6ea:	2a00      	cmp	r2, #0
     6ec:	d100      	bne.n	6f0 <led_blink_12v_1f+0x10>
     6ee:	2001      	movs	r0, #1
     6f0:	43d2      	mvns	r2, r2
     6f2:	7048      	strb	r0, [r1, #1]
     6f4:	701a      	strb	r2, [r3, #0]
     6f6:	4770      	bx	lr
     6f8:	1000000e 	andne	r0, r0, lr

000006fc <led_blink_12v_2t>:
     6fc:	21a0      	movs	r1, #160	; 0xa0
     6fe:	4b05      	ldr	r3, [pc, #20]	; (714 <led_blink_12v_2t+0x18>)
     700:	05c9      	lsls	r1, r1, #23
     702:	781a      	ldrb	r2, [r3, #0]
     704:	2000      	movs	r0, #0
     706:	2a00      	cmp	r2, #0
     708:	d100      	bne.n	70c <led_blink_12v_2t+0x10>
     70a:	2001      	movs	r0, #1
     70c:	43d2      	mvns	r2, r2
     70e:	7108      	strb	r0, [r1, #4]
     710:	701a      	strb	r2, [r3, #0]
     712:	4770      	bx	lr
     714:	1000000f 	andne	r0, r0, pc

00000718 <led_blink_12v_2f>:
     718:	21a0      	movs	r1, #160	; 0xa0
     71a:	4b05      	ldr	r3, [pc, #20]	; (730 <led_blink_12v_2f+0x18>)
     71c:	05c9      	lsls	r1, r1, #23
     71e:	781a      	ldrb	r2, [r3, #0]
     720:	2000      	movs	r0, #0
     722:	2a00      	cmp	r2, #0
     724:	d100      	bne.n	728 <led_blink_12v_2f+0x10>
     726:	2001      	movs	r0, #1
     728:	43d2      	mvns	r2, r2
     72a:	7148      	strb	r0, [r1, #5]
     72c:	701a      	strb	r2, [r3, #0]
     72e:	4770      	bx	lr
     730:	10000014 	andne	r0, r0, r4, lsl r0

00000734 <led_blink_12v_1t>:
     734:	21a0      	movs	r1, #160	; 0xa0
     736:	4b05      	ldr	r3, [pc, #20]	; (74c <led_blink_12v_1t+0x18>)
     738:	05c9      	lsls	r1, r1, #23
     73a:	781a      	ldrb	r2, [r3, #0]
     73c:	2000      	movs	r0, #0
     73e:	2a00      	cmp	r2, #0
     740:	d100      	bne.n	744 <led_blink_12v_1t+0x10>
     742:	2001      	movs	r0, #1
     744:	43d2      	mvns	r2, r2
     746:	7008      	strb	r0, [r1, #0]
     748:	701a      	strb	r2, [r3, #0]
     74a:	4770      	bx	lr
     74c:	10000015 	andne	r0, r0, r5, lsl r0

00000750 <led_init>:
     750:	2100      	movs	r1, #0
     752:	b538      	push	{r3, r4, r5, lr}
     754:	2580      	movs	r5, #128	; 0x80
     756:	4c1d      	ldr	r4, [pc, #116]	; (7cc <led_init+0x7c>)
     758:	1c0a      	adds	r2, r1, #0
     75a:	1c20      	adds	r0, r4, #0
     75c:	2311      	movs	r3, #17
     75e:	f000 fd19 	bl	1194 <Chip_IOCON_PinMuxSet>
     762:	006d      	lsls	r5, r5, #1
     764:	1c20      	adds	r0, r4, #0
     766:	2100      	movs	r1, #0
     768:	2201      	movs	r2, #1
     76a:	2310      	movs	r3, #16
     76c:	f000 fd12 	bl	1194 <Chip_IOCON_PinMuxSet>
     770:	1c20      	adds	r0, r4, #0
     772:	1c2b      	adds	r3, r5, #0
     774:	2100      	movs	r1, #0
     776:	2204      	movs	r2, #4
     778:	f000 fd0c 	bl	1194 <Chip_IOCON_PinMuxSet>
     77c:	1c20      	adds	r0, r4, #0
     77e:	1c2b      	adds	r3, r5, #0
     780:	2100      	movs	r1, #0
     782:	2205      	movs	r2, #5
     784:	f000 fd06 	bl	1194 <Chip_IOCON_PinMuxSet>
     788:	24a0      	movs	r4, #160	; 0xa0
     78a:	2380      	movs	r3, #128	; 0x80
     78c:	2102      	movs	r1, #2
     78e:	05e4      	lsls	r4, r4, #23
     790:	019b      	lsls	r3, r3, #6
     792:	58e2      	ldr	r2, [r4, r3]
     794:	3dff      	subs	r5, #255	; 0xff
     796:	432a      	orrs	r2, r5
     798:	50e2      	str	r2, [r4, r3]
     79a:	58e2      	ldr	r2, [r4, r3]
     79c:	20fa      	movs	r0, #250	; 0xfa
     79e:	430a      	orrs	r2, r1
     7a0:	50e2      	str	r2, [r4, r3]
     7a2:	58e2      	ldr	r2, [r4, r3]
     7a4:	310e      	adds	r1, #14
     7a6:	430a      	orrs	r2, r1
     7a8:	50e2      	str	r2, [r4, r3]
     7aa:	58e2      	ldr	r2, [r4, r3]
     7ac:	3110      	adds	r1, #16
     7ae:	430a      	orrs	r2, r1
     7b0:	50e2      	str	r2, [r4, r3]
     7b2:	2300      	movs	r3, #0
     7b4:	0080      	lsls	r0, r0, #2
     7b6:	7023      	strb	r3, [r4, #0]
     7b8:	7063      	strb	r3, [r4, #1]
     7ba:	7123      	strb	r3, [r4, #4]
     7bc:	7163      	strb	r3, [r4, #5]
     7be:	f000 f8a3 	bl	908 <delay>
     7c2:	7025      	strb	r5, [r4, #0]
     7c4:	7065      	strb	r5, [r4, #1]
     7c6:	7125      	strb	r5, [r4, #4]
     7c8:	7165      	strb	r5, [r4, #5]
     7ca:	bd38      	pop	{r3, r4, r5, pc}
     7cc:	40044000 	andmi	r4, r4, r0

000007d0 <set_led_state>:
     7d0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
     7d2:	ba45      	rev16	r5, r0
     7d4:	b2ad      	uxth	r5, r5
     7d6:	4e40      	ldr	r6, [pc, #256]	; (8d8 <set_led_state+0x108>)
     7d8:	b2eb      	uxtb	r3, r5
     7da:	8033      	strh	r3, [r6, #0]
     7dc:	4c3f      	ldr	r4, [pc, #252]	; (8dc <set_led_state+0x10c>)
     7de:	2302      	movs	r3, #2
     7e0:	072a      	lsls	r2, r5, #28
     7e2:	d509      	bpl.n	7f8 <set_led_state+0x28>
     7e4:	21fa      	movs	r1, #250	; 0xfa
     7e6:	6822      	ldr	r2, [r4, #0]
     7e8:	2003      	movs	r0, #3
     7ea:	4313      	orrs	r3, r2
     7ec:	0049      	lsls	r1, r1, #1
     7ee:	4a3c      	ldr	r2, [pc, #240]	; (8e0 <set_led_state+0x110>)
     7f0:	6023      	str	r3, [r4, #0]
     7f2:	f000 fb3f 	bl	e74 <timer_set>
     7f6:	e009      	b.n	80c <set_led_state+0x3c>
     7f8:	6822      	ldr	r2, [r4, #0]
     7fa:	2003      	movs	r0, #3
     7fc:	439a      	bics	r2, r3
     7fe:	6022      	str	r2, [r4, #0]
     800:	f000 fb48 	bl	e94 <timer_kill>
     804:	23a0      	movs	r3, #160	; 0xa0
     806:	2201      	movs	r2, #1
     808:	05db      	lsls	r3, r3, #23
     80a:	705a      	strb	r2, [r3, #1]
     80c:	8833      	ldrh	r3, [r6, #0]
     80e:	2701      	movs	r7, #1
     810:	075b      	lsls	r3, r3, #29
     812:	d509      	bpl.n	828 <set_led_state+0x58>
     814:	21fa      	movs	r1, #250	; 0xfa
     816:	6823      	ldr	r3, [r4, #0]
     818:	2002      	movs	r0, #2
     81a:	431f      	orrs	r7, r3
     81c:	0049      	lsls	r1, r1, #1
     81e:	4a31      	ldr	r2, [pc, #196]	; (8e4 <set_led_state+0x114>)
     820:	6027      	str	r7, [r4, #0]
     822:	f000 fb27 	bl	e74 <timer_set>
     826:	e008      	b.n	83a <set_led_state+0x6a>
     828:	6823      	ldr	r3, [r4, #0]
     82a:	2002      	movs	r0, #2
     82c:	43bb      	bics	r3, r7
     82e:	6023      	str	r3, [r4, #0]
     830:	f000 fb30 	bl	e94 <timer_kill>
     834:	23a0      	movs	r3, #160	; 0xa0
     836:	05db      	lsls	r3, r3, #23
     838:	701f      	strb	r7, [r3, #0]
     83a:	23a0      	movs	r3, #160	; 0xa0
     83c:	8831      	ldrh	r1, [r6, #0]
     83e:	05db      	lsls	r3, r3, #23
     840:	2201      	movs	r2, #1
     842:	0788      	lsls	r0, r1, #30
     844:	d502      	bpl.n	84c <set_led_state+0x7c>
     846:	2000      	movs	r0, #0
     848:	7058      	strb	r0, [r3, #1]
     84a:	e000      	b.n	84e <set_led_state+0x7e>
     84c:	705a      	strb	r2, [r3, #1]
     84e:	4211      	tst	r1, r2
     850:	d001      	beq.n	856 <set_led_state+0x86>
     852:	2200      	movs	r2, #0
     854:	e000      	b.n	858 <set_led_state+0x88>
     856:	2201      	movs	r2, #1
     858:	701a      	strb	r2, [r3, #0]
     85a:	2308      	movs	r3, #8
     85c:	0a2d      	lsrs	r5, r5, #8
     85e:	8075      	strh	r5, [r6, #2]
     860:	6822      	ldr	r2, [r4, #0]
     862:	421d      	tst	r5, r3
     864:	d008      	beq.n	878 <set_led_state+0xa8>
     866:	21fa      	movs	r1, #250	; 0xfa
     868:	4313      	orrs	r3, r2
     86a:	2005      	movs	r0, #5
     86c:	0049      	lsls	r1, r1, #1
     86e:	4a1e      	ldr	r2, [pc, #120]	; (8e8 <set_led_state+0x118>)
     870:	6023      	str	r3, [r4, #0]
     872:	f000 faff 	bl	e74 <timer_set>
     876:	e008      	b.n	88a <set_led_state+0xba>
     878:	439a      	bics	r2, r3
     87a:	2005      	movs	r0, #5
     87c:	6022      	str	r2, [r4, #0]
     87e:	f000 fb09 	bl	e94 <timer_kill>
     882:	23a0      	movs	r3, #160	; 0xa0
     884:	2201      	movs	r2, #1
     886:	05db      	lsls	r3, r3, #23
     888:	715a      	strb	r2, [r3, #5]
     88a:	2004      	movs	r0, #4
     88c:	8873      	ldrh	r3, [r6, #2]
     88e:	4203      	tst	r3, r0
     890:	d008      	beq.n	8a4 <set_led_state+0xd4>
     892:	21fa      	movs	r1, #250	; 0xfa
     894:	6823      	ldr	r3, [r4, #0]
     896:	0049      	lsls	r1, r1, #1
     898:	4303      	orrs	r3, r0
     89a:	4a14      	ldr	r2, [pc, #80]	; (8ec <set_led_state+0x11c>)
     89c:	6023      	str	r3, [r4, #0]
     89e:	f000 fae9 	bl	e74 <timer_set>
     8a2:	e008      	b.n	8b6 <set_led_state+0xe6>
     8a4:	6823      	ldr	r3, [r4, #0]
     8a6:	4383      	bics	r3, r0
     8a8:	6023      	str	r3, [r4, #0]
     8aa:	f000 faf3 	bl	e94 <timer_kill>
     8ae:	23a0      	movs	r3, #160	; 0xa0
     8b0:	2201      	movs	r2, #1
     8b2:	05db      	lsls	r3, r3, #23
     8b4:	711a      	strb	r2, [r3, #4]
     8b6:	23a0      	movs	r3, #160	; 0xa0
     8b8:	8871      	ldrh	r1, [r6, #2]
     8ba:	05db      	lsls	r3, r3, #23
     8bc:	2201      	movs	r2, #1
     8be:	0788      	lsls	r0, r1, #30
     8c0:	d502      	bpl.n	8c8 <set_led_state+0xf8>
     8c2:	2000      	movs	r0, #0
     8c4:	7158      	strb	r0, [r3, #5]
     8c6:	e000      	b.n	8ca <set_led_state+0xfa>
     8c8:	715a      	strb	r2, [r3, #5]
     8ca:	4211      	tst	r1, r2
     8cc:	d001      	beq.n	8d2 <set_led_state+0x102>
     8ce:	2200      	movs	r2, #0
     8d0:	e000      	b.n	8d4 <set_led_state+0x104>
     8d2:	2201      	movs	r2, #1
     8d4:	711a      	strb	r2, [r3, #4]
     8d6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     8d8:	10000010 	andne	r0, r0, r0, lsl r0
     8dc:	10000018 	andne	r0, r0, r8, lsl r0
     8e0:	000006e1 	andeq	r0, r0, r1, ror #13
     8e4:	00000735 	andeq	r0, r0, r5, lsr r7
     8e8:	00000719 	andeq	r0, r0, r9, lsl r7
     8ec:	000006fd 	strdeq	r0, [r0], -sp

000008f0 <get_led_state>:
     8f0:	2300      	movs	r3, #0
     8f2:	2801      	cmp	r0, #1
     8f4:	d804      	bhi.n	900 <get_led_state+0x10>
     8f6:	3301      	adds	r3, #1
     8f8:	1a18      	subs	r0, r3, r0
     8fa:	4098      	lsls	r0, r3
     8fc:	4b01      	ldr	r3, [pc, #4]	; (904 <get_led_state+0x14>)
     8fe:	5ac3      	ldrh	r3, [r0, r3]
     900:	1c18      	adds	r0, r3, #0
     902:	4770      	bx	lr
     904:	10000010 	andne	r0, r0, r0, lsl r0

00000908 <delay>:
     908:	2800      	cmp	r0, #0
     90a:	d007      	beq.n	91c <delay+0x14>
     90c:	2396      	movs	r3, #150	; 0x96
     90e:	3801      	subs	r0, #1
     910:	015b      	lsls	r3, r3, #5
     912:	46c0      	nop			; (mov r8, r8)
     914:	3b01      	subs	r3, #1
     916:	2b00      	cmp	r3, #0
     918:	d1fb      	bne.n	912 <delay+0xa>
     91a:	e7f5      	b.n	908 <delay>
     91c:	4770      	bx	lr
	...

00000920 <WDT_IRQHandler>:
     920:	2104      	movs	r1, #4
     922:	4804      	ldr	r0, [pc, #16]	; (934 <WDT_IRQHandler+0x14>)
     924:	b508      	push	{r3, lr}
     926:	6803      	ldr	r3, [r0, #0]
     928:	420b      	tst	r3, r1
     92a:	d001      	beq.n	930 <WDT_IRQHandler+0x10>
     92c:	f000 fc38 	bl	11a0 <Chip_WWDT_ClearStatusFlag>
     930:	bd08      	pop	{r3, pc}
     932:	46c0      	nop			; (mov r8, r8)
     934:	40004000 	andmi	r4, r0, r0

00000938 <main>:
     938:	b5f0      	push	{r4, r5, r6, r7, lr}
     93a:	b08b      	sub	sp, #44	; 0x2c
     93c:	f000 fac2 	bl	ec4 <Board_Init>
     940:	f000 fc20 	bl	1184 <SystemCoreClockUpdate>
     944:	f000 fa5c 	bl	e00 <timer_init>
     948:	f7ff ff02 	bl	750 <led_init>
     94c:	f7ff fd0a 	bl	364 <adc_init>
     950:	f000 f98a 	bl	c68 <uart_init>
     954:	f7ff fd7e 	bl	454 <vcore_init>
     958:	2000      	movs	r0, #0
     95a:	49b4      	ldr	r1, [pc, #720]	; (c2c <main+0x2f4>)
     95c:	1c02      	adds	r2, r0, #0
     95e:	f000 fa89 	bl	e74 <timer_set>
     962:	21fa      	movs	r1, #250	; 0xfa
     964:	2001      	movs	r0, #1
     966:	0089      	lsls	r1, r1, #2
     968:	2200      	movs	r2, #0
     96a:	f000 fa83 	bl	e74 <timer_set>
     96e:	2400      	movs	r4, #0
     970:	2c01      	cmp	r4, #1
     972:	d100      	bne.n	976 <main+0x3e>
     974:	e0d6      	b.n	b24 <main+0x1ec>
     976:	f000 f9d1 	bl	d1c <uart_rxrb_cnt>
     97a:	2827      	cmp	r0, #39	; 0x27
     97c:	d800      	bhi.n	980 <main+0x48>
     97e:	e0cc      	b.n	b1a <main+0x1e2>
     980:	4dab      	ldr	r5, [pc, #684]	; (c30 <main+0x2f8>)
     982:	2100      	movs	r1, #0
     984:	2228      	movs	r2, #40	; 0x28
     986:	1c28      	adds	r0, r5, #0
     988:	f000 fde2 	bl	1550 <memset>
     98c:	1c28      	adds	r0, r5, #0
     98e:	2128      	movs	r1, #40	; 0x28
     990:	f000 f9cc 	bl	d2c <uart_read>
     994:	2400      	movs	r4, #0
     996:	1e06      	subs	r6, r0, #0
     998:	2e28      	cmp	r6, #40	; 0x28
     99a:	d000      	beq.n	99e <main+0x66>
     99c:	e0ca      	b.n	b34 <main+0x1fc>
     99e:	1deb      	adds	r3, r5, #7
     9a0:	7fdf      	ldrb	r7, [r3, #31]
     9a2:	1c2b      	adds	r3, r5, #0
     9a4:	3308      	adds	r3, #8
     9a6:	7fdb      	ldrb	r3, [r3, #31]
     9a8:	023f      	lsls	r7, r7, #8
     9aa:	1da8      	adds	r0, r5, #6
     9ac:	2120      	movs	r1, #32
     9ae:	431f      	orrs	r7, r3
     9b0:	f7ff fcc0 	bl	334 <crc16>
     9b4:	4287      	cmp	r7, r0
     9b6:	d000      	beq.n	9ba <main+0x82>
     9b8:	e0af      	b.n	b1a <main+0x1e2>
     9ba:	1c20      	adds	r0, r4, #0
     9bc:	499b      	ldr	r1, [pc, #620]	; (c2c <main+0x2f4>)
     9be:	1c22      	adds	r2, r4, #0
     9c0:	f000 fa58 	bl	e74 <timer_set>
     9c4:	78ab      	ldrb	r3, [r5, #2]
     9c6:	2b22      	cmp	r3, #34	; 0x22
     9c8:	d100      	bne.n	9cc <main+0x94>
     9ca:	e07f      	b.n	acc <main+0x194>
     9cc:	d82e      	bhi.n	a2c <main+0xf4>
     9ce:	2b10      	cmp	r3, #16
     9d0:	d000      	beq.n	9d4 <main+0x9c>
     9d2:	e0a2      	b.n	b1a <main+0x1e2>
     9d4:	4d97      	ldr	r5, [pc, #604]	; (c34 <main+0x2fc>)
     9d6:	1c21      	adds	r1, r4, #0
     9d8:	1c32      	adds	r2, r6, #0
     9da:	1c28      	adds	r0, r5, #0
     9dc:	f000 fdb8 	bl	1550 <memset>
     9e0:	1daf      	adds	r7, r5, #6
     9e2:	4895      	ldr	r0, [pc, #596]	; (c38 <main+0x300>)
     9e4:	f7ff fe44 	bl	670 <iap_readserialid>
     9e8:	4993      	ldr	r1, [pc, #588]	; (c38 <main+0x300>)
     9ea:	2208      	movs	r2, #8
     9ec:	1c38      	adds	r0, r7, #0
     9ee:	f000 fdab 	bl	1548 <memcpy>
     9f2:	1c28      	adds	r0, r5, #0
     9f4:	220f      	movs	r2, #15
     9f6:	4991      	ldr	r1, [pc, #580]	; (c3c <main+0x304>)
     9f8:	300e      	adds	r0, #14
     9fa:	f000 fda5 	bl	1548 <memcpy>
     9fe:	2343      	movs	r3, #67	; 0x43
     a00:	702b      	strb	r3, [r5, #0]
     a02:	330b      	adds	r3, #11
     a04:	706b      	strb	r3, [r5, #1]
     a06:	3b0e      	subs	r3, #14
     a08:	70ab      	strb	r3, [r5, #2]
     a0a:	3b3f      	subs	r3, #63	; 0x3f
     a0c:	712b      	strb	r3, [r5, #4]
     a0e:	716b      	strb	r3, [r5, #5]
     a10:	2120      	movs	r1, #32
     a12:	70ec      	strb	r4, [r5, #3]
     a14:	1c38      	adds	r0, r7, #0
     a16:	f7ff fc8d 	bl	334 <crc16>
     a1a:	1deb      	adds	r3, r5, #7
     a1c:	0a02      	lsrs	r2, r0, #8
     a1e:	77da      	strb	r2, [r3, #31]
     a20:	1c2b      	adds	r3, r5, #0
     a22:	3308      	adds	r3, #8
     a24:	77d8      	strb	r0, [r3, #31]
     a26:	1c31      	adds	r1, r6, #0
     a28:	1c28      	adds	r0, r5, #0
     a2a:	e04c      	b.n	ac6 <main+0x18e>
     a2c:	2b24      	cmp	r3, #36	; 0x24
     a2e:	d054      	beq.n	ada <main+0x1a2>
     a30:	2b30      	cmp	r3, #48	; 0x30
     a32:	d172      	bne.n	b1a <main+0x1e2>
     a34:	4d7f      	ldr	r5, [pc, #508]	; (c34 <main+0x2fc>)
     a36:	1c32      	adds	r2, r6, #0
     a38:	1c28      	adds	r0, r5, #0
     a3a:	1c21      	adds	r1, r4, #0
     a3c:	f000 fd88 	bl	1550 <memset>
     a40:	1c2e      	adds	r6, r5, #0
     a42:	4b7f      	ldr	r3, [pc, #508]	; (c40 <main+0x308>)
     a44:	5ae2      	ldrh	r2, [r4, r3]
     a46:	1933      	adds	r3, r6, r4
     a48:	0a11      	lsrs	r1, r2, #8
     a4a:	3402      	adds	r4, #2
     a4c:	7199      	strb	r1, [r3, #6]
     a4e:	71da      	strb	r2, [r3, #7]
     a50:	2c0e      	cmp	r4, #14
     a52:	d1f6      	bne.n	a42 <main+0x10a>
     a54:	2400      	movs	r4, #0
     a56:	2000      	movs	r0, #0
     a58:	f7ff fdfe 	bl	658 <get_pg_state>
     a5c:	1c20      	adds	r0, r4, #0
     a5e:	752c      	strb	r4, [r5, #20]
     a60:	f7ff fdfa 	bl	658 <get_pg_state>
     a64:	7568      	strb	r0, [r5, #21]
     a66:	2001      	movs	r0, #1
     a68:	f7ff fdf6 	bl	658 <get_pg_state>
     a6c:	2001      	movs	r0, #1
     a6e:	75ac      	strb	r4, [r5, #22]
     a70:	f7ff fdf2 	bl	658 <get_pg_state>
     a74:	75e8      	strb	r0, [r5, #23]
     a76:	1c20      	adds	r0, r4, #0
     a78:	f7ff ff3a 	bl	8f0 <get_led_state>
     a7c:	0a00      	lsrs	r0, r0, #8
     a7e:	7628      	strb	r0, [r5, #24]
     a80:	1c20      	adds	r0, r4, #0
     a82:	f7ff ff35 	bl	8f0 <get_led_state>
     a86:	7668      	strb	r0, [r5, #25]
     a88:	2001      	movs	r0, #1
     a8a:	f7ff ff31 	bl	8f0 <get_led_state>
     a8e:	0a00      	lsrs	r0, r0, #8
     a90:	76a8      	strb	r0, [r5, #26]
     a92:	2001      	movs	r0, #1
     a94:	f7ff ff2c 	bl	8f0 <get_led_state>
     a98:	2343      	movs	r3, #67	; 0x43
     a9a:	702b      	strb	r3, [r5, #0]
     a9c:	330b      	adds	r3, #11
     a9e:	706b      	strb	r3, [r5, #1]
     aa0:	3b06      	subs	r3, #6
     aa2:	70ab      	strb	r3, [r5, #2]
     aa4:	3b47      	subs	r3, #71	; 0x47
     aa6:	76e8      	strb	r0, [r5, #27]
     aa8:	712b      	strb	r3, [r5, #4]
     aaa:	716b      	strb	r3, [r5, #5]
     aac:	2120      	movs	r1, #32
     aae:	70ec      	strb	r4, [r5, #3]
     ab0:	1db0      	adds	r0, r6, #6
     ab2:	f7ff fc3f 	bl	334 <crc16>
     ab6:	1df3      	adds	r3, r6, #7
     ab8:	0a02      	lsrs	r2, r0, #8
     aba:	77da      	strb	r2, [r3, #31]
     abc:	1c33      	adds	r3, r6, #0
     abe:	3308      	adds	r3, #8
     ac0:	77d8      	strb	r0, [r3, #31]
     ac2:	2128      	movs	r1, #40	; 0x28
     ac4:	1c30      	adds	r0, r6, #0
     ac6:	f000 f965 	bl	d94 <uart_write>
     aca:	e026      	b.n	b1a <main+0x1e2>
     acc:	79a8      	ldrb	r0, [r5, #6]
     ace:	79eb      	ldrb	r3, [r5, #7]
     ad0:	0200      	lsls	r0, r0, #8
     ad2:	4318      	orrs	r0, r3
     ad4:	f7ff fd50 	bl	578 <set_voltage>
     ad8:	e01f      	b.n	b1a <main+0x1e2>
     ada:	78eb      	ldrb	r3, [r5, #3]
     adc:	2b00      	cmp	r3, #0
     ade:	d106      	bne.n	aee <main+0x1b6>
     ae0:	79a8      	ldrb	r0, [r5, #6]
     ae2:	79eb      	ldrb	r3, [r5, #7]
     ae4:	0200      	lsls	r0, r0, #8
     ae6:	4318      	orrs	r0, r3
     ae8:	f7ff fe72 	bl	7d0 <set_led_state>
     aec:	e015      	b.n	b1a <main+0x1e2>
     aee:	2b01      	cmp	r3, #1
     af0:	d113      	bne.n	b1a <main+0x1e2>
     af2:	79a8      	ldrb	r0, [r5, #6]
     af4:	79eb      	ldrb	r3, [r5, #7]
     af6:	0600      	lsls	r0, r0, #24
     af8:	041b      	lsls	r3, r3, #16
     afa:	4318      	orrs	r0, r3
     afc:	7a6b      	ldrb	r3, [r5, #9]
     afe:	4318      	orrs	r0, r3
     b00:	7a2b      	ldrb	r3, [r5, #8]
     b02:	021b      	lsls	r3, r3, #8
     b04:	4318      	orrs	r0, r3
     b06:	f000 fe84 	bl	1812 <__aeabi_i2d>
     b0a:	4b4e      	ldr	r3, [pc, #312]	; (c44 <main+0x30c>)
     b0c:	4a4e      	ldr	r2, [pc, #312]	; (c48 <main+0x310>)
     b0e:	f000 fd65 	bl	15dc <__aeabi_dmul>
     b12:	f000 fe1f 	bl	1754 <__aeabi_d2f>
     b16:	4b4d      	ldr	r3, [pc, #308]	; (c4c <main+0x314>)
     b18:	6018      	str	r0, [r3, #0]
     b1a:	2000      	movs	r0, #0
     b1c:	f000 f9c6 	bl	eac <timer_istimeout>
     b20:	1c04      	adds	r4, r0, #0
     b22:	e007      	b.n	b34 <main+0x1fc>
     b24:	f000 f8fa 	bl	d1c <uart_rxrb_cnt>
     b28:	2400      	movs	r4, #0
     b2a:	2327      	movs	r3, #39	; 0x27
     b2c:	4283      	cmp	r3, r0
     b2e:	4164      	adcs	r4, r4
     b30:	b2e4      	uxtb	r4, r4
     b32:	bf30      	wfi
     b34:	2001      	movs	r0, #1
     b36:	f000 f9b9 	bl	eac <timer_istimeout>
     b3a:	2800      	cmp	r0, #0
     b3c:	d100      	bne.n	b40 <main+0x208>
     b3e:	e717      	b.n	970 <main+0x38>
     b40:	4e43      	ldr	r6, [pc, #268]	; (c50 <main+0x318>)
     b42:	4d44      	ldr	r5, [pc, #272]	; (c54 <main+0x31c>)
     b44:	8831      	ldrh	r1, [r6, #0]
     b46:	2003      	movs	r0, #3
     b48:	0049      	lsls	r1, r1, #1
     b4a:	1869      	adds	r1, r5, r1
     b4c:	f7ff fc3a 	bl	3c4 <adc_read>
     b50:	8831      	ldrh	r1, [r6, #0]
     b52:	2006      	movs	r0, #6
     b54:	3103      	adds	r1, #3
     b56:	0049      	lsls	r1, r1, #1
     b58:	1869      	adds	r1, r5, r1
     b5a:	f7ff fc33 	bl	3c4 <adc_read>
     b5e:	8831      	ldrh	r1, [r6, #0]
     b60:	2005      	movs	r0, #5
     b62:	3106      	adds	r1, #6
     b64:	0049      	lsls	r1, r1, #1
     b66:	1869      	adds	r1, r5, r1
     b68:	f7ff fc2c 	bl	3c4 <adc_read>
     b6c:	8831      	ldrh	r1, [r6, #0]
     b6e:	2005      	movs	r0, #5
     b70:	3109      	adds	r1, #9
     b72:	0049      	lsls	r1, r1, #1
     b74:	1869      	adds	r1, r5, r1
     b76:	f7ff fc25 	bl	3c4 <adc_read>
     b7a:	8831      	ldrh	r1, [r6, #0]
     b7c:	2001      	movs	r0, #1
     b7e:	310c      	adds	r1, #12
     b80:	0049      	lsls	r1, r1, #1
     b82:	1869      	adds	r1, r5, r1
     b84:	f7ff fc1e 	bl	3c4 <adc_read>
     b88:	8831      	ldrh	r1, [r6, #0]
     b8a:	2002      	movs	r0, #2
     b8c:	310f      	adds	r1, #15
     b8e:	0049      	lsls	r1, r1, #1
     b90:	1869      	adds	r1, r5, r1
     b92:	f7ff fc17 	bl	3c4 <adc_read>
     b96:	8831      	ldrh	r1, [r6, #0]
     b98:	2007      	movs	r0, #7
     b9a:	3112      	adds	r1, #18
     b9c:	0049      	lsls	r1, r1, #1
     b9e:	1869      	adds	r1, r5, r1
     ba0:	f7ff fc10 	bl	3c4 <adc_read>
     ba4:	8833      	ldrh	r3, [r6, #0]
     ba6:	1c28      	adds	r0, r5, #0
     ba8:	3301      	adds	r3, #1
     baa:	b29b      	uxth	r3, r3
     bac:	2b02      	cmp	r3, #2
     bae:	d900      	bls.n	bb2 <main+0x27a>
     bb0:	2300      	movs	r3, #0
     bb2:	2200      	movs	r2, #0
     bb4:	8033      	strh	r3, [r6, #0]
     bb6:	2300      	movs	r3, #0
     bb8:	ad03      	add	r5, sp, #12
     bba:	5153      	str	r3, [r2, r5]
     bbc:	3204      	adds	r2, #4
     bbe:	2a1c      	cmp	r2, #28
     bc0:	d1f9      	bne.n	bb6 <main+0x27e>
     bc2:	2200      	movs	r2, #0
     bc4:	2106      	movs	r1, #6
     bc6:	4351      	muls	r1, r2
     bc8:	0097      	lsls	r7, r2, #2
     bca:	18c6      	adds	r6, r0, r3
     bcc:	5a71      	ldrh	r1, [r6, r1]
     bce:	59ee      	ldr	r6, [r5, r7]
     bd0:	3201      	adds	r2, #1
     bd2:	1989      	adds	r1, r1, r6
     bd4:	51e9      	str	r1, [r5, r7]
     bd6:	2a07      	cmp	r2, #7
     bd8:	d1f4      	bne.n	bc4 <main+0x28c>
     bda:	3302      	adds	r3, #2
     bdc:	2b06      	cmp	r3, #6
     bde:	d1f0      	bne.n	bc2 <main+0x28a>
     be0:	2600      	movs	r6, #0
     be2:	4b1a      	ldr	r3, [pc, #104]	; (c4c <main+0x314>)
     be4:	681b      	ldr	r3, [r3, #0]
     be6:	9301      	str	r3, [sp, #4]
     be8:	0073      	lsls	r3, r6, #1
     bea:	58e8      	ldr	r0, [r5, r3]
     bec:	2103      	movs	r1, #3
     bee:	f000 fcba 	bl	1566 <__aeabi_uidiv>
     bf2:	f000 febd 	bl	1970 <__aeabi_ui2f>
     bf6:	9901      	ldr	r1, [sp, #4]
     bf8:	f000 fe16 	bl	1828 <__aeabi_fmul>
     bfc:	f000 fe74 	bl	18e8 <__aeabi_f2uiz>
     c00:	4f0f      	ldr	r7, [pc, #60]	; (c40 <main+0x308>)
     c02:	53f0      	strh	r0, [r6, r7]
     c04:	3602      	adds	r6, #2
     c06:	2e0c      	cmp	r6, #12
     c08:	d1ee      	bne.n	be8 <main+0x2b0>
     c0a:	2103      	movs	r1, #3
     c0c:	69a8      	ldr	r0, [r5, #24]
     c0e:	f000 fcaa 	bl	1566 <__aeabi_uidiv>
     c12:	f000 fead 	bl	1970 <__aeabi_ui2f>
     c16:	f000 fe67 	bl	18e8 <__aeabi_f2uiz>
     c1a:	21fa      	movs	r1, #250	; 0xfa
     c1c:	81b8      	strh	r0, [r7, #12]
     c1e:	0089      	lsls	r1, r1, #2
     c20:	2001      	movs	r0, #1
     c22:	2200      	movs	r2, #0
     c24:	f000 f926 	bl	e74 <timer_set>
     c28:	e6a2      	b.n	970 <main+0x38>
     c2a:	46c0      	nop			; (mov r8, r8)
     c2c:	00000bb8 			; <UNDEFINED> instruction: 0x00000bb8
     c30:	10000076 	andne	r0, r0, r6, ror r0
     c34:	10000024 	andne	r0, r0, r4, lsr #32
     c38:	1000001c 	andne	r0, r0, ip, lsl r0
     c3c:	00001a00 	andeq	r1, r0, r0, lsl #20
     c40:	1000009e 	mulne	r0, lr, r0
     c44:	3f50624d 	svccc	0x0050624d
     c48:	d2f1a9fc 	rscsle	sl, r1, #252, 18	; 0x3f0000
     c4c:	10000000 	andne	r0, r0, r0
     c50:	100000ac 	andne	r0, r0, ip, lsr #1
     c54:	1000004c 	andne	r0, r0, ip, asr #32

00000c58 <SystemInit>:
     c58:	b508      	push	{r3, lr}
     c5a:	2000      	movs	r0, #0
     c5c:	f000 f938 	bl	ed0 <System_OscSelect>
     c60:	f000 f93c 	bl	edc <Board_SystemInit>
     c64:	bd08      	pop	{r3, pc}
	...

00000c68 <uart_init>:
     c68:	b510      	push	{r4, lr}
     c6a:	4c1d      	ldr	r4, [pc, #116]	; (ce0 <uart_init+0x78>)
     c6c:	2100      	movs	r1, #0
     c6e:	1c20      	adds	r0, r4, #0
     c70:	2212      	movs	r2, #18
     c72:	2301      	movs	r3, #1
     c74:	f000 fa8e 	bl	1194 <Chip_IOCON_PinMuxSet>
     c78:	1c20      	adds	r0, r4, #0
     c7a:	4c1a      	ldr	r4, [pc, #104]	; (ce4 <uart_init+0x7c>)
     c7c:	2213      	movs	r2, #19
     c7e:	2301      	movs	r3, #1
     c80:	2100      	movs	r1, #0
     c82:	f000 fa87 	bl	1194 <Chip_IOCON_PinMuxSet>
     c86:	1c20      	adds	r0, r4, #0
     c88:	f000 fbae 	bl	13e8 <Chip_UART_Init>
     c8c:	21e1      	movs	r1, #225	; 0xe1
     c8e:	1c20      	adds	r0, r4, #0
     c90:	0249      	lsls	r1, r1, #9
     c92:	f000 fc1b 	bl	14cc <Chip_UART_SetBaudFDR>
     c96:	2303      	movs	r3, #3
     c98:	60e3      	str	r3, [r4, #12]
     c9a:	337e      	adds	r3, #126	; 0x7e
     c9c:	60a3      	str	r3, [r4, #8]
     c9e:	3b01      	subs	r3, #1
     ca0:	6323      	str	r3, [r4, #48]	; 0x30
     ca2:	4911      	ldr	r1, [pc, #68]	; (ce8 <uart_init+0x80>)
     ca4:	2201      	movs	r2, #1
     ca6:	3320      	adds	r3, #32
     ca8:	4810      	ldr	r0, [pc, #64]	; (cec <uart_init+0x84>)
     caa:	f000 fab1 	bl	1210 <RingBuffer_Init>
     cae:	4910      	ldr	r1, [pc, #64]	; (cf0 <uart_init+0x88>)
     cb0:	2201      	movs	r2, #1
     cb2:	23a0      	movs	r3, #160	; 0xa0
     cb4:	480f      	ldr	r0, [pc, #60]	; (cf4 <uart_init+0x8c>)
     cb6:	f000 faab 	bl	1210 <RingBuffer_Init>
     cba:	2205      	movs	r2, #5
     cbc:	21c5      	movs	r1, #197	; 0xc5
     cbe:	6863      	ldr	r3, [r4, #4]
     cc0:	0089      	lsls	r1, r1, #2
     cc2:	4313      	orrs	r3, r2
     cc4:	4a0c      	ldr	r2, [pc, #48]	; (cf8 <uart_init+0x90>)
     cc6:	6063      	str	r3, [r4, #4]
     cc8:	5850      	ldr	r0, [r2, r1]
     cca:	4b0c      	ldr	r3, [pc, #48]	; (cfc <uart_init+0x94>)
     ccc:	4003      	ands	r3, r0
     cce:	2080      	movs	r0, #128	; 0x80
     cd0:	01c0      	lsls	r0, r0, #7
     cd2:	4303      	orrs	r3, r0
     cd4:	5053      	str	r3, [r2, r1]
     cd6:	2380      	movs	r3, #128	; 0x80
     cd8:	039b      	lsls	r3, r3, #14
     cda:	6013      	str	r3, [r2, #0]
     cdc:	bd10      	pop	{r4, pc}
     cde:	46c0      	nop			; (mov r8, r8)
     ce0:	40044000 	andmi	r4, r4, r0
     ce4:	40008000 	andmi	r8, r0, r0
     ce8:	100000ae 	andne	r0, r0, lr, lsr #1
     cec:	10000150 	andne	r0, r0, r0, asr r1
     cf0:	10000178 	andne	r0, r0, r8, ror r1
     cf4:	10000164 	andne	r0, r0, r4, ror #2
     cf8:	e000e100 	and	lr, r0, r0, lsl #2
     cfc:	ffff00ff 			; <UNDEFINED> instruction: 0xffff00ff

00000d00 <UART_IRQHandler>:
     d00:	b508      	push	{r3, lr}
     d02:	4803      	ldr	r0, [pc, #12]	; (d10 <UART_IRQHandler+0x10>)
     d04:	4903      	ldr	r1, [pc, #12]	; (d14 <UART_IRQHandler+0x14>)
     d06:	4a04      	ldr	r2, [pc, #16]	; (d18 <UART_IRQHandler+0x18>)
     d08:	f000 fbc9 	bl	149e <Chip_UART_IRQRBHandler>
     d0c:	bd08      	pop	{r3, pc}
     d0e:	46c0      	nop			; (mov r8, r8)
     d10:	40008000 	andmi	r8, r0, r0
     d14:	10000150 	andne	r0, r0, r0, asr r1
     d18:	10000164 	andne	r0, r0, r4, ror #2

00000d1c <uart_rxrb_cnt>:
     d1c:	4a02      	ldr	r2, [pc, #8]	; (d28 <uart_rxrb_cnt+0xc>)
     d1e:	68d3      	ldr	r3, [r2, #12]
     d20:	6910      	ldr	r0, [r2, #16]
     d22:	1a18      	subs	r0, r3, r0
     d24:	4770      	bx	lr
     d26:	46c0      	nop			; (mov r8, r8)
     d28:	10000150 	andne	r0, r0, r0, asr r1

00000d2c <uart_read>:
     d2c:	b5f0      	push	{r4, r5, r6, r7, lr}
     d2e:	b085      	sub	sp, #20
     d30:	ab02      	add	r3, sp, #8
     d32:	1d9d      	adds	r5, r3, #6
     d34:	2300      	movs	r3, #0
     d36:	aa02      	add	r2, sp, #8
     d38:	4e14      	ldr	r6, [pc, #80]	; (d8c <uart_read+0x60>)
     d3a:	1dd7      	adds	r7, r2, #7
     d3c:	9101      	str	r1, [sp, #4]
     d3e:	702b      	strb	r3, [r5, #0]
     d40:	703b      	strb	r3, [r7, #0]
     d42:	1c04      	adds	r4, r0, #0
     d44:	3301      	adds	r3, #1
     d46:	4812      	ldr	r0, [pc, #72]	; (d90 <uart_read+0x64>)
     d48:	1c31      	adds	r1, r6, #0
     d4a:	1c2a      	adds	r2, r5, #0
     d4c:	f000 fba0 	bl	1490 <Chip_UART_ReadRB>
     d50:	782b      	ldrb	r3, [r5, #0]
     d52:	2b43      	cmp	r3, #67	; 0x43
     d54:	d001      	beq.n	d5a <uart_read+0x2e>
     d56:	2000      	movs	r0, #0
     d58:	e016      	b.n	d88 <uart_read+0x5c>
     d5a:	2301      	movs	r3, #1
     d5c:	480c      	ldr	r0, [pc, #48]	; (d90 <uart_read+0x64>)
     d5e:	1c31      	adds	r1, r6, #0
     d60:	1c3a      	adds	r2, r7, #0
     d62:	f000 fb95 	bl	1490 <Chip_UART_ReadRB>
     d66:	783b      	ldrb	r3, [r7, #0]
     d68:	2b4e      	cmp	r3, #78	; 0x4e
     d6a:	d1f4      	bne.n	d56 <uart_read+0x2a>
     d6c:	1e20      	subs	r0, r4, #0
     d6e:	d00a      	beq.n	d86 <uart_read+0x5a>
     d70:	782a      	ldrb	r2, [r5, #0]
     d72:	7063      	strb	r3, [r4, #1]
     d74:	9b01      	ldr	r3, [sp, #4]
     d76:	7022      	strb	r2, [r4, #0]
     d78:	3b02      	subs	r3, #2
     d7a:	1ca2      	adds	r2, r4, #2
     d7c:	4804      	ldr	r0, [pc, #16]	; (d90 <uart_read+0x64>)
     d7e:	1c31      	adds	r1, r6, #0
     d80:	f000 fb86 	bl	1490 <Chip_UART_ReadRB>
     d84:	b280      	uxth	r0, r0
     d86:	3002      	adds	r0, #2
     d88:	b005      	add	sp, #20
     d8a:	bdf0      	pop	{r4, r5, r6, r7, pc}
     d8c:	10000150 	andne	r0, r0, r0, asr r1
     d90:	40008000 	andmi	r8, r0, r0

00000d94 <uart_write>:
     d94:	b508      	push	{r3, lr}
     d96:	1e02      	subs	r2, r0, #0
     d98:	d004      	beq.n	da4 <uart_write+0x10>
     d9a:	1c0b      	adds	r3, r1, #0
     d9c:	4802      	ldr	r0, [pc, #8]	; (da8 <uart_write+0x14>)
     d9e:	4903      	ldr	r1, [pc, #12]	; (dac <uart_write+0x18>)
     da0:	f000 fb57 	bl	1452 <Chip_UART_SendRB>
     da4:	bd08      	pop	{r3, pc}
     da6:	46c0      	nop			; (mov r8, r8)
     da8:	40008000 	andmi	r8, r0, r0
     dac:	10000164 	andne	r0, r0, r4, ror #2

00000db0 <TIMER32_0_IRQHandler>:
     db0:	2202      	movs	r2, #2
     db2:	b538      	push	{r3, r4, r5, lr}
     db4:	4b0f      	ldr	r3, [pc, #60]	; (df4 <TIMER32_0_IRQHandler+0x44>)
     db6:	6819      	ldr	r1, [r3, #0]
     db8:	4211      	tst	r1, r2
     dba:	d019      	beq.n	df0 <TIMER32_0_IRQHandler+0x40>
     dbc:	4c0e      	ldr	r4, [pc, #56]	; (df8 <TIMER32_0_IRQHandler+0x48>)
     dbe:	4d0f      	ldr	r5, [pc, #60]	; (dfc <TIMER32_0_IRQHandler+0x4c>)
     dc0:	601a      	str	r2, [r3, #0]
     dc2:	1f23      	subs	r3, r4, #4
     dc4:	781b      	ldrb	r3, [r3, #0]
     dc6:	2b00      	cmp	r3, #0
     dc8:	d00f      	beq.n	dea <TIMER32_0_IRQHandler+0x3a>
     dca:	6823      	ldr	r3, [r4, #0]
     dcc:	2b00      	cmp	r3, #0
     dce:	d00c      	beq.n	dea <TIMER32_0_IRQHandler+0x3a>
     dd0:	3b01      	subs	r3, #1
     dd2:	6023      	str	r3, [r4, #0]
     dd4:	2b00      	cmp	r3, #0
     dd6:	d108      	bne.n	dea <TIMER32_0_IRQHandler+0x3a>
     dd8:	68a3      	ldr	r3, [r4, #8]
     dda:	2b00      	cmp	r3, #0
     ddc:	d001      	beq.n	de2 <TIMER32_0_IRQHandler+0x32>
     dde:	4798      	blx	r3
     de0:	e001      	b.n	de6 <TIMER32_0_IRQHandler+0x36>
     de2:	2301      	movs	r3, #1
     de4:	7323      	strb	r3, [r4, #12]
     de6:	6863      	ldr	r3, [r4, #4]
     de8:	6023      	str	r3, [r4, #0]
     dea:	3414      	adds	r4, #20
     dec:	42ac      	cmp	r4, r5
     dee:	d1e8      	bne.n	dc2 <TIMER32_0_IRQHandler+0x12>
     df0:	bd38      	pop	{r3, r4, r5, pc}
     df2:	46c0      	nop			; (mov r8, r8)
     df4:	40014000 	andmi	r4, r1, r0
     df8:	1000021c 	andne	r0, r0, ip, lsl r2
     dfc:	100002bc 			; <UNDEFINED> instruction: 0x100002bc

00000e00 <timer_init>:
     e00:	b538      	push	{r3, r4, r5, lr}
     e02:	4918      	ldr	r1, [pc, #96]	; (e64 <timer_init+0x64>)
     e04:	4b18      	ldr	r3, [pc, #96]	; (e68 <timer_init+0x68>)
     e06:	2200      	movs	r2, #0
     e08:	1f18      	subs	r0, r3, #4
     e0a:	7002      	strb	r2, [r0, #0]
     e0c:	601a      	str	r2, [r3, #0]
     e0e:	605a      	str	r2, [r3, #4]
     e10:	609a      	str	r2, [r3, #8]
     e12:	731a      	strb	r2, [r3, #12]
     e14:	3314      	adds	r3, #20
     e16:	428b      	cmp	r3, r1
     e18:	d1f5      	bne.n	e06 <timer_init+0x6>
     e1a:	4c14      	ldr	r4, [pc, #80]	; (e6c <timer_init+0x6c>)
     e1c:	1c20      	adds	r0, r4, #0
     e1e:	f000 f9cd 	bl	11bc <Chip_TIMER_Init>
     e22:	f000 f9a5 	bl	1170 <Chip_Clock_GetSystemClockRate>
     e26:	1c05      	adds	r5, r0, #0
     e28:	1c20      	adds	r0, r4, #0
     e2a:	f000 f9e5 	bl	11f8 <Chip_TIMER_Reset>
     e2e:	2208      	movs	r2, #8
     e30:	21fa      	movs	r1, #250	; 0xfa
     e32:	6963      	ldr	r3, [r4, #20]
     e34:	1c28      	adds	r0, r5, #0
     e36:	4313      	orrs	r3, r2
     e38:	6163      	str	r3, [r4, #20]
     e3a:	0089      	lsls	r1, r1, #2
     e3c:	f000 fb93 	bl	1566 <__aeabi_uidiv>
     e40:	2210      	movs	r2, #16
     e42:	61e0      	str	r0, [r4, #28]
     e44:	6963      	ldr	r3, [r4, #20]
     e46:	21c0      	movs	r1, #192	; 0xc0
     e48:	4313      	orrs	r3, r2
     e4a:	2280      	movs	r2, #128	; 0x80
     e4c:	6163      	str	r3, [r4, #20]
     e4e:	4b08      	ldr	r3, [pc, #32]	; (e70 <timer_init+0x70>)
     e50:	02d2      	lsls	r2, r2, #11
     e52:	0049      	lsls	r1, r1, #1
     e54:	505a      	str	r2, [r3, r1]
     e56:	601a      	str	r2, [r3, #0]
     e58:	2201      	movs	r2, #1
     e5a:	6863      	ldr	r3, [r4, #4]
     e5c:	4313      	orrs	r3, r2
     e5e:	6063      	str	r3, [r4, #4]
     e60:	bd38      	pop	{r3, r4, r5, pc}
     e62:	46c0      	nop			; (mov r8, r8)
     e64:	100002bc 			; <UNDEFINED> instruction: 0x100002bc
     e68:	1000021c 	andne	r0, r0, ip, lsl r2
     e6c:	40014000 	andmi	r4, r1, r0
     e70:	e000e100 	and	lr, r0, r0, lsl #2

00000e74 <timer_set>:
     e74:	2314      	movs	r3, #20
     e76:	4358      	muls	r0, r3
     e78:	b510      	push	{r4, lr}
     e7a:	4c05      	ldr	r4, [pc, #20]	; (e90 <timer_set+0x1c>)
     e7c:	3b13      	subs	r3, #19
     e7e:	5503      	strb	r3, [r0, r4]
     e80:	2300      	movs	r3, #0
     e82:	1820      	adds	r0, r4, r0
     e84:	6041      	str	r1, [r0, #4]
     e86:	6081      	str	r1, [r0, #8]
     e88:	60c2      	str	r2, [r0, #12]
     e8a:	7403      	strb	r3, [r0, #16]
     e8c:	bd10      	pop	{r4, pc}
     e8e:	46c0      	nop			; (mov r8, r8)
     e90:	10000218 	andne	r0, r0, r8, lsl r2

00000e94 <timer_kill>:
     e94:	2314      	movs	r3, #20
     e96:	4358      	muls	r0, r3
     e98:	4a03      	ldr	r2, [pc, #12]	; (ea8 <timer_kill+0x14>)
     e9a:	5c83      	ldrb	r3, [r0, r2]
     e9c:	2b00      	cmp	r3, #0
     e9e:	d001      	beq.n	ea4 <timer_kill+0x10>
     ea0:	2300      	movs	r3, #0
     ea2:	5483      	strb	r3, [r0, r2]
     ea4:	4770      	bx	lr
     ea6:	46c0      	nop			; (mov r8, r8)
     ea8:	10000218 	andne	r0, r0, r8, lsl r2

00000eac <timer_istimeout>:
     eac:	2214      	movs	r2, #20
     eae:	1c13      	adds	r3, r2, #0
     eb0:	4343      	muls	r3, r0
     eb2:	4903      	ldr	r1, [pc, #12]	; (ec0 <timer_istimeout+0x14>)
     eb4:	5c58      	ldrb	r0, [r3, r1]
     eb6:	2800      	cmp	r0, #0
     eb8:	d001      	beq.n	ebe <timer_istimeout+0x12>
     eba:	18cb      	adds	r3, r1, r3
     ebc:	7c18      	ldrb	r0, [r3, #16]
     ebe:	4770      	bx	lr
     ec0:	10000218 	andne	r0, r0, r8, lsl r2

00000ec4 <Board_Init>:
     ec4:	20a0      	movs	r0, #160	; 0xa0
     ec6:	b508      	push	{r3, lr}
     ec8:	05c0      	lsls	r0, r0, #23
     eca:	f000 fa63 	bl	1394 <Chip_GPIO_Init>
     ece:	bd08      	pop	{r3, pc}

00000ed0 <System_OscSelect>:
     ed0:	4b01      	ldr	r3, [pc, #4]	; (ed8 <System_OscSelect+0x8>)
     ed2:	6018      	str	r0, [r3, #0]
     ed4:	4770      	bx	lr
     ed6:	46c0      	nop			; (mov r8, r8)
     ed8:	10000004 	andne	r0, r0, r4

00000edc <Board_SystemInit>:
     edc:	b573      	push	{r0, r1, r4, r5, r6, lr}
     ede:	2020      	movs	r0, #32
     ee0:	f000 fa70 	bl	13c4 <Chip_SYSCTL_PowerUp>
     ee4:	2300      	movs	r3, #0
     ee6:	9301      	str	r3, [sp, #4]
     ee8:	9b01      	ldr	r3, [sp, #4]
     eea:	2bff      	cmp	r3, #255	; 0xff
     eec:	dc02      	bgt.n	ef4 <Board_SystemInit+0x18>
     eee:	9b01      	ldr	r3, [sp, #4]
     ef0:	3301      	adds	r3, #1
     ef2:	e7f8      	b.n	ee6 <Board_SystemInit+0xa>
     ef4:	4d1e      	ldr	r5, [pc, #120]	; (f70 <Board_SystemInit+0x94>)
     ef6:	4c1f      	ldr	r4, [pc, #124]	; (f74 <Board_SystemInit+0x98>)
     ef8:	7828      	ldrb	r0, [r5, #0]
     efa:	f000 f8cd 	bl	1098 <Chip_Clock_SetSystemPLLSource>
     efe:	2080      	movs	r0, #128	; 0x80
     f00:	f000 fa50 	bl	13a4 <Chip_SYSCTL_PowerDown>
     f04:	2323      	movs	r3, #35	; 0x23
     f06:	2080      	movs	r0, #128	; 0x80
     f08:	60a3      	str	r3, [r4, #8]
     f0a:	f000 fa5b 	bl	13c4 <Chip_SYSCTL_PowerUp>
     f0e:	2301      	movs	r3, #1
     f10:	68e2      	ldr	r2, [r4, #12]
     f12:	4e18      	ldr	r6, [pc, #96]	; (f74 <Board_SystemInit+0x98>)
     f14:	421a      	tst	r2, r3
     f16:	d0fa      	beq.n	f0e <Board_SystemInit+0x32>
     f18:	2003      	movs	r0, #3
     f1a:	2102      	movs	r1, #2
     f1c:	4a16      	ldr	r2, [pc, #88]	; (f78 <Board_SystemInit+0x9c>)
     f1e:	67b3      	str	r3, [r6, #120]	; 0x78
     f20:	6913      	ldr	r3, [r2, #16]
     f22:	4383      	bics	r3, r0
     f24:	430b      	orrs	r3, r1
     f26:	6113      	str	r3, [r2, #16]
     f28:	f000 f8ca 	bl	10c0 <Chip_Clock_SetMainClockSource>
     f2c:	6828      	ldr	r0, [r5, #0]
     f2e:	b2c0      	uxtb	r0, r0
     f30:	f000 f8bc 	bl	10ac <Chip_Clock_SetUSBPLLSource>
     f34:	2323      	movs	r3, #35	; 0x23
     f36:	2080      	movs	r0, #128	; 0x80
     f38:	6133      	str	r3, [r6, #16]
     f3a:	0040      	lsls	r0, r0, #1
     f3c:	f000 fa42 	bl	13c4 <Chip_SYSCTL_PowerUp>
     f40:	6963      	ldr	r3, [r4, #20]
     f42:	07db      	lsls	r3, r3, #31
     f44:	d5fc      	bpl.n	f40 <Board_SystemInit+0x64>
     f46:	2180      	movs	r1, #128	; 0x80
     f48:	2400      	movs	r4, #0
     f4a:	4a0c      	ldr	r2, [pc, #48]	; (f7c <Board_SystemInit+0xa0>)
     f4c:	0249      	lsls	r1, r1, #9
     f4e:	6fd3      	ldr	r3, [r2, #124]	; 0x7c
     f50:	430b      	orrs	r3, r1
     f52:	67d3      	str	r3, [r2, #124]	; 0x7c
     f54:	4a0a      	ldr	r2, [pc, #40]	; (f80 <Board_SystemInit+0xa4>)
     f56:	00a3      	lsls	r3, r4, #2
     f58:	5c99      	ldrb	r1, [r3, r2]
     f5a:	18d3      	adds	r3, r2, r3
     f5c:	785a      	ldrb	r2, [r3, #1]
     f5e:	4809      	ldr	r0, [pc, #36]	; (f84 <Board_SystemInit+0xa8>)
     f60:	885b      	ldrh	r3, [r3, #2]
     f62:	3401      	adds	r4, #1
     f64:	f000 f916 	bl	1194 <Chip_IOCON_PinMuxSet>
     f68:	2c09      	cmp	r4, #9
     f6a:	d1f3      	bne.n	f54 <Board_SystemInit+0x78>
     f6c:	bd73      	pop	{r0, r1, r4, r5, r6, pc}
     f6e:	46c0      	nop			; (mov r8, r8)
     f70:	10000004 	andne	r0, r0, r4
     f74:	40048000 	andmi	r8, r4, r0
     f78:	4003c000 	andmi	ip, r3, r0
     f7c:	40048004 	andmi	r8, r4, r4
     f80:	00001a14 	andeq	r1, r0, r4, lsl sl
     f84:	40044000 	andmi	r4, r4, r0

00000f88 <setStartMode>:
     f88:	6802      	ldr	r2, [r0, #0]
     f8a:	4b03      	ldr	r3, [pc, #12]	; (f98 <setStartMode+0x10>)
     f8c:	0609      	lsls	r1, r1, #24
     f8e:	4013      	ands	r3, r2
     f90:	4319      	orrs	r1, r3
     f92:	6001      	str	r1, [r0, #0]
     f94:	4770      	bx	lr
     f96:	46c0      	nop			; (mov r8, r8)
     f98:	f8ffffff 			; <UNDEFINED> instruction: 0xf8ffffff

00000f9c <Chip_ADC_Init>:
     f9c:	b538      	push	{r3, r4, r5, lr}
     f9e:	1c04      	adds	r4, r0, #0
     fa0:	2010      	movs	r0, #16
     fa2:	1c0d      	adds	r5, r1, #0
     fa4:	f000 fa0e 	bl	13c4 <Chip_SYSCTL_PowerUp>
     fa8:	2180      	movs	r1, #128	; 0x80
     faa:	4a10      	ldr	r2, [pc, #64]	; (fec <Chip_ADC_Init+0x50>)
     fac:	0189      	lsls	r1, r1, #6
     fae:	6fd3      	ldr	r3, [r2, #124]	; 0x7c
     fb0:	430b      	orrs	r3, r1
     fb2:	67d3      	str	r3, [r2, #124]	; 0x7c
     fb4:	2300      	movs	r3, #0
     fb6:	4a0e      	ldr	r2, [pc, #56]	; (ff0 <Chip_ADC_Init+0x54>)
     fb8:	60e3      	str	r3, [r4, #12]
     fba:	602a      	str	r2, [r5, #0]
     fbc:	712b      	strb	r3, [r5, #4]
     fbe:	716b      	strb	r3, [r5, #5]
     fc0:	f000 f8d6 	bl	1170 <Chip_Clock_GetSystemClockRate>
     fc4:	2307      	movs	r3, #7
     fc6:	792d      	ldrb	r5, [r5, #4]
     fc8:	0040      	lsls	r0, r0, #1
     fca:	401d      	ands	r5, r3
     fcc:	2380      	movs	r3, #128	; 0x80
     fce:	046d      	lsls	r5, r5, #17
     fd0:	039b      	lsls	r3, r3, #14
     fd2:	431d      	orrs	r5, r3
     fd4:	4b07      	ldr	r3, [pc, #28]	; (ff4 <Chip_ADC_Init+0x58>)
     fd6:	4908      	ldr	r1, [pc, #32]	; (ff8 <Chip_ADC_Init+0x5c>)
     fd8:	18c0      	adds	r0, r0, r3
     fda:	f000 fac4 	bl	1566 <__aeabi_uidiv>
     fde:	3801      	subs	r0, #1
     fe0:	b2c0      	uxtb	r0, r0
     fe2:	0200      	lsls	r0, r0, #8
     fe4:	4328      	orrs	r0, r5
     fe6:	6020      	str	r0, [r4, #0]
     fe8:	bd38      	pop	{r3, r4, r5, pc}
     fea:	46c0      	nop			; (mov r8, r8)
     fec:	40048004 	andmi	r8, r4, r4
     ff0:	00061a80 	andeq	r1, r6, r0, lsl #21
     ff4:	00432380 	subeq	r2, r3, r0, lsl #7
     ff8:	00864700 	addeq	r4, r6, r0, lsl #14

00000ffc <Chip_ADC_ReadValue>:
     ffc:	3104      	adds	r1, #4
     ffe:	0089      	lsls	r1, r1, #2
    1000:	580b      	ldr	r3, [r1, r0]
    1002:	2000      	movs	r0, #0
    1004:	4283      	cmp	r3, r0
    1006:	da03      	bge.n	1010 <Chip_ADC_ReadValue+0x14>
    1008:	041b      	lsls	r3, r3, #16
    100a:	0d9b      	lsrs	r3, r3, #22
    100c:	8013      	strh	r3, [r2, #0]
    100e:	3001      	adds	r0, #1
    1010:	4770      	bx	lr

00001012 <Chip_ADC_ReadStatus>:
    1012:	2a01      	cmp	r2, #1
    1014:	d00e      	beq.n	1034 <Chip_ADC_ReadStatus+0x22>
    1016:	2a00      	cmp	r2, #0
    1018:	d007      	beq.n	102a <Chip_ADC_ReadStatus+0x18>
    101a:	2a02      	cmp	r2, #2
    101c:	d111      	bne.n	1042 <Chip_ADC_ReadStatus+0x30>
    101e:	6b00      	ldr	r0, [r0, #48]	; 0x30
    1020:	0c00      	lsrs	r0, r0, #16
    1022:	1e41      	subs	r1, r0, #1
    1024:	4188      	sbcs	r0, r1
    1026:	b2c0      	uxtb	r0, r0
    1028:	e00c      	b.n	1044 <Chip_ADC_ReadStatus+0x32>
    102a:	6b00      	ldr	r0, [r0, #48]	; 0x30
    102c:	2301      	movs	r3, #1
    102e:	40c8      	lsrs	r0, r1
    1030:	4018      	ands	r0, r3
    1032:	e007      	b.n	1044 <Chip_ADC_ReadStatus+0x32>
    1034:	6b00      	ldr	r0, [r0, #48]	; 0x30
    1036:	3108      	adds	r1, #8
    1038:	b2c9      	uxtb	r1, r1
    103a:	40c8      	lsrs	r0, r1
    103c:	4002      	ands	r2, r0
    103e:	b2d0      	uxtb	r0, r2
    1040:	e000      	b.n	1044 <Chip_ADC_ReadStatus+0x32>
    1042:	2000      	movs	r0, #0
    1044:	4770      	bx	lr
	...

00001048 <Chip_ADC_SetStartMode>:
    1048:	b508      	push	{r3, lr}
    104a:	2901      	cmp	r1, #1
    104c:	d90a      	bls.n	1064 <Chip_ADC_SetStartMode+0x1c>
    104e:	2a00      	cmp	r2, #0
    1050:	d004      	beq.n	105c <Chip_ADC_SetStartMode+0x14>
    1052:	2280      	movs	r2, #128	; 0x80
    1054:	6803      	ldr	r3, [r0, #0]
    1056:	0512      	lsls	r2, r2, #20
    1058:	4313      	orrs	r3, r2
    105a:	e002      	b.n	1062 <Chip_ADC_SetStartMode+0x1a>
    105c:	6802      	ldr	r2, [r0, #0]
    105e:	4b03      	ldr	r3, [pc, #12]	; (106c <Chip_ADC_SetStartMode+0x24>)
    1060:	4013      	ands	r3, r2
    1062:	6003      	str	r3, [r0, #0]
    1064:	f7ff ff90 	bl	f88 <setStartMode>
    1068:	bd08      	pop	{r3, pc}
    106a:	46c0      	nop			; (mov r8, r8)
    106c:	f7ffffff 			; <UNDEFINED> instruction: 0xf7ffffff

00001070 <Chip_ADC_EnableChannel>:
    1070:	2a01      	cmp	r2, #1
    1072:	d104      	bne.n	107e <Chip_ADC_EnableChannel+0xe>
    1074:	408a      	lsls	r2, r1
    1076:	6803      	ldr	r3, [r0, #0]
    1078:	431a      	orrs	r2, r3
    107a:	6002      	str	r2, [r0, #0]
    107c:	e008      	b.n	1090 <Chip_ADC_EnableChannel+0x20>
    107e:	6802      	ldr	r2, [r0, #0]
    1080:	4b04      	ldr	r3, [pc, #16]	; (1094 <Chip_ADC_EnableChannel+0x24>)
    1082:	4013      	ands	r3, r2
    1084:	2201      	movs	r2, #1
    1086:	408a      	lsls	r2, r1
    1088:	6003      	str	r3, [r0, #0]
    108a:	6803      	ldr	r3, [r0, #0]
    108c:	4393      	bics	r3, r2
    108e:	6003      	str	r3, [r0, #0]
    1090:	4770      	bx	lr
    1092:	46c0      	nop			; (mov r8, r8)
    1094:	f8ffffff 			; <UNDEFINED> instruction: 0xf8ffffff

00001098 <Chip_Clock_SetSystemPLLSource>:
    1098:	2200      	movs	r2, #0
    109a:	4b03      	ldr	r3, [pc, #12]	; (10a8 <Chip_Clock_SetSystemPLLSource+0x10>)
    109c:	6418      	str	r0, [r3, #64]	; 0x40
    109e:	645a      	str	r2, [r3, #68]	; 0x44
    10a0:	3201      	adds	r2, #1
    10a2:	645a      	str	r2, [r3, #68]	; 0x44
    10a4:	4770      	bx	lr
    10a6:	46c0      	nop			; (mov r8, r8)
    10a8:	40048000 	andmi	r8, r4, r0

000010ac <Chip_Clock_SetUSBPLLSource>:
    10ac:	2200      	movs	r2, #0
    10ae:	4b03      	ldr	r3, [pc, #12]	; (10bc <Chip_Clock_SetUSBPLLSource+0x10>)
    10b0:	6498      	str	r0, [r3, #72]	; 0x48
    10b2:	64da      	str	r2, [r3, #76]	; 0x4c
    10b4:	3201      	adds	r2, #1
    10b6:	64da      	str	r2, [r3, #76]	; 0x4c
    10b8:	4770      	bx	lr
    10ba:	46c0      	nop			; (mov r8, r8)
    10bc:	40048000 	andmi	r8, r4, r0

000010c0 <Chip_Clock_SetMainClockSource>:
    10c0:	2200      	movs	r2, #0
    10c2:	4b03      	ldr	r3, [pc, #12]	; (10d0 <Chip_Clock_SetMainClockSource+0x10>)
    10c4:	6718      	str	r0, [r3, #112]	; 0x70
    10c6:	675a      	str	r2, [r3, #116]	; 0x74
    10c8:	3201      	adds	r2, #1
    10ca:	675a      	str	r2, [r3, #116]	; 0x74
    10cc:	4770      	bx	lr
    10ce:	46c0      	nop			; (mov r8, r8)
    10d0:	40048000 	andmi	r8, r4, r0

000010d4 <Chip_Clock_GetWDTOSCRate>:
    10d4:	b508      	push	{r3, lr}
    10d6:	4b07      	ldr	r3, [pc, #28]	; (10f4 <Chip_Clock_GetWDTOSCRate+0x20>)
    10d8:	6a59      	ldr	r1, [r3, #36]	; 0x24
    10da:	231f      	movs	r3, #31
    10dc:	05ca      	lsls	r2, r1, #23
    10de:	0f12      	lsrs	r2, r2, #28
    10e0:	4019      	ands	r1, r3
    10e2:	4b05      	ldr	r3, [pc, #20]	; (10f8 <Chip_Clock_GetWDTOSCRate+0x24>)
    10e4:	0092      	lsls	r2, r2, #2
    10e6:	3101      	adds	r1, #1
    10e8:	0049      	lsls	r1, r1, #1
    10ea:	58d0      	ldr	r0, [r2, r3]
    10ec:	f000 fa3b 	bl	1566 <__aeabi_uidiv>
    10f0:	bd08      	pop	{r3, pc}
    10f2:	46c0      	nop			; (mov r8, r8)
    10f4:	40048000 	andmi	r8, r4, r0
    10f8:	00001a38 	andeq	r1, r0, r8, lsr sl

000010fc <Chip_Clock_GetSystemPLLInClockRate>:
    10fc:	4b06      	ldr	r3, [pc, #24]	; (1118 <Chip_Clock_GetSystemPLLInClockRate+0x1c>)
    10fe:	6c1a      	ldr	r2, [r3, #64]	; 0x40
    1100:	2303      	movs	r3, #3
    1102:	4013      	ands	r3, r2
    1104:	d005      	beq.n	1112 <Chip_Clock_GetSystemPLLInClockRate+0x16>
    1106:	2000      	movs	r0, #0
    1108:	2b01      	cmp	r3, #1
    110a:	d103      	bne.n	1114 <Chip_Clock_GetSystemPLLInClockRate+0x18>
    110c:	4b03      	ldr	r3, [pc, #12]	; (111c <Chip_Clock_GetSystemPLLInClockRate+0x20>)
    110e:	6818      	ldr	r0, [r3, #0]
    1110:	e000      	b.n	1114 <Chip_Clock_GetSystemPLLInClockRate+0x18>
    1112:	4803      	ldr	r0, [pc, #12]	; (1120 <Chip_Clock_GetSystemPLLInClockRate+0x24>)
    1114:	4770      	bx	lr
    1116:	46c0      	nop			; (mov r8, r8)
    1118:	40048000 	andmi	r8, r4, r0
    111c:	00001a10 	andeq	r1, r0, r0, lsl sl
    1120:	00b71b00 	adcseq	r1, r7, r0, lsl #22

00001124 <Chip_Clock_GetSystemPLLOutClockRate>:
    1124:	4b04      	ldr	r3, [pc, #16]	; (1138 <Chip_Clock_GetSystemPLLOutClockRate+0x14>)
    1126:	b510      	push	{r4, lr}
    1128:	689c      	ldr	r4, [r3, #8]
    112a:	f7ff ffe7 	bl	10fc <Chip_Clock_GetSystemPLLInClockRate>
    112e:	231f      	movs	r3, #31
    1130:	4023      	ands	r3, r4
    1132:	3301      	adds	r3, #1
    1134:	4358      	muls	r0, r3
    1136:	bd10      	pop	{r4, pc}
    1138:	40048000 	andmi	r8, r4, r0

0000113c <Chip_Clock_GetMainClockRate>:
    113c:	b508      	push	{r3, lr}
    113e:	4b0a      	ldr	r3, [pc, #40]	; (1168 <Chip_Clock_GetMainClockRate+0x2c>)
    1140:	6f1a      	ldr	r2, [r3, #112]	; 0x70
    1142:	2303      	movs	r3, #3
    1144:	4013      	ands	r3, r2
    1146:	2b02      	cmp	r3, #2
    1148:	d006      	beq.n	1158 <Chip_Clock_GetMainClockRate+0x1c>
    114a:	2b03      	cmp	r3, #3
    114c:	d007      	beq.n	115e <Chip_Clock_GetMainClockRate+0x22>
    114e:	2b01      	cmp	r3, #1
    1150:	d108      	bne.n	1164 <Chip_Clock_GetMainClockRate+0x28>
    1152:	f7ff ffd3 	bl	10fc <Chip_Clock_GetSystemPLLInClockRate>
    1156:	e006      	b.n	1166 <Chip_Clock_GetMainClockRate+0x2a>
    1158:	f7ff ffbc 	bl	10d4 <Chip_Clock_GetWDTOSCRate>
    115c:	e003      	b.n	1166 <Chip_Clock_GetMainClockRate+0x2a>
    115e:	f7ff ffe1 	bl	1124 <Chip_Clock_GetSystemPLLOutClockRate>
    1162:	e000      	b.n	1166 <Chip_Clock_GetMainClockRate+0x2a>
    1164:	4801      	ldr	r0, [pc, #4]	; (116c <Chip_Clock_GetMainClockRate+0x30>)
    1166:	bd08      	pop	{r3, pc}
    1168:	40048000 	andmi	r8, r4, r0
    116c:	00b71b00 	adcseq	r1, r7, r0, lsl #22

00001170 <Chip_Clock_GetSystemClockRate>:
    1170:	b508      	push	{r3, lr}
    1172:	f7ff ffe3 	bl	113c <Chip_Clock_GetMainClockRate>
    1176:	4b02      	ldr	r3, [pc, #8]	; (1180 <Chip_Clock_GetSystemClockRate+0x10>)
    1178:	6f99      	ldr	r1, [r3, #120]	; 0x78
    117a:	f000 f9f4 	bl	1566 <__aeabi_uidiv>
    117e:	bd08      	pop	{r3, pc}
    1180:	40048000 	andmi	r8, r4, r0

00001184 <SystemCoreClockUpdate>:
    1184:	b508      	push	{r3, lr}
    1186:	f7ff fff3 	bl	1170 <Chip_Clock_GetSystemClockRate>
    118a:	4b01      	ldr	r3, [pc, #4]	; (1190 <SystemCoreClockUpdate+0xc>)
    118c:	6018      	str	r0, [r3, #0]
    118e:	bd08      	pop	{r3, pc}
    1190:	100002b8 			; <UNDEFINED> instruction: 0x100002b8

00001194 <Chip_IOCON_PinMuxSet>:
    1194:	2900      	cmp	r1, #0
    1196:	d000      	beq.n	119a <Chip_IOCON_PinMuxSet+0x6>
    1198:	3218      	adds	r2, #24
    119a:	0092      	lsls	r2, r2, #2
    119c:	5013      	str	r3, [r2, r0]
    119e:	4770      	bx	lr

000011a0 <Chip_WWDT_ClearStatusFlag>:
    11a0:	074b      	lsls	r3, r1, #29
    11a2:	d503      	bpl.n	11ac <Chip_WWDT_ClearStatusFlag+0xc>
    11a4:	231b      	movs	r3, #27
    11a6:	6802      	ldr	r2, [r0, #0]
    11a8:	4013      	ands	r3, r2
    11aa:	6003      	str	r3, [r0, #0]
    11ac:	2208      	movs	r2, #8
    11ae:	4211      	tst	r1, r2
    11b0:	d002      	beq.n	11b8 <Chip_WWDT_ClearStatusFlag+0x18>
    11b2:	6803      	ldr	r3, [r0, #0]
    11b4:	4313      	orrs	r3, r2
    11b6:	6003      	str	r3, [r0, #0]
    11b8:	4770      	bx	lr
	...

000011bc <Chip_TIMER_Init>:
    11bc:	4a0a      	ldr	r2, [pc, #40]	; (11e8 <Chip_TIMER_Init+0x2c>)
    11be:	230a      	movs	r3, #10
    11c0:	4290      	cmp	r0, r2
    11c2:	d009      	beq.n	11d8 <Chip_TIMER_Init+0x1c>
    11c4:	4a09      	ldr	r2, [pc, #36]	; (11ec <Chip_TIMER_Init+0x30>)
    11c6:	3b03      	subs	r3, #3
    11c8:	4290      	cmp	r0, r2
    11ca:	d005      	beq.n	11d8 <Chip_TIMER_Init+0x1c>
    11cc:	4b08      	ldr	r3, [pc, #32]	; (11f0 <Chip_TIMER_Init+0x34>)
    11ce:	18c0      	adds	r0, r0, r3
    11d0:	4243      	negs	r3, r0
    11d2:	4143      	adcs	r3, r0
    11d4:	2009      	movs	r0, #9
    11d6:	1ac3      	subs	r3, r0, r3
    11d8:	2001      	movs	r0, #1
    11da:	4098      	lsls	r0, r3
    11dc:	1c03      	adds	r3, r0, #0
    11de:	4905      	ldr	r1, [pc, #20]	; (11f4 <Chip_TIMER_Init+0x38>)
    11e0:	6fca      	ldr	r2, [r1, #124]	; 0x7c
    11e2:	4313      	orrs	r3, r2
    11e4:	67cb      	str	r3, [r1, #124]	; 0x7c
    11e6:	4770      	bx	lr
    11e8:	40018000 	andmi	r8, r1, r0
    11ec:	4000c000 	andmi	ip, r0, r0
    11f0:	bfff0000 	svclt	0x00ff0000
    11f4:	40048004 	andmi	r8, r4, r4

000011f8 <Chip_TIMER_Reset>:
    11f8:	2200      	movs	r2, #0
    11fa:	6843      	ldr	r3, [r0, #4]
    11fc:	6042      	str	r2, [r0, #4]
    11fe:	3201      	adds	r2, #1
    1200:	6082      	str	r2, [r0, #8]
    1202:	3201      	adds	r2, #1
    1204:	6042      	str	r2, [r0, #4]
    1206:	6882      	ldr	r2, [r0, #8]
    1208:	2a00      	cmp	r2, #0
    120a:	d1fc      	bne.n	1206 <Chip_TIMER_Reset+0xe>
    120c:	6043      	str	r3, [r0, #4]
    120e:	4770      	bx	lr

00001210 <RingBuffer_Init>:
    1210:	6043      	str	r3, [r0, #4]
    1212:	2300      	movs	r3, #0
    1214:	6001      	str	r1, [r0, #0]
    1216:	6082      	str	r2, [r0, #8]
    1218:	6103      	str	r3, [r0, #16]
    121a:	60c3      	str	r3, [r0, #12]
    121c:	2001      	movs	r0, #1
    121e:	4770      	bx	lr

00001220 <RingBuffer_Insert>:
    1220:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    1222:	1c04      	adds	r4, r0, #0
    1224:	68c3      	ldr	r3, [r0, #12]
    1226:	6807      	ldr	r7, [r0, #0]
    1228:	6862      	ldr	r2, [r4, #4]
    122a:	6900      	ldr	r0, [r0, #16]
    122c:	1a1b      	subs	r3, r3, r0
    122e:	2000      	movs	r0, #0
    1230:	4293      	cmp	r3, r2
    1232:	da0f      	bge.n	1254 <RingBuffer_Insert+0x34>
    1234:	1c0d      	adds	r5, r1, #0
    1236:	68e0      	ldr	r0, [r4, #12]
    1238:	1c11      	adds	r1, r2, #0
    123a:	f000 f994 	bl	1566 <__aeabi_uidiv>
    123e:	68a6      	ldr	r6, [r4, #8]
    1240:	4371      	muls	r1, r6
    1242:	1c32      	adds	r2, r6, #0
    1244:	1878      	adds	r0, r7, r1
    1246:	1c29      	adds	r1, r5, #0
    1248:	f000 f97e 	bl	1548 <memcpy>
    124c:	2001      	movs	r0, #1
    124e:	68e3      	ldr	r3, [r4, #12]
    1250:	3301      	adds	r3, #1
    1252:	60e3      	str	r3, [r4, #12]
    1254:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00001256 <RingBuffer_InsertMult>:
    1256:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    1258:	6803      	ldr	r3, [r0, #0]
    125a:	6846      	ldr	r6, [r0, #4]
    125c:	9301      	str	r3, [sp, #4]
    125e:	68c3      	ldr	r3, [r0, #12]
    1260:	6904      	ldr	r4, [r0, #16]
    1262:	1b1c      	subs	r4, r3, r4
    1264:	2300      	movs	r3, #0
    1266:	42b4      	cmp	r4, r6
    1268:	da36      	bge.n	12d8 <RingBuffer_InsertMult+0x82>
    126a:	68c3      	ldr	r3, [r0, #12]
    126c:	6907      	ldr	r7, [r0, #16]
    126e:	9100      	str	r1, [sp, #0]
    1270:	1c04      	adds	r4, r0, #0
    1272:	1c31      	adds	r1, r6, #0
    1274:	68c0      	ldr	r0, [r0, #12]
    1276:	1bdf      	subs	r7, r3, r7
    1278:	1c15      	adds	r5, r2, #0
    127a:	f000 f974 	bl	1566 <__aeabi_uidiv>
    127e:	1bf7      	subs	r7, r6, r7
    1280:	187b      	adds	r3, r7, r1
    1282:	1c38      	adds	r0, r7, #0
    1284:	42b3      	cmp	r3, r6
    1286:	d300      	bcc.n	128a <RingBuffer_InsertMult+0x34>
    1288:	1a70      	subs	r0, r6, r1
    128a:	1a3f      	subs	r7, r7, r0
    128c:	1e06      	subs	r6, r0, #0
    128e:	42ae      	cmp	r6, r5
    1290:	dd00      	ble.n	1294 <RingBuffer_InsertMult+0x3e>
    1292:	1c2e      	adds	r6, r5, #0
    1294:	1bad      	subs	r5, r5, r6
    1296:	42bd      	cmp	r5, r7
    1298:	dd00      	ble.n	129c <RingBuffer_InsertMult+0x46>
    129a:	1c3d      	adds	r5, r7, #0
    129c:	68a2      	ldr	r2, [r4, #8]
    129e:	9b01      	ldr	r3, [sp, #4]
    12a0:	4351      	muls	r1, r2
    12a2:	4372      	muls	r2, r6
    12a4:	1858      	adds	r0, r3, r1
    12a6:	9900      	ldr	r1, [sp, #0]
    12a8:	f000 f94e 	bl	1548 <memcpy>
    12ac:	68e3      	ldr	r3, [r4, #12]
    12ae:	6861      	ldr	r1, [r4, #4]
    12b0:	18f0      	adds	r0, r6, r3
    12b2:	60e0      	str	r0, [r4, #12]
    12b4:	f000 f957 	bl	1566 <__aeabi_uidiv>
    12b8:	68a7      	ldr	r7, [r4, #8]
    12ba:	6823      	ldr	r3, [r4, #0]
    12bc:	4379      	muls	r1, r7
    12be:	1858      	adds	r0, r3, r1
    12c0:	1c39      	adds	r1, r7, #0
    12c2:	1c3a      	adds	r2, r7, #0
    12c4:	4371      	muls	r1, r6
    12c6:	9b00      	ldr	r3, [sp, #0]
    12c8:	436a      	muls	r2, r5
    12ca:	1859      	adds	r1, r3, r1
    12cc:	f000 f93c 	bl	1548 <memcpy>
    12d0:	68e3      	ldr	r3, [r4, #12]
    12d2:	195b      	adds	r3, r3, r5
    12d4:	60e3      	str	r3, [r4, #12]
    12d6:	1973      	adds	r3, r6, r5
    12d8:	1c18      	adds	r0, r3, #0
    12da:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

000012dc <RingBuffer_Pop>:
    12dc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    12de:	68c2      	ldr	r2, [r0, #12]
    12e0:	6903      	ldr	r3, [r0, #16]
    12e2:	1c04      	adds	r4, r0, #0
    12e4:	6807      	ldr	r7, [r0, #0]
    12e6:	2000      	movs	r0, #0
    12e8:	429a      	cmp	r2, r3
    12ea:	d00f      	beq.n	130c <RingBuffer_Pop+0x30>
    12ec:	1c0d      	adds	r5, r1, #0
    12ee:	6920      	ldr	r0, [r4, #16]
    12f0:	6861      	ldr	r1, [r4, #4]
    12f2:	f000 f938 	bl	1566 <__aeabi_uidiv>
    12f6:	68a6      	ldr	r6, [r4, #8]
    12f8:	1c28      	adds	r0, r5, #0
    12fa:	4371      	muls	r1, r6
    12fc:	1c32      	adds	r2, r6, #0
    12fe:	1879      	adds	r1, r7, r1
    1300:	f000 f922 	bl	1548 <memcpy>
    1304:	2001      	movs	r0, #1
    1306:	6923      	ldr	r3, [r4, #16]
    1308:	3301      	adds	r3, #1
    130a:	6123      	str	r3, [r4, #16]
    130c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0000130e <RingBuffer_PopMult>:
    130e:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    1310:	6803      	ldr	r3, [r0, #0]
    1312:	68c4      	ldr	r4, [r0, #12]
    1314:	9301      	str	r3, [sp, #4]
    1316:	6903      	ldr	r3, [r0, #16]
    1318:	2600      	movs	r6, #0
    131a:	429c      	cmp	r4, r3
    131c:	d038      	beq.n	1390 <RingBuffer_PopMult+0x82>
    131e:	6846      	ldr	r6, [r0, #4]
    1320:	68c7      	ldr	r7, [r0, #12]
    1322:	6903      	ldr	r3, [r0, #16]
    1324:	9100      	str	r1, [sp, #0]
    1326:	1c04      	adds	r4, r0, #0
    1328:	1c31      	adds	r1, r6, #0
    132a:	6900      	ldr	r0, [r0, #16]
    132c:	1aff      	subs	r7, r7, r3
    132e:	1c15      	adds	r5, r2, #0
    1330:	f000 f919 	bl	1566 <__aeabi_uidiv>
    1334:	187b      	adds	r3, r7, r1
    1336:	1c38      	adds	r0, r7, #0
    1338:	42b3      	cmp	r3, r6
    133a:	d300      	bcc.n	133e <RingBuffer_PopMult+0x30>
    133c:	1a70      	subs	r0, r6, r1
    133e:	1a3f      	subs	r7, r7, r0
    1340:	1e06      	subs	r6, r0, #0
    1342:	42ae      	cmp	r6, r5
    1344:	dd00      	ble.n	1348 <RingBuffer_PopMult+0x3a>
    1346:	1c2e      	adds	r6, r5, #0
    1348:	1bad      	subs	r5, r5, r6
    134a:	42bd      	cmp	r5, r7
    134c:	dd00      	ble.n	1350 <RingBuffer_PopMult+0x42>
    134e:	1c3d      	adds	r5, r7, #0
    1350:	68a2      	ldr	r2, [r4, #8]
    1352:	9b01      	ldr	r3, [sp, #4]
    1354:	4351      	muls	r1, r2
    1356:	9800      	ldr	r0, [sp, #0]
    1358:	4372      	muls	r2, r6
    135a:	1859      	adds	r1, r3, r1
    135c:	f000 f8f4 	bl	1548 <memcpy>
    1360:	68a7      	ldr	r7, [r4, #8]
    1362:	6923      	ldr	r3, [r4, #16]
    1364:	1c39      	adds	r1, r7, #0
    1366:	4371      	muls	r1, r6
    1368:	18f0      	adds	r0, r6, r3
    136a:	9b00      	ldr	r3, [sp, #0]
    136c:	6120      	str	r0, [r4, #16]
    136e:	185b      	adds	r3, r3, r1
    1370:	6861      	ldr	r1, [r4, #4]
    1372:	9300      	str	r3, [sp, #0]
    1374:	f000 f8f7 	bl	1566 <__aeabi_uidiv>
    1378:	1c3a      	adds	r2, r7, #0
    137a:	4379      	muls	r1, r7
    137c:	6823      	ldr	r3, [r4, #0]
    137e:	436a      	muls	r2, r5
    1380:	1859      	adds	r1, r3, r1
    1382:	9800      	ldr	r0, [sp, #0]
    1384:	f000 f8e0 	bl	1548 <memcpy>
    1388:	6923      	ldr	r3, [r4, #16]
    138a:	1976      	adds	r6, r6, r5
    138c:	195b      	adds	r3, r3, r5
    138e:	6123      	str	r3, [r4, #16]
    1390:	1c30      	adds	r0, r6, #0
    1392:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001394 <Chip_GPIO_Init>:
    1394:	2140      	movs	r1, #64	; 0x40
    1396:	4a02      	ldr	r2, [pc, #8]	; (13a0 <Chip_GPIO_Init+0xc>)
    1398:	6fd3      	ldr	r3, [r2, #124]	; 0x7c
    139a:	430b      	orrs	r3, r1
    139c:	67d3      	str	r3, [r2, #124]	; 0x7c
    139e:	4770      	bx	lr
    13a0:	40048004 	andmi	r8, r4, r4

000013a4 <Chip_SYSCTL_PowerDown>:
    13a4:	228e      	movs	r2, #142	; 0x8e
    13a6:	4905      	ldr	r1, [pc, #20]	; (13bc <Chip_SYSCTL_PowerDown+0x18>)
    13a8:	0092      	lsls	r2, r2, #2
    13aa:	588b      	ldr	r3, [r1, r2]
    13ac:	4318      	orrs	r0, r3
    13ae:	4b04      	ldr	r3, [pc, #16]	; (13c0 <Chip_SYSCTL_PowerDown+0x1c>)
    13b0:	4018      	ands	r0, r3
    13b2:	23e8      	movs	r3, #232	; 0xe8
    13b4:	021b      	lsls	r3, r3, #8
    13b6:	4318      	orrs	r0, r3
    13b8:	5088      	str	r0, [r1, r2]
    13ba:	4770      	bx	lr
    13bc:	40048000 	andmi	r8, r4, r0
    13c0:	000005ff 	strdeq	r0, [r0], -pc	; <UNPREDICTABLE>

000013c4 <Chip_SYSCTL_PowerUp>:
    13c4:	218e      	movs	r1, #142	; 0x8e
    13c6:	b510      	push	{r4, lr}
    13c8:	4c05      	ldr	r4, [pc, #20]	; (13e0 <Chip_SYSCTL_PowerUp+0x1c>)
    13ca:	0089      	lsls	r1, r1, #2
    13cc:	5863      	ldr	r3, [r4, r1]
    13ce:	4a05      	ldr	r2, [pc, #20]	; (13e4 <Chip_SYSCTL_PowerUp+0x20>)
    13d0:	4013      	ands	r3, r2
    13d2:	4002      	ands	r2, r0
    13d4:	4393      	bics	r3, r2
    13d6:	22e8      	movs	r2, #232	; 0xe8
    13d8:	0212      	lsls	r2, r2, #8
    13da:	4313      	orrs	r3, r2
    13dc:	5063      	str	r3, [r4, r1]
    13de:	bd10      	pop	{r4, pc}
    13e0:	40048000 	andmi	r8, r4, r0
    13e4:	000005ff 	strdeq	r0, [r0], -pc	; <UNPREDICTABLE>

000013e8 <Chip_UART_Init>:
    13e8:	b510      	push	{r4, lr}
    13ea:	2480      	movs	r4, #128	; 0x80
    13ec:	4b07      	ldr	r3, [pc, #28]	; (140c <Chip_UART_Init+0x24>)
    13ee:	0164      	lsls	r4, r4, #5
    13f0:	1d19      	adds	r1, r3, #4
    13f2:	6fca      	ldr	r2, [r1, #124]	; 0x7c
    13f4:	3398      	adds	r3, #152	; 0x98
    13f6:	4322      	orrs	r2, r4
    13f8:	67ca      	str	r2, [r1, #124]	; 0x7c
    13fa:	2201      	movs	r2, #1
    13fc:	601a      	str	r2, [r3, #0]
    13fe:	2307      	movs	r3, #7
    1400:	6083      	str	r3, [r0, #8]
    1402:	3b04      	subs	r3, #4
    1404:	60c3      	str	r3, [r0, #12]
    1406:	330d      	adds	r3, #13
    1408:	6283      	str	r3, [r0, #40]	; 0x28
    140a:	bd10      	pop	{r4, pc}
    140c:	40048000 	andmi	r8, r4, r0

00001410 <Chip_UART_RXIntHandlerRB>:
    1410:	b537      	push	{r0, r1, r2, r4, r5, lr}
    1412:	1c04      	adds	r4, r0, #0
    1414:	1c0d      	adds	r5, r1, #0
    1416:	6963      	ldr	r3, [r4, #20]
    1418:	07db      	lsls	r3, r3, #31
    141a:	d507      	bpl.n	142c <Chip_UART_RXIntHandlerRB+0x1c>
    141c:	466a      	mov	r2, sp
    141e:	6823      	ldr	r3, [r4, #0]
    1420:	1dd1      	adds	r1, r2, #7
    1422:	1c28      	adds	r0, r5, #0
    1424:	700b      	strb	r3, [r1, #0]
    1426:	f7ff fefb 	bl	1220 <RingBuffer_Insert>
    142a:	e7f4      	b.n	1416 <Chip_UART_RXIntHandlerRB+0x6>
    142c:	bd37      	pop	{r0, r1, r2, r4, r5, pc}

0000142e <Chip_UART_TXIntHandlerRB>:
    142e:	b573      	push	{r0, r1, r4, r5, r6, lr}
    1430:	1c05      	adds	r5, r0, #0
    1432:	1c0e      	adds	r6, r1, #0
    1434:	696b      	ldr	r3, [r5, #20]
    1436:	069b      	lsls	r3, r3, #26
    1438:	d50a      	bpl.n	1450 <Chip_UART_TXIntHandlerRB+0x22>
    143a:	466b      	mov	r3, sp
    143c:	1ddc      	adds	r4, r3, #7
    143e:	1c30      	adds	r0, r6, #0
    1440:	1c21      	adds	r1, r4, #0
    1442:	f7ff ff4b 	bl	12dc <RingBuffer_Pop>
    1446:	2800      	cmp	r0, #0
    1448:	d002      	beq.n	1450 <Chip_UART_TXIntHandlerRB+0x22>
    144a:	7823      	ldrb	r3, [r4, #0]
    144c:	602b      	str	r3, [r5, #0]
    144e:	e7f1      	b.n	1434 <Chip_UART_TXIntHandlerRB+0x6>
    1450:	bd73      	pop	{r0, r1, r4, r5, r6, pc}

00001452 <Chip_UART_SendRB>:
    1452:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    1454:	1c16      	adds	r6, r2, #0
    1456:	2202      	movs	r2, #2
    1458:	9301      	str	r3, [sp, #4]
    145a:	6843      	ldr	r3, [r0, #4]
    145c:	1c05      	adds	r5, r0, #0
    145e:	4393      	bics	r3, r2
    1460:	1c0f      	adds	r7, r1, #0
    1462:	6043      	str	r3, [r0, #4]
    1464:	9a01      	ldr	r2, [sp, #4]
    1466:	1c08      	adds	r0, r1, #0
    1468:	1c31      	adds	r1, r6, #0
    146a:	f7ff fef4 	bl	1256 <RingBuffer_InsertMult>
    146e:	1c04      	adds	r4, r0, #0
    1470:	1c39      	adds	r1, r7, #0
    1472:	1c28      	adds	r0, r5, #0
    1474:	f7ff ffdb 	bl	142e <Chip_UART_TXIntHandlerRB>
    1478:	9b01      	ldr	r3, [sp, #4]
    147a:	1931      	adds	r1, r6, r4
    147c:	1b1a      	subs	r2, r3, r4
    147e:	1c38      	adds	r0, r7, #0
    1480:	f7ff fee9 	bl	1256 <RingBuffer_InsertMult>
    1484:	2202      	movs	r2, #2
    1486:	686b      	ldr	r3, [r5, #4]
    1488:	1900      	adds	r0, r0, r4
    148a:	4313      	orrs	r3, r2
    148c:	606b      	str	r3, [r5, #4]
    148e:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001490 <Chip_UART_ReadRB>:
    1490:	b508      	push	{r3, lr}
    1492:	1c08      	adds	r0, r1, #0
    1494:	1c11      	adds	r1, r2, #0
    1496:	1c1a      	adds	r2, r3, #0
    1498:	f7ff ff39 	bl	130e <RingBuffer_PopMult>
    149c:	bd08      	pop	{r3, pc}

0000149e <Chip_UART_IRQRBHandler>:
    149e:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    14a0:	2602      	movs	r6, #2
    14a2:	6843      	ldr	r3, [r0, #4]
    14a4:	1c04      	adds	r4, r0, #0
    14a6:	1c0d      	adds	r5, r1, #0
    14a8:	1c17      	adds	r7, r2, #0
    14aa:	4233      	tst	r3, r6
    14ac:	d009      	beq.n	14c2 <Chip_UART_IRQRBHandler+0x24>
    14ae:	1c11      	adds	r1, r2, #0
    14b0:	f7ff ffbd 	bl	142e <Chip_UART_TXIntHandlerRB>
    14b4:	68fa      	ldr	r2, [r7, #12]
    14b6:	693b      	ldr	r3, [r7, #16]
    14b8:	429a      	cmp	r2, r3
    14ba:	d102      	bne.n	14c2 <Chip_UART_IRQRBHandler+0x24>
    14bc:	6863      	ldr	r3, [r4, #4]
    14be:	43b3      	bics	r3, r6
    14c0:	6063      	str	r3, [r4, #4]
    14c2:	1c29      	adds	r1, r5, #0
    14c4:	1c20      	adds	r0, r4, #0
    14c6:	f7ff ffa3 	bl	1410 <Chip_UART_RXIntHandlerRB>
    14ca:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

000014cc <Chip_UART_SetBaudFDR>:
    14cc:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    14ce:	010d      	lsls	r5, r1, #4
    14d0:	1c06      	adds	r6, r0, #0
    14d2:	f7ff fe33 	bl	113c <Chip_Clock_GetMainClockRate>
    14d6:	1c29      	adds	r1, r5, #0
    14d8:	1c07      	adds	r7, r0, #0
    14da:	f000 f844 	bl	1566 <__aeabi_uidiv>
    14de:	2000      	movs	r0, #0
    14e0:	1e0c      	subs	r4, r1, #0
    14e2:	4284      	cmp	r4, r0
    14e4:	d006      	beq.n	14f4 <Chip_UART_SetBaudFDR+0x28>
    14e6:	1c28      	adds	r0, r5, #0
    14e8:	f000 f83d 	bl	1566 <__aeabi_uidiv>
    14ec:	2400      	movs	r4, #0
    14ee:	230c      	movs	r3, #12
    14f0:	4283      	cmp	r3, r0
    14f2:	4164      	adcs	r4, r4
    14f4:	230f      	movs	r3, #15
    14f6:	4018      	ands	r0, r3
    14f8:	9001      	str	r0, [sp, #4]
    14fa:	1c28      	adds	r0, r5, #0
    14fc:	9901      	ldr	r1, [sp, #4]
    14fe:	4360      	muls	r0, r4
    1500:	f000 f831 	bl	1566 <__aeabi_uidiv>
    1504:	1941      	adds	r1, r0, r5
    1506:	1c38      	adds	r0, r7, #0
    1508:	f000 f82d 	bl	1566 <__aeabi_uidiv>
    150c:	2280      	movs	r2, #128	; 0x80
    150e:	68f3      	ldr	r3, [r6, #12]
    1510:	1c01      	adds	r1, r0, #0
    1512:	4313      	orrs	r3, r2
    1514:	60f3      	str	r3, [r6, #12]
    1516:	23ff      	movs	r3, #255	; 0xff
    1518:	1c05      	adds	r5, r0, #0
    151a:	4019      	ands	r1, r3
    151c:	6031      	str	r1, [r6, #0]
    151e:	0a01      	lsrs	r1, r0, #8
    1520:	400b      	ands	r3, r1
    1522:	6073      	str	r3, [r6, #4]
    1524:	68f3      	ldr	r3, [r6, #12]
    1526:	0120      	lsls	r0, r4, #4
    1528:	4393      	bics	r3, r2
    152a:	60f3      	str	r3, [r6, #12]
    152c:	9b01      	ldr	r3, [sp, #4]
    152e:	9901      	ldr	r1, [sp, #4]
    1530:	011b      	lsls	r3, r3, #4
    1532:	4323      	orrs	r3, r4
    1534:	62b3      	str	r3, [r6, #40]	; 0x28
    1536:	4368      	muls	r0, r5
    1538:	f000 f815 	bl	1566 <__aeabi_uidiv>
    153c:	012d      	lsls	r5, r5, #4
    153e:	1941      	adds	r1, r0, r5
    1540:	1c38      	adds	r0, r7, #0
    1542:	f000 f810 	bl	1566 <__aeabi_uidiv>
    1546:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001548 <memcpy>:
    1548:	b508      	push	{r3, lr}
    154a:	f000 fa2e 	bl	19aa <__aeabi_memcpy>
    154e:	bd08      	pop	{r3, pc}

00001550 <memset>:
    1550:	b508      	push	{r3, lr}
    1552:	f000 fa40 	bl	19d6 <__aeabi_lowlevel_memset>
    1556:	bd08      	pop	{r3, pc}

00001558 <__weak_main>:
    1558:	b508      	push	{r3, lr}
    155a:	f7ff f9ed 	bl	938 <main>
    155e:	bd08      	pop	{r3, pc}

00001560 <__aeabi_idiv>:
    1560:	0003      	movs	r3, r0
    1562:	430b      	orrs	r3, r1
    1564:	d421      	bmi.n	15aa <idiv_negative>

00001566 <__aeabi_uidiv>:
    1566:	2900      	cmp	r1, #0
    1568:	d031      	beq.n	15ce <idiv_divzero>
    156a:	2201      	movs	r2, #1
    156c:	07d2      	lsls	r2, r2, #31
    156e:	0903      	lsrs	r3, r0, #4
    1570:	e001      	b.n	1576 <div_search4a>

00001572 <div_search4>:
    1572:	0109      	lsls	r1, r1, #4
    1574:	0912      	lsrs	r2, r2, #4

00001576 <div_search4a>:
    1576:	4299      	cmp	r1, r3
    1578:	d9fb      	bls.n	1572 <div_search4>
    157a:	0843      	lsrs	r3, r0, #1
    157c:	e001      	b.n	1582 <div_search1a>

0000157e <div_search1>:
    157e:	0049      	lsls	r1, r1, #1
    1580:	0852      	lsrs	r2, r2, #1

00001582 <div_search1a>:
    1582:	4299      	cmp	r1, r3
    1584:	d9fb      	bls.n	157e <div_search1>
    1586:	e000      	b.n	158a <div_loop1a>

00001588 <div_loop1>:
    1588:	0849      	lsrs	r1, r1, #1

0000158a <div_loop1a>:
    158a:	1a40      	subs	r0, r0, r1
    158c:	d307      	bcc.n	159e <div1>

0000158e <div2>:
    158e:	4152      	adcs	r2, r2
    1590:	d3fa      	bcc.n	1588 <div_loop1>
    1592:	4601      	mov	r1, r0
    1594:	4610      	mov	r0, r2
    1596:	4770      	bx	lr

00001598 <div_loop2>:
    1598:	0849      	lsrs	r1, r1, #1
    159a:	1840      	adds	r0, r0, r1
    159c:	d2f7      	bcs.n	158e <div2>

0000159e <div1>:
    159e:	1892      	adds	r2, r2, r2
    15a0:	d3fa      	bcc.n	1598 <div_loop2>
    15a2:	1840      	adds	r0, r0, r1
    15a4:	4601      	mov	r1, r0
    15a6:	4610      	mov	r0, r2
    15a8:	4770      	bx	lr

000015aa <idiv_negative>:
    15aa:	0fcb      	lsrs	r3, r1, #31
    15ac:	d000      	beq.n	15b0 <idiv_neg1>
    15ae:	4249      	negs	r1, r1

000015b0 <idiv_neg1>:
    15b0:	1002      	asrs	r2, r0, #32
    15b2:	d500      	bpl.n	15b6 <idiv_neg2>
    15b4:	4240      	negs	r0, r0

000015b6 <idiv_neg2>:
    15b6:	4053      	eors	r3, r2
    15b8:	b508      	push	{r3, lr}
    15ba:	f7ff ffd4 	bl	1566 <__aeabi_uidiv>
    15be:	bc0c      	pop	{r2, r3}

000015c0 <idiv_sign>:
    15c0:	1052      	asrs	r2, r2, #1
    15c2:	d300      	bcc.n	15c6 <idiv_sign1>
    15c4:	4240      	negs	r0, r0

000015c6 <idiv_sign1>:
    15c6:	2a00      	cmp	r2, #0
    15c8:	d500      	bpl.n	15cc <idiv_ret>
    15ca:	4249      	negs	r1, r1

000015cc <idiv_ret>:
    15cc:	4718      	bx	r3

000015ce <idiv_divzero>:
    15ce:	46f4      	mov	ip, lr
    15d0:	2000      	movs	r0, #0
    15d2:	f000 f801 	bl	15d8 <__aeabi_idiv0>
    15d6:	4760      	bx	ip

000015d8 <__aeabi_idiv0>:
    15d8:	4770      	bx	lr
	...

000015dc <__aeabi_dmul>:
    15dc:	b5f0      	push	{r4, r5, r6, r7, lr}
    15de:	1c07      	adds	r7, r0, #0
    15e0:	1c08      	adds	r0, r1, #0
    15e2:	004d      	lsls	r5, r1, #1
    15e4:	b087      	sub	sp, #28
    15e6:	0d6d      	lsrs	r5, r5, #21
    15e8:	4058      	eors	r0, r3
    15ea:	2d00      	cmp	r5, #0
    15ec:	d07d      	beq.n	16ea <__aeabi_dmul+0x10e>
    15ee:	4c50      	ldr	r4, [pc, #320]	; (1730 <__aeabi_dmul+0x154>)
    15f0:	42a5      	cmp	r5, r4
    15f2:	d07a      	beq.n	16ea <__aeabi_dmul+0x10e>
    15f4:	005e      	lsls	r6, r3, #1
    15f6:	0d76      	lsrs	r6, r6, #21
    15f8:	d077      	beq.n	16ea <__aeabi_dmul+0x10e>
    15fa:	42a6      	cmp	r6, r4
    15fc:	d075      	beq.n	16ea <__aeabi_dmul+0x10e>
    15fe:	1c14      	adds	r4, r2, #0
    1600:	1972      	adds	r2, r6, r5
    1602:	2580      	movs	r5, #128	; 0x80
    1604:	0309      	lsls	r1, r1, #12
    1606:	2680      	movs	r6, #128	; 0x80
    1608:	0b09      	lsrs	r1, r1, #12
    160a:	036d      	lsls	r5, r5, #13
    160c:	430d      	orrs	r5, r1
    160e:	2100      	movs	r1, #0
    1610:	0fc0      	lsrs	r0, r0, #31
    1612:	9201      	str	r2, [sp, #4]
    1614:	07c2      	lsls	r2, r0, #31
    1616:	9200      	str	r2, [sp, #0]
    1618:	02db      	lsls	r3, r3, #11
    161a:	0d62      	lsrs	r2, r4, #21
    161c:	4313      	orrs	r3, r2
    161e:	0636      	lsls	r6, r6, #24
    1620:	431e      	orrs	r6, r3
    1622:	1c2a      	adds	r2, r5, #0
    1624:	1c30      	adds	r0, r6, #0
    1626:	1c0b      	adds	r3, r1, #0
    1628:	f000 f9a8 	bl	197c <__aeabi_lmul>
    162c:	9002      	str	r0, [sp, #8]
    162e:	9103      	str	r1, [sp, #12]
    1630:	2100      	movs	r1, #0
    1632:	02e4      	lsls	r4, r4, #11
    1634:	1c22      	adds	r2, r4, #0
    1636:	1c28      	adds	r0, r5, #0
    1638:	1c0b      	adds	r3, r1, #0
    163a:	f000 f99f 	bl	197c <__aeabi_lmul>
    163e:	9105      	str	r1, [sp, #20]
    1640:	2100      	movs	r1, #0
    1642:	1c3a      	adds	r2, r7, #0
    1644:	9004      	str	r0, [sp, #16]
    1646:	1c0b      	adds	r3, r1, #0
    1648:	1c30      	adds	r0, r6, #0
    164a:	f000 f997 	bl	197c <__aeabi_lmul>
    164e:	1c0e      	adds	r6, r1, #0
    1650:	2100      	movs	r1, #0
    1652:	1c3a      	adds	r2, r7, #0
    1654:	1c05      	adds	r5, r0, #0
    1656:	1c0b      	adds	r3, r1, #0
    1658:	1c20      	adds	r0, r4, #0
    165a:	f000 f98f 	bl	197c <__aeabi_lmul>
    165e:	4684      	mov	ip, r0
    1660:	1c08      	adds	r0, r1, #0
    1662:	2100      	movs	r1, #0
    1664:	1c0b      	adds	r3, r1, #0
    1666:	9a04      	ldr	r2, [sp, #16]
    1668:	1c0f      	adds	r7, r1, #0
    166a:	1812      	adds	r2, r2, r0
    166c:	414b      	adcs	r3, r1
    166e:	1952      	adds	r2, r2, r5
    1670:	4173      	adcs	r3, r6
    1672:	1c1e      	adds	r6, r3, #0
    1674:	1c0b      	adds	r3, r1, #0
    1676:	9802      	ldr	r0, [sp, #8]
    1678:	9903      	ldr	r1, [sp, #12]
    167a:	1c14      	adds	r4, r2, #0
    167c:	9a05      	ldr	r2, [sp, #20]
    167e:	1992      	adds	r2, r2, r6
    1680:	417b      	adcs	r3, r7
    1682:	1812      	adds	r2, r2, r0
    1684:	414b      	adcs	r3, r1
    1686:	4661      	mov	r1, ip
    1688:	0888      	lsrs	r0, r1, #2
    168a:	4304      	orrs	r4, r0
    168c:	9901      	ldr	r1, [sp, #4]
    168e:	4829      	ldr	r0, [pc, #164]	; (1734 <__aeabi_dmul+0x158>)
    1690:	1809      	adds	r1, r1, r0
    1692:	4829      	ldr	r0, [pc, #164]	; (1738 <__aeabi_dmul+0x15c>)
    1694:	4298      	cmp	r0, r3
    1696:	d30c      	bcc.n	16b2 <__aeabi_dmul+0xd6>
    1698:	1c16      	adds	r6, r2, #0
    169a:	1c1f      	adds	r7, r3, #0
    169c:	18b6      	adds	r6, r6, r2
    169e:	415f      	adcs	r7, r3
    16a0:	4826      	ldr	r0, [pc, #152]	; (173c <__aeabi_dmul+0x160>)
    16a2:	1c3b      	adds	r3, r7, #0
    16a4:	4684      	mov	ip, r0
    16a6:	0fe0      	lsrs	r0, r4, #31
    16a8:	4330      	orrs	r0, r6
    16aa:	1c02      	adds	r2, r0, #0
    16ac:	9901      	ldr	r1, [sp, #4]
    16ae:	0064      	lsls	r4, r4, #1
    16b0:	4461      	add	r1, ip
    16b2:	2700      	movs	r7, #0
    16b4:	0fe6      	lsrs	r6, r4, #31
    16b6:	1992      	adds	r2, r2, r6
    16b8:	417b      	adcs	r3, r7
    16ba:	2080      	movs	r0, #128	; 0x80
    16bc:	1c15      	adds	r5, r2, #0
    16be:	0600      	lsls	r0, r0, #24
    16c0:	4284      	cmp	r4, r0
    16c2:	d101      	bne.n	16c8 <__aeabi_dmul+0xec>
    16c4:	2001      	movs	r0, #1
    16c6:	4385      	bics	r5, r0
    16c8:	481d      	ldr	r0, [pc, #116]	; (1740 <__aeabi_dmul+0x164>)
    16ca:	4281      	cmp	r1, r0
    16cc:	d805      	bhi.n	16da <__aeabi_dmul+0xfe>
    16ce:	050a      	lsls	r2, r1, #20
    16d0:	9900      	ldr	r1, [sp, #0]
    16d2:	1c28      	adds	r0, r5, #0
    16d4:	4319      	orrs	r1, r3
    16d6:	1851      	adds	r1, r2, r1
    16d8:	e027      	b.n	172a <__aeabi_dmul+0x14e>
    16da:	9b00      	ldr	r3, [sp, #0]
    16dc:	2900      	cmp	r1, #0
    16de:	db02      	blt.n	16e6 <__aeabi_dmul+0x10a>
    16e0:	4b18      	ldr	r3, [pc, #96]	; (1744 <__aeabi_dmul+0x168>)
    16e2:	9a00      	ldr	r2, [sp, #0]
    16e4:	4313      	orrs	r3, r2
    16e6:	2000      	movs	r0, #0
    16e8:	e01e      	b.n	1728 <__aeabi_dmul+0x14c>
    16ea:	0fc2      	lsrs	r2, r0, #31
    16ec:	4816      	ldr	r0, [pc, #88]	; (1748 <__aeabi_dmul+0x16c>)
    16ee:	07d2      	lsls	r2, r2, #31
    16f0:	0049      	lsls	r1, r1, #1
    16f2:	4281      	cmp	r1, r0
    16f4:	d805      	bhi.n	1702 <__aeabi_dmul+0x126>
    16f6:	005c      	lsls	r4, r3, #1
    16f8:	4284      	cmp	r4, r0
    16fa:	d805      	bhi.n	1708 <__aeabi_dmul+0x12c>
    16fc:	2000      	movs	r0, #0
    16fe:	1c11      	adds	r1, r2, #0
    1700:	e013      	b.n	172a <__aeabi_dmul+0x14e>
    1702:	4812      	ldr	r0, [pc, #72]	; (174c <__aeabi_dmul+0x170>)
    1704:	4281      	cmp	r1, r0
    1706:	d103      	bne.n	1710 <__aeabi_dmul+0x134>
    1708:	4810      	ldr	r0, [pc, #64]	; (174c <__aeabi_dmul+0x170>)
    170a:	005b      	lsls	r3, r3, #1
    170c:	4283      	cmp	r3, r0
    170e:	d901      	bls.n	1714 <__aeabi_dmul+0x138>
    1710:	2000      	movs	r0, #0
    1712:	e005      	b.n	1720 <__aeabi_dmul+0x144>
    1714:	0d49      	lsrs	r1, r1, #21
    1716:	2000      	movs	r0, #0
    1718:	2900      	cmp	r1, #0
    171a:	d001      	beq.n	1720 <__aeabi_dmul+0x144>
    171c:	0d5b      	lsrs	r3, r3, #21
    171e:	d101      	bne.n	1724 <__aeabi_dmul+0x148>
    1720:	490b      	ldr	r1, [pc, #44]	; (1750 <__aeabi_dmul+0x174>)
    1722:	e002      	b.n	172a <__aeabi_dmul+0x14e>
    1724:	4b07      	ldr	r3, [pc, #28]	; (1744 <__aeabi_dmul+0x168>)
    1726:	4313      	orrs	r3, r2
    1728:	1c19      	adds	r1, r3, #0
    172a:	b007      	add	sp, #28
    172c:	bdf0      	pop	{r4, r5, r6, r7, pc}
    172e:	46c0      	nop			; (mov r8, r8)
    1730:	000007ff 	strdeq	r0, [r0], -pc	; <UNPREDICTABLE>
    1734:	fffffc01 			; <UNDEFINED> instruction: 0xfffffc01
    1738:	000fffff 	strdeq	pc, [pc], -pc	; <UNPREDICTABLE>
    173c:	fffffc00 			; <UNDEFINED> instruction: 0xfffffc00
    1740:	000007fd 	strdeq	r0, [r0], -sp
    1744:	7ff00000 	svcvc	0x00f00000	; IMB
    1748:	ffdfffff 			; <UNDEFINED> instruction: 0xffdfffff
    174c:	ffe00000 			; <UNDEFINED> instruction: 0xffe00000
    1750:	7ff80000 	svcvc	0x00f80000

00001754 <__aeabi_d2f>:
    1754:	b530      	push	{r4, r5, lr}
    1756:	1c02      	adds	r2, r0, #0
    1758:	4c12      	ldr	r4, [pc, #72]	; (17a4 <__aeabi_d2f+0x50>)
    175a:	0fc8      	lsrs	r0, r1, #31
    175c:	0049      	lsls	r1, r1, #1
    175e:	07c3      	lsls	r3, r0, #31
    1760:	4d11      	ldr	r5, [pc, #68]	; (17a8 <__aeabi_d2f+0x54>)
    1762:	0848      	lsrs	r0, r1, #1
    1764:	1904      	adds	r4, r0, r4
    1766:	42ac      	cmp	r4, r5
    1768:	d80f      	bhi.n	178a <__aeabi_d2f+0x36>
    176a:	24c8      	movs	r4, #200	; 0xc8
    176c:	0624      	lsls	r4, r4, #24
    176e:	1900      	adds	r0, r0, r4
    1770:	00d1      	lsls	r1, r2, #3
    1772:	00c0      	lsls	r0, r0, #3
    1774:	0f52      	lsrs	r2, r2, #29
    1776:	4302      	orrs	r2, r0
    1778:	0fc8      	lsrs	r0, r1, #31
    177a:	1810      	adds	r0, r2, r0
    177c:	2280      	movs	r2, #128	; 0x80
    177e:	0612      	lsls	r2, r2, #24
    1780:	4291      	cmp	r1, r2
    1782:	d10a      	bne.n	179a <__aeabi_d2f+0x46>
    1784:	2201      	movs	r2, #1
    1786:	4390      	bics	r0, r2
    1788:	e007      	b.n	179a <__aeabi_d2f+0x46>
    178a:	1c18      	adds	r0, r3, #0
    178c:	2c00      	cmp	r4, #0
    178e:	db07      	blt.n	17a0 <__aeabi_d2f+0x4c>
    1790:	4a06      	ldr	r2, [pc, #24]	; (17ac <__aeabi_d2f+0x58>)
    1792:	4291      	cmp	r1, r2
    1794:	d803      	bhi.n	179e <__aeabi_d2f+0x4a>
    1796:	20ff      	movs	r0, #255	; 0xff
    1798:	05c0      	lsls	r0, r0, #23
    179a:	4318      	orrs	r0, r3
    179c:	e000      	b.n	17a0 <__aeabi_d2f+0x4c>
    179e:	4804      	ldr	r0, [pc, #16]	; (17b0 <__aeabi_d2f+0x5c>)
    17a0:	bd30      	pop	{r4, r5, pc}
    17a2:	46c0      	nop			; (mov r8, r8)
    17a4:	c7f00000 	ldrbgt	r0, [r0, r0]!
    17a8:	0fdfffff 	svceq	0x00dfffff
    17ac:	ffe00000 			; <UNDEFINED> instruction: 0xffe00000
    17b0:	7fc00000 	svcvc	0x00c00000

000017b4 <__bhs_ui2d>:
    17b4:	b510      	push	{r4, lr}
    17b6:	2800      	cmp	r0, #0
    17b8:	d102      	bne.n	17c0 <__bhs_ui2d+0xc>
    17ba:	1c03      	adds	r3, r0, #0
    17bc:	1c02      	adds	r2, r0, #0
    17be:	e025      	b.n	180c <__bhs_ui2d+0x58>
    17c0:	0c03      	lsrs	r3, r0, #16
    17c2:	d101      	bne.n	17c8 <__bhs_ui2d+0x14>
    17c4:	0400      	lsls	r0, r0, #16
    17c6:	e002      	b.n	17ce <__bhs_ui2d+0x1a>
    17c8:	2380      	movs	r3, #128	; 0x80
    17ca:	045b      	lsls	r3, r3, #17
    17cc:	18c9      	adds	r1, r1, r3
    17ce:	0e03      	lsrs	r3, r0, #24
    17d0:	d101      	bne.n	17d6 <__bhs_ui2d+0x22>
    17d2:	0200      	lsls	r0, r0, #8
    17d4:	e002      	b.n	17dc <__bhs_ui2d+0x28>
    17d6:	2380      	movs	r3, #128	; 0x80
    17d8:	041b      	lsls	r3, r3, #16
    17da:	18c9      	adds	r1, r1, r3
    17dc:	0f03      	lsrs	r3, r0, #28
    17de:	d101      	bne.n	17e4 <__bhs_ui2d+0x30>
    17e0:	0100      	lsls	r0, r0, #4
    17e2:	e002      	b.n	17ea <__bhs_ui2d+0x36>
    17e4:	2380      	movs	r3, #128	; 0x80
    17e6:	03db      	lsls	r3, r3, #15
    17e8:	18c9      	adds	r1, r1, r3
    17ea:	0f83      	lsrs	r3, r0, #30
    17ec:	d101      	bne.n	17f2 <__bhs_ui2d+0x3e>
    17ee:	0080      	lsls	r0, r0, #2
    17f0:	e002      	b.n	17f8 <__bhs_ui2d+0x44>
    17f2:	2380      	movs	r3, #128	; 0x80
    17f4:	039b      	lsls	r3, r3, #14
    17f6:	18c9      	adds	r1, r1, r3
    17f8:	2800      	cmp	r0, #0
    17fa:	db01      	blt.n	1800 <__bhs_ui2d+0x4c>
    17fc:	0040      	lsls	r0, r0, #1
    17fe:	e002      	b.n	1806 <__bhs_ui2d+0x52>
    1800:	2380      	movs	r3, #128	; 0x80
    1802:	035b      	lsls	r3, r3, #13
    1804:	18c9      	adds	r1, r1, r3
    1806:	12c4      	asrs	r4, r0, #11
    1808:	1863      	adds	r3, r4, r1
    180a:	0542      	lsls	r2, r0, #21
    180c:	1c10      	adds	r0, r2, #0
    180e:	1c19      	adds	r1, r3, #0
    1810:	bd10      	pop	{r4, pc}

00001812 <__aeabi_i2d>:
    1812:	0fc1      	lsrs	r1, r0, #31
    1814:	b508      	push	{r3, lr}
    1816:	07c9      	lsls	r1, r1, #31
    1818:	d000      	beq.n	181c <__aeabi_i2d+0xa>
    181a:	4240      	negs	r0, r0
    181c:	2380      	movs	r3, #128	; 0x80
    181e:	05db      	lsls	r3, r3, #23
    1820:	18c9      	adds	r1, r1, r3
    1822:	f7ff ffc7 	bl	17b4 <__bhs_ui2d>
    1826:	bd08      	pop	{r3, pc}

00001828 <__aeabi_fmul>:
    1828:	b570      	push	{r4, r5, r6, lr}
    182a:	0dc5      	lsrs	r5, r0, #23
    182c:	23ff      	movs	r3, #255	; 0xff
    182e:	1c2a      	adds	r2, r5, #0
    1830:	1c0c      	adds	r4, r1, #0
    1832:	401a      	ands	r2, r3
    1834:	4044      	eors	r4, r0
    1836:	2a00      	cmp	r2, #0
    1838:	d033      	beq.n	18a2 <__aeabi_fmul+0x7a>
    183a:	429a      	cmp	r2, r3
    183c:	d031      	beq.n	18a2 <__aeabi_fmul+0x7a>
    183e:	0dcd      	lsrs	r5, r1, #23
    1840:	401d      	ands	r5, r3
    1842:	d02e      	beq.n	18a2 <__aeabi_fmul+0x7a>
    1844:	429d      	cmp	r5, r3
    1846:	d02c      	beq.n	18a2 <__aeabi_fmul+0x7a>
    1848:	1955      	adds	r5, r2, r5
    184a:	2280      	movs	r2, #128	; 0x80
    184c:	0209      	lsls	r1, r1, #8
    184e:	0612      	lsls	r2, r2, #24
    1850:	0200      	lsls	r0, r0, #8
    1852:	4310      	orrs	r0, r2
    1854:	430a      	orrs	r2, r1
    1856:	2100      	movs	r1, #0
    1858:	1c0b      	adds	r3, r1, #0
    185a:	f000 f88f 	bl	197c <__aeabi_lmul>
    185e:	1e0e      	subs	r6, r1, #0
    1860:	da01      	bge.n	1866 <__aeabi_fmul+0x3e>
    1862:	3d7f      	subs	r5, #127	; 0x7f
    1864:	e001      	b.n	186a <__aeabi_fmul+0x42>
    1866:	3d80      	subs	r5, #128	; 0x80
    1868:	004e      	lsls	r6, r1, #1
    186a:	0fe4      	lsrs	r4, r4, #31
    186c:	0a33      	lsrs	r3, r6, #8
    186e:	07e4      	lsls	r4, r4, #31
    1870:	05ea      	lsls	r2, r5, #23
    1872:	4323      	orrs	r3, r4
    1874:	189b      	adds	r3, r3, r2
    1876:	2280      	movs	r2, #128	; 0x80
    1878:	0636      	lsls	r6, r6, #24
    187a:	0612      	lsls	r2, r2, #24
    187c:	4296      	cmp	r6, r2
    187e:	d004      	beq.n	188a <__aeabi_fmul+0x62>
    1880:	2dfd      	cmp	r5, #253	; 0xfd
    1882:	d802      	bhi.n	188a <__aeabi_fmul+0x62>
    1884:	0ff6      	lsrs	r6, r6, #31
    1886:	1998      	adds	r0, r3, r6
    1888:	e029      	b.n	18de <__aeabi_fmul+0xb6>
    188a:	3301      	adds	r3, #1
    188c:	2800      	cmp	r0, #0
    188e:	d101      	bne.n	1894 <__aeabi_fmul+0x6c>
    1890:	2201      	movs	r2, #1
    1892:	4393      	bics	r3, r2
    1894:	1c18      	adds	r0, r3, #0
    1896:	2dfd      	cmp	r5, #253	; 0xfd
    1898:	d921      	bls.n	18de <__aeabi_fmul+0xb6>
    189a:	1c20      	adds	r0, r4, #0
    189c:	2d00      	cmp	r5, #0
    189e:	da19      	bge.n	18d4 <__aeabi_fmul+0xac>
    18a0:	e01d      	b.n	18de <__aeabi_fmul+0xb6>
    18a2:	4b0f      	ldr	r3, [pc, #60]	; (18e0 <__aeabi_fmul+0xb8>)
    18a4:	0040      	lsls	r0, r0, #1
    18a6:	4298      	cmp	r0, r3
    18a8:	d805      	bhi.n	18b6 <__aeabi_fmul+0x8e>
    18aa:	004a      	lsls	r2, r1, #1
    18ac:	429a      	cmp	r2, r3
    18ae:	d806      	bhi.n	18be <__aeabi_fmul+0x96>
    18b0:	0fe0      	lsrs	r0, r4, #31
    18b2:	07c0      	lsls	r0, r0, #31
    18b4:	e013      	b.n	18de <__aeabi_fmul+0xb6>
    18b6:	23ff      	movs	r3, #255	; 0xff
    18b8:	061b      	lsls	r3, r3, #24
    18ba:	4298      	cmp	r0, r3
    18bc:	d10e      	bne.n	18dc <__aeabi_fmul+0xb4>
    18be:	23ff      	movs	r3, #255	; 0xff
    18c0:	0049      	lsls	r1, r1, #1
    18c2:	061b      	lsls	r3, r3, #24
    18c4:	4299      	cmp	r1, r3
    18c6:	d809      	bhi.n	18dc <__aeabi_fmul+0xb4>
    18c8:	0e00      	lsrs	r0, r0, #24
    18ca:	d007      	beq.n	18dc <__aeabi_fmul+0xb4>
    18cc:	0e09      	lsrs	r1, r1, #24
    18ce:	d005      	beq.n	18dc <__aeabi_fmul+0xb4>
    18d0:	0fe4      	lsrs	r4, r4, #31
    18d2:	07e4      	lsls	r4, r4, #31
    18d4:	20ff      	movs	r0, #255	; 0xff
    18d6:	05c0      	lsls	r0, r0, #23
    18d8:	4320      	orrs	r0, r4
    18da:	e000      	b.n	18de <__aeabi_fmul+0xb6>
    18dc:	4801      	ldr	r0, [pc, #4]	; (18e4 <__aeabi_fmul+0xbc>)
    18de:	bd70      	pop	{r4, r5, r6, pc}
    18e0:	feffffff 	mrc2	15, 7, pc, cr15, cr15, {7}
    18e4:	7fc00000 	svcvc	0x00c00000

000018e8 <__aeabi_f2uiz>:
    18e8:	b510      	push	{r4, lr}
    18ea:	2480      	movs	r4, #128	; 0x80
    18ec:	239e      	movs	r3, #158	; 0x9e
    18ee:	0dc1      	lsrs	r1, r0, #23
    18f0:	0202      	lsls	r2, r0, #8
    18f2:	0624      	lsls	r4, r4, #24
    18f4:	4322      	orrs	r2, r4
    18f6:	1a5b      	subs	r3, r3, r1
    18f8:	d402      	bmi.n	1900 <__aeabi_f2uiz+0x18>
    18fa:	40da      	lsrs	r2, r3
    18fc:	1c10      	adds	r0, r2, #0
    18fe:	e006      	b.n	190e <__aeabi_f2uiz+0x26>
    1900:	29fe      	cmp	r1, #254	; 0xfe
    1902:	d902      	bls.n	190a <__aeabi_f2uiz+0x22>
    1904:	2000      	movs	r0, #0
    1906:	42a2      	cmp	r2, r4
    1908:	d101      	bne.n	190e <__aeabi_f2uiz+0x26>
    190a:	0a09      	lsrs	r1, r1, #8
    190c:	1e48      	subs	r0, r1, #1
    190e:	bd10      	pop	{r4, pc}

00001910 <__bhs_ui2f>:
    1910:	2800      	cmp	r0, #0
    1912:	d02b      	beq.n	196c <__bhs_ui2f+0x5c>
    1914:	0c03      	lsrs	r3, r0, #16
    1916:	d101      	bne.n	191c <__bhs_ui2f+0xc>
    1918:	0400      	lsls	r0, r0, #16
    191a:	e002      	b.n	1922 <__bhs_ui2f+0x12>
    191c:	2380      	movs	r3, #128	; 0x80
    191e:	051b      	lsls	r3, r3, #20
    1920:	18c9      	adds	r1, r1, r3
    1922:	0e03      	lsrs	r3, r0, #24
    1924:	d101      	bne.n	192a <__bhs_ui2f+0x1a>
    1926:	0200      	lsls	r0, r0, #8
    1928:	e002      	b.n	1930 <__bhs_ui2f+0x20>
    192a:	2380      	movs	r3, #128	; 0x80
    192c:	04db      	lsls	r3, r3, #19
    192e:	18c9      	adds	r1, r1, r3
    1930:	0f03      	lsrs	r3, r0, #28
    1932:	d101      	bne.n	1938 <__bhs_ui2f+0x28>
    1934:	0100      	lsls	r0, r0, #4
    1936:	e002      	b.n	193e <__bhs_ui2f+0x2e>
    1938:	2380      	movs	r3, #128	; 0x80
    193a:	049b      	lsls	r3, r3, #18
    193c:	18c9      	adds	r1, r1, r3
    193e:	0f83      	lsrs	r3, r0, #30
    1940:	d101      	bne.n	1946 <__bhs_ui2f+0x36>
    1942:	0080      	lsls	r0, r0, #2
    1944:	e002      	b.n	194c <__bhs_ui2f+0x3c>
    1946:	2380      	movs	r3, #128	; 0x80
    1948:	045b      	lsls	r3, r3, #17
    194a:	18c9      	adds	r1, r1, r3
    194c:	2800      	cmp	r0, #0
    194e:	db01      	blt.n	1954 <__bhs_ui2f+0x44>
    1950:	0040      	lsls	r0, r0, #1
    1952:	e002      	b.n	195a <__bhs_ui2f+0x4a>
    1954:	2380      	movs	r3, #128	; 0x80
    1956:	041b      	lsls	r3, r3, #16
    1958:	18c9      	adds	r1, r1, r3
    195a:	3080      	adds	r0, #128	; 0x80
    195c:	1203      	asrs	r3, r0, #8
    195e:	1859      	adds	r1, r3, r1
    1960:	0600      	lsls	r0, r0, #24
    1962:	d101      	bne.n	1968 <__bhs_ui2f+0x58>
    1964:	2301      	movs	r3, #1
    1966:	4399      	bics	r1, r3
    1968:	1c08      	adds	r0, r1, #0
    196a:	e000      	b.n	196e <__bhs_ui2f+0x5e>
    196c:	2000      	movs	r0, #0
    196e:	4770      	bx	lr

00001970 <__aeabi_ui2f>:
    1970:	2180      	movs	r1, #128	; 0x80
    1972:	b508      	push	{r3, lr}
    1974:	05c9      	lsls	r1, r1, #23
    1976:	f7ff ffcb 	bl	1910 <__bhs_ui2f>
    197a:	bd08      	pop	{r3, pc}

0000197c <__aeabi_lmul>:
    197c:	b510      	push	{r4, lr}
    197e:	4343      	muls	r3, r0
    1980:	4351      	muls	r1, r2
    1982:	18c9      	adds	r1, r1, r3
    1984:	0c04      	lsrs	r4, r0, #16
    1986:	0c13      	lsrs	r3, r2, #16
    1988:	435c      	muls	r4, r3
    198a:	1909      	adds	r1, r1, r4
    198c:	b292      	uxth	r2, r2
    198e:	0c04      	lsrs	r4, r0, #16
    1990:	4354      	muls	r4, r2
    1992:	b280      	uxth	r0, r0
    1994:	4343      	muls	r3, r0
    1996:	4350      	muls	r0, r2
    1998:	0422      	lsls	r2, r4, #16
    199a:	0c24      	lsrs	r4, r4, #16
    199c:	1880      	adds	r0, r0, r2
    199e:	4161      	adcs	r1, r4
    19a0:	041a      	lsls	r2, r3, #16
    19a2:	0c1b      	lsrs	r3, r3, #16
    19a4:	1880      	adds	r0, r0, r2
    19a6:	4159      	adcs	r1, r3
    19a8:	bd10      	pop	{r4, pc}

000019aa <__aeabi_memcpy>:
    19aa:	4684      	mov	ip, r0
    19ac:	0783      	lsls	r3, r0, #30
    19ae:	d108      	bne.n	19c2 <copy1_start>
    19b0:	078b      	lsls	r3, r1, #30
    19b2:	d106      	bne.n	19c2 <copy1_start>
    19b4:	1f13      	subs	r3, r2, #4
    19b6:	d304      	bcc.n	19c2 <copy1_start>

000019b8 <copy4>:
    19b8:	c904      	ldmia	r1!, {r2}
    19ba:	c004      	stmia	r0!, {r2}
    19bc:	3b04      	subs	r3, #4
    19be:	d2fb      	bcs.n	19b8 <copy4>
    19c0:	1d1a      	adds	r2, r3, #4

000019c2 <copy1_start>:
    19c2:	4252      	negs	r2, r2
    19c4:	d005      	beq.n	19d2 <copy1_ret>
    19c6:	1a89      	subs	r1, r1, r2
    19c8:	1a80      	subs	r0, r0, r2

000019ca <copy1>:
    19ca:	5c8b      	ldrb	r3, [r1, r2]
    19cc:	5483      	strb	r3, [r0, r2]
    19ce:	3201      	adds	r2, #1
    19d0:	d1fb      	bne.n	19ca <copy1>

000019d2 <copy1_ret>:
    19d2:	4660      	mov	r0, ip
    19d4:	4770      	bx	lr

000019d6 <__aeabi_lowlevel_memset>:
    19d6:	4684      	mov	ip, r0
    19d8:	3a04      	subs	r2, #4
    19da:	d309      	bcc.n	19f0 <memset1>
    19dc:	0783      	lsls	r3, r0, #30
    19de:	d107      	bne.n	19f0 <memset1>
    19e0:	0609      	lsls	r1, r1, #24
    19e2:	0a0b      	lsrs	r3, r1, #8
    19e4:	4319      	orrs	r1, r3
    19e6:	0c0b      	lsrs	r3, r1, #16
    19e8:	4319      	orrs	r1, r3

000019ea <memset4>:
    19ea:	3a04      	subs	r2, #4
    19ec:	c002      	stmia	r0!, {r1}
    19ee:	d2fc      	bcs.n	19ea <memset4>

000019f0 <memset1>:
    19f0:	3204      	adds	r2, #4
    19f2:	d003      	beq.n	19fc <memset1_ret>

000019f4 <memset1a>:
    19f4:	7001      	strb	r1, [r0, #0]
    19f6:	3001      	adds	r0, #1
    19f8:	3a01      	subs	r2, #1
    19fa:	d1fb      	bne.n	19f4 <memset1a>

000019fc <memset1_ret>:
    19fc:	4660      	mov	r0, ip
    19fe:	4770      	bx	lr
    1a00:	37314337 			; <UNDEFINED> instruction: 0x37314337
    1a04:	622d3830 	eorvs	r3, sp, #48, 16	; 0x300000
    1a08:	34623232 	strbtcc	r3, [r2], #-562	; 0x232
    1a0c:	00306365 	eorseq	r6, r0, r5, ror #6

00001a10 <OscRateIn>:
    1a10:	00b71b00 	adcseq	r1, r7, r0, lsl #22

00001a14 <pinmuxing>:
    1a14:	00010100 	andeq	r0, r1, r0, lsl #2
    1a18:	00010200 	andeq	r0, r1, r0, lsl #4
    1a1c:	00010300 	andeq	r0, r1, r0, lsl #6
    1a20:	00010400 	andeq	r0, r1, r0, lsl #8
    1a24:	00010500 	andeq	r0, r1, r0, lsl #10
    1a28:	00010600 	andeq	r0, r1, r0, lsl #12
    1a2c:	01010b00 	tsteq	r1, r0, lsl #22
    1a30:	00011200 	andeq	r1, r1, r0, lsl #4
    1a34:	00011300 	andeq	r1, r1, r0, lsl #6

00001a38 <wdtOSCRate>:
    1a38:	00000000 	andeq	r0, r0, r0
    1a3c:	000927c0 	andeq	r2, r9, r0, asr #15
    1a40:	00100590 	mulseq	r0, r0, r5
    1a44:	00155cc0 	andseq	r5, r5, r0, asr #25
    1a48:	001ab3f0 			; <UNDEFINED> instruction: 0x001ab3f0
    1a4c:	00200b20 	eoreq	r0, r0, r0, lsr #22
    1a50:	00249f00 	eoreq	r9, r4, r0, lsl #30
    1a54:	002932e0 	eoreq	r3, r9, r0, ror #5
    1a58:	002dc6c0 	eoreq	ip, sp, r0, asr #13
    1a5c:	00319750 	eorseq	r9, r1, r0, asr r7
    1a60:	003567e0 	eorseq	r6, r5, r0, ror #15
    1a64:	00393870 	eorseq	r3, r9, r0, ror r8
    1a68:	003d0900 	eorseq	r0, sp, r0, lsl #18
    1a6c:	00401640 	subeq	r1, r0, r0, asr #12
    1a70:	00432380 	subeq	r2, r3, r0, lsl #7
    1a74:	004630c0 	subeq	r3, r6, r0, asr #1

Disassembly of section .data:

10000000 <_data>:
10000000:	3f800000 	svccc	0x00800000

10000004 <system_osc_select>:
10000004:	00000001 	andeq	r0, r0, r1

Disassembly of section .bss:

10000008 <_bss>:
	...

1000000a <g_pg_state>:
1000000a:	00000000 	andeq	r0, r0, r0

1000000e <open_12v_1f.5945>:
	...

1000000f <open_12v_2t.5949>:
	...

10000010 <led_state>:
10000010:	00000000 	andeq	r0, r0, r0

10000014 <open_12v_2f.5953>:
	...

10000015 <open_12v_1t.5941>:
10000015:	00000000 	andeq	r0, r0, r0

10000018 <led_blink_flag>:
10000018:	00000000 	andeq	r0, r0, r0

1000001c <g_dna>:
	...

10000024 <g_ackpkg>:
	...

1000004c <g_adc_buf>:
	...

10000076 <g_reqpkg>:
	...

1000009e <g_adc_val>:
	...

100000ac <adc_cnt.6094>:
	...

100000ae <uart_rxdata>:
	...

10000150 <uart_rxrb>:
	...

10000164 <uart_txrb>:
	...

10000178 <uart_txdata>:
	...

10000218 <tmrlist>:
	...

100002b8 <SystemCoreClock>:
100002b8:	00000000 	andeq	r0, r0, r0

Disassembly of section .comment:

00000000 <.comment>:
   0:	3a434347 	bcc	10d0d24 <__top_MFlash32+0x10c8d24>
   4:	4e472820 	cdpmi	8, 4, cr2, cr7, cr0, {1}
   8:	6f542055 	svcvs	0x00542055
   c:	20736c6f 	rsbscs	r6, r3, pc, ror #24
  10:	20726f66 	rsbscs	r6, r2, r6, ror #30
  14:	204d5241 	subcs	r5, sp, r1, asr #4
  18:	65626d45 	strbvs	r6, [r2, #-3397]!	; 0xd45
  1c:	64656464 	strbtvs	r6, [r5], #-1124	; 0x464
  20:	6f725020 	svcvs	0x00725020
  24:	73736563 	cmnvc	r3, #415236096	; 0x18c00000
  28:	2973726f 	ldmdbcs	r3!, {r0, r1, r2, r3, r5, r6, r9, ip, sp, lr}^
  2c:	392e3420 	stmdbcc	lr!, {r5, sl, ip, sp}
  30:	3220332e 	eorcc	r3, r0, #-1207959552	; 0xb8000000
  34:	30353130 	eorscc	r3, r5, r0, lsr r1
  38:	20393235 	eorscs	r3, r9, r5, lsr r2
  3c:	6c657228 	sfmvs	f7, 2, [r5], #-160	; 0xffffff60
  40:	65736165 	ldrbvs	r6, [r3, #-357]!	; 0x165
  44:	415b2029 	cmpmi	fp, r9, lsr #32
  48:	652f4d52 	strvs	r4, [pc, #-3410]!	; fffff2fe <_vStackTop+0xefffe2fe>
  4c:	6465626d 	strbtvs	r6, [r5], #-621	; 0x26d
  50:	2d646564 	cfstr64cs	mvdx6, [r4, #-400]!	; 0xfffffe70
  54:	2d395f34 	ldccs	15, cr5, [r9, #-208]!	; 0xffffff30
  58:	6e617262 	cdpvs	2, 6, cr7, cr1, cr2, {3}
  5c:	72206863 	eorvc	r6, r0, #6488064	; 0x630000
  60:	73697665 	cmnvc	r9, #105906176	; 0x6500000
  64:	206e6f69 	rsbcs	r6, lr, r9, ror #30
  68:	32343232 	eorscc	r3, r4, #536870915	; 0x20000003
  6c:	005d3838 	subseq	r3, sp, r8, lsr r8

Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:
   0:	00002e41 	andeq	r2, r0, r1, asr #28
   4:	61656100 	cmnvs	r5, r0, lsl #2
   8:	01006962 	tsteq	r0, r2, ror #18
   c:	00000024 	andeq	r0, r0, r4, lsr #32
  10:	726f4305 	rsbvc	r4, pc, #335544320	; 0x14000000
  14:	2d786574 	cfldr64cs	mvdx6, [r8, #-464]!	; 0xfffffe30
  18:	0600304d 	streq	r3, [r0], -sp, asr #32
  1c:	094d070c 	stmdbeq	sp, {r2, r3, r8, r9, sl}^
  20:	14041201 	strne	r1, [r4], #-513	; 0x201
  24:	17011501 	strne	r1, [r1, -r1, lsl #10]
  28:	1a011803 	bne	4603c <__top_MFlash32+0x3e03c>
  2c:	Address 0x0000002c is out of bounds.

