
pmu741.axf:     file format elf32-littlearm


Disassembly of section .text:

00000000 <g_pfnVectors>:
       0:	10001000 	andne	r1, r0, r0
       4:	00000103 	andeq	r0, r0, r3, lsl #2
       8:	000000d5 	ldrdeq	r0, [r0], -r5
       c:	000000d7 	ldrdeq	r0, [r0], -r7
	...
      2c:	000000d9 	ldrdeq	r0, [r0], -r9
	...
      38:	000000db 	ldrdeq	r0, [r0], -fp
      3c:	000000dd 	ldrdeq	r0, [r0], -sp
      40:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      44:	00000411 	andeq	r0, r0, r1, lsl r4
      48:	00000431 	andeq	r0, r0, r1, lsr r4
      4c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      50:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      54:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      58:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      5c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      60:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      64:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      78:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      7c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      80:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      84:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      88:	00000d5d 	andeq	r0, r0, sp, asr sp
      8c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      90:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      94:	00000cad 	andeq	r0, r0, sp, lsr #25
      98:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      9c:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      a0:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      a4:	000008cd 	andeq	r0, r0, sp, asr #17
      a8:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      ac:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
	...
      b8:	000000df 	ldrdeq	r0, [r0], -pc	; <UNPREDICTABLE>
      bc:	00000000 	andeq	r0, r0, r0

000000c0 <__data_section_table>:
      c0:	00001a24 	andeq	r1, r0, r4, lsr #20
      c4:	10000000 	andne	r0, r0, r0
      c8:	00000008 	andeq	r0, r0, r8

000000cc <__bss_section_table>:
      cc:	10000008 	andne	r0, r0, r8
      d0:	000002b4 			; <UNDEFINED> instruction: 0x000002b4

000000d4 <NMI_Handler>:
      d4:	e7fe      	b.n	d4 <NMI_Handler>

000000d6 <HardFault_Handler>:
      d6:	e7fe      	b.n	d6 <HardFault_Handler>

000000d8 <SVC_Handler>:
      d8:	e7fe      	b.n	d8 <SVC_Handler>

000000da <PendSV_Handler>:
      da:	e7fe      	b.n	da <PendSV_Handler>

000000dc <SysTick_Handler>:
      dc:	e7fe      	b.n	dc <SysTick_Handler>

000000de <ADC_IRQHandler>:
      de:	e7fe      	b.n	de <ADC_IRQHandler>

000000e0 <data_init>:
      e0:	2300      	movs	r3, #0
      e2:	b510      	push	{r4, lr}
      e4:	4293      	cmp	r3, r2
      e6:	d203      	bcs.n	f0 <data_init+0x10>
      e8:	581c      	ldr	r4, [r3, r0]
      ea:	505c      	str	r4, [r3, r1]
      ec:	3304      	adds	r3, #4
      ee:	e7f9      	b.n	e4 <data_init+0x4>
      f0:	bd10      	pop	{r4, pc}

000000f2 <bss_init>:
      f2:	2300      	movs	r3, #0
      f4:	428b      	cmp	r3, r1
      f6:	d203      	bcs.n	100 <bss_init+0xe>
      f8:	2200      	movs	r2, #0
      fa:	501a      	str	r2, [r3, r0]
      fc:	3304      	adds	r3, #4
      fe:	e7f9      	b.n	f4 <bss_init+0x2>
     100:	4770      	bx	lr

00000102 <ResetISR>:
     102:	b510      	push	{r4, lr}
     104:	4c0c      	ldr	r4, [pc, #48]	; (138 <ResetISR+0x36>)
     106:	4b0d      	ldr	r3, [pc, #52]	; (13c <ResetISR+0x3a>)
     108:	429c      	cmp	r4, r3
     10a:	d206      	bcs.n	11a <ResetISR+0x18>
     10c:	6820      	ldr	r0, [r4, #0]
     10e:	6861      	ldr	r1, [r4, #4]
     110:	68a2      	ldr	r2, [r4, #8]
     112:	f7ff ffe5 	bl	e0 <data_init>
     116:	340c      	adds	r4, #12
     118:	e7f5      	b.n	106 <ResetISR+0x4>
     11a:	4b09      	ldr	r3, [pc, #36]	; (140 <ResetISR+0x3e>)
     11c:	429c      	cmp	r4, r3
     11e:	d205      	bcs.n	12c <ResetISR+0x2a>
     120:	6820      	ldr	r0, [r4, #0]
     122:	6861      	ldr	r1, [r4, #4]
     124:	f7ff ffe5 	bl	f2 <bss_init>
     128:	3408      	adds	r4, #8
     12a:	e7f6      	b.n	11a <ResetISR+0x18>
     12c:	f000 fd6a 	bl	c04 <SystemInit>
     130:	f001 f9e8 	bl	1504 <__weak_main>
     134:	e7fe      	b.n	134 <ResetISR+0x32>
     136:	46c0      	nop			; (mov r8, r8)
     138:	000000c0 	andeq	r0, r0, r0, asr #1
     13c:	000000cc 	andeq	r0, r0, ip, asr #1
     140:	000000d4 	ldrdeq	r0, [r0], -r4
     144:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     148:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     14c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     150:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     154:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     158:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     15c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     160:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     164:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     168:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     16c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     170:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     174:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     178:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     17c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     180:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     184:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     188:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     18c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     190:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     194:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     198:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     19c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     1fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     200:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     204:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     208:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     20c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     210:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     214:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     218:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     21c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     220:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     224:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     228:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     22c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     230:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     234:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     238:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     23c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     240:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     244:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     248:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     24c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     250:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     254:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     258:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     25c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     260:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     264:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     268:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     26c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     270:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     274:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     278:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     27c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     280:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     284:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     288:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     28c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     290:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     294:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     298:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     29c:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2a8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ac:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2b8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2bc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2c8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2cc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2d8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2dc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2e8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2ec:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f0:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f4:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff
     2f8:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

000002fc <CRP_WORD>:
     2fc:	ffffffff 			; <UNDEFINED> instruction: 0xffffffff

00000300 <shitfer>:
     300:	2308      	movs	r3, #8
     302:	2280      	movs	r2, #128	; 0x80
     304:	b530      	push	{r4, r5, lr}
     306:	1c04      	adds	r4, r0, #0
     308:	4014      	ands	r4, r2
     30a:	1e65      	subs	r5, r4, #1
     30c:	41ac      	sbcs	r4, r5
     30e:	0049      	lsls	r1, r1, #1
     310:	1909      	adds	r1, r1, r4
     312:	4c06      	ldr	r4, [pc, #24]	; (32c <shitfer+0x2c>)
     314:	0852      	lsrs	r2, r2, #1
     316:	42a1      	cmp	r1, r4
     318:	d902      	bls.n	320 <shitfer+0x20>
     31a:	4c05      	ldr	r4, [pc, #20]	; (330 <shitfer+0x30>)
     31c:	b289      	uxth	r1, r1
     31e:	4061      	eors	r1, r4
     320:	3b01      	subs	r3, #1
     322:	2b00      	cmp	r3, #0
     324:	d1ef      	bne.n	306 <shitfer+0x6>
     326:	b288      	uxth	r0, r1
     328:	bd30      	pop	{r4, r5, pc}
     32a:	46c0      	nop			; (mov r8, r8)
     32c:	0000ffff 	strdeq	pc, [r0], -pc	; <UNPREDICTABLE>
     330:	00001021 	andeq	r1, r0, r1, lsr #32

00000334 <crc16>:
     334:	b570      	push	{r4, r5, r6, lr}
     336:	1c0e      	adds	r6, r1, #0
     338:	1c05      	adds	r5, r0, #0
     33a:	1c04      	adds	r4, r0, #0
     33c:	2100      	movs	r1, #0
     33e:	1b33      	subs	r3, r6, r4
     340:	18eb      	adds	r3, r5, r3
     342:	2b00      	cmp	r3, #0
     344:	dd05      	ble.n	352 <crc16+0x1e>
     346:	7820      	ldrb	r0, [r4, #0]
     348:	f7ff ffda 	bl	300 <shitfer>
     34c:	3401      	adds	r4, #1
     34e:	1c01      	adds	r1, r0, #0
     350:	e7f5      	b.n	33e <crc16+0xa>
     352:	2000      	movs	r0, #0
     354:	f7ff ffd4 	bl	300 <shitfer>
     358:	1c01      	adds	r1, r0, #0
     35a:	2000      	movs	r0, #0
     35c:	f7ff ffd0 	bl	300 <shitfer>
     360:	bd70      	pop	{r4, r5, r6, pc}
	...

00000364 <adc_init>:
     364:	b513      	push	{r0, r1, r4, lr}
     366:	4c15      	ldr	r4, [pc, #84]	; (3bc <adc_init+0x58>)
     368:	2100      	movs	r1, #0
     36a:	1c20      	adds	r0, r4, #0
     36c:	2217      	movs	r2, #23
     36e:	2301      	movs	r3, #1
     370:	f000 fee6 	bl	1140 <Chip_IOCON_PinMuxSet>
     374:	1c20      	adds	r0, r4, #0
     376:	2100      	movs	r1, #0
     378:	220e      	movs	r2, #14
     37a:	2302      	movs	r3, #2
     37c:	f000 fee0 	bl	1140 <Chip_IOCON_PinMuxSet>
     380:	1c20      	adds	r0, r4, #0
     382:	2100      	movs	r1, #0
     384:	2216      	movs	r2, #22
     386:	2301      	movs	r3, #1
     388:	f000 feda 	bl	1140 <Chip_IOCON_PinMuxSet>
     38c:	1c20      	adds	r0, r4, #0
     38e:	2100      	movs	r1, #0
     390:	2210      	movs	r2, #16
     392:	2301      	movs	r3, #1
     394:	f000 fed4 	bl	1140 <Chip_IOCON_PinMuxSet>
     398:	1c20      	adds	r0, r4, #0
     39a:	2100      	movs	r1, #0
     39c:	220d      	movs	r2, #13
     39e:	2302      	movs	r3, #2
     3a0:	f000 fece 	bl	1140 <Chip_IOCON_PinMuxSet>
     3a4:	1c20      	adds	r0, r4, #0
     3a6:	220c      	movs	r2, #12
     3a8:	2302      	movs	r3, #2
     3aa:	2100      	movs	r1, #0
     3ac:	f000 fec8 	bl	1140 <Chip_IOCON_PinMuxSet>
     3b0:	4803      	ldr	r0, [pc, #12]	; (3c0 <adc_init+0x5c>)
     3b2:	4669      	mov	r1, sp
     3b4:	f000 fdc8 	bl	f48 <Chip_ADC_Init>
     3b8:	bd13      	pop	{r0, r1, r4, pc}
     3ba:	46c0      	nop			; (mov r8, r8)
     3bc:	40044000 	andmi	r4, r4, r0
     3c0:	4001c000 	andmi	ip, r1, r0

000003c4 <adc_read>:
     3c4:	b538      	push	{r3, r4, r5, lr}
     3c6:	1c04      	adds	r4, r0, #0
     3c8:	2201      	movs	r2, #1
     3ca:	4810      	ldr	r0, [pc, #64]	; (40c <adc_read+0x48>)
     3cc:	1c0d      	adds	r5, r1, #0
     3ce:	1c21      	adds	r1, r4, #0
     3d0:	f000 fe24 	bl	101c <Chip_ADC_EnableChannel>
     3d4:	480d      	ldr	r0, [pc, #52]	; (40c <adc_read+0x48>)
     3d6:	2101      	movs	r1, #1
     3d8:	2200      	movs	r2, #0
     3da:	f000 fe0b 	bl	ff4 <Chip_ADC_SetStartMode>
     3de:	480b      	ldr	r0, [pc, #44]	; (40c <adc_read+0x48>)
     3e0:	1c21      	adds	r1, r4, #0
     3e2:	2200      	movs	r2, #0
     3e4:	f000 fdeb 	bl	fbe <Chip_ADC_ReadStatus>
     3e8:	2801      	cmp	r0, #1
     3ea:	d1f8      	bne.n	3de <adc_read+0x1a>
     3ec:	1c2a      	adds	r2, r5, #0
     3ee:	1c21      	adds	r1, r4, #0
     3f0:	4806      	ldr	r0, [pc, #24]	; (40c <adc_read+0x48>)
     3f2:	f000 fdd9 	bl	fa8 <Chip_ADC_ReadValue>
     3f6:	1c21      	adds	r1, r4, #0
     3f8:	4804      	ldr	r0, [pc, #16]	; (40c <adc_read+0x48>)
     3fa:	2200      	movs	r2, #0
     3fc:	f000 fe0e 	bl	101c <Chip_ADC_EnableChannel>
     400:	2100      	movs	r1, #0
     402:	4802      	ldr	r0, [pc, #8]	; (40c <adc_read+0x48>)
     404:	1c0a      	adds	r2, r1, #0
     406:	f000 fdf5 	bl	ff4 <Chip_ADC_SetStartMode>
     40a:	bd38      	pop	{r3, r4, r5, pc}
     40c:	4001c000 	andmi	ip, r1, r0

00000410 <FLEX_INT1_IRQHandler>:
     410:	2302      	movs	r3, #2
     412:	4a05      	ldr	r2, [pc, #20]	; (428 <FLEX_INT1_IRQHandler+0x18>)
     414:	2101      	movs	r1, #1
     416:	8013      	strh	r3, [r2, #0]
     418:	22a0      	movs	r2, #160	; 0xa0
     41a:	05d2      	lsls	r2, r2, #23
     41c:	7251      	strb	r1, [r2, #9]
     41e:	2100      	movs	r1, #0
     420:	7451      	strb	r1, [r2, #17]
     422:	4a02      	ldr	r2, [pc, #8]	; (42c <FLEX_INT1_IRQHandler+0x1c>)
     424:	6253      	str	r3, [r2, #36]	; 0x24
     426:	4770      	bx	lr
     428:	1000000a 	andne	r0, r0, sl
     42c:	4004c000 	andmi	ip, r4, r0

00000430 <FLEX_INT2_IRQHandler>:
     430:	2202      	movs	r2, #2
     432:	4b06      	ldr	r3, [pc, #24]	; (44c <FLEX_INT2_IRQHandler+0x1c>)
     434:	805a      	strh	r2, [r3, #2]
     436:	23a0      	movs	r3, #160	; 0xa0
     438:	3a01      	subs	r2, #1
     43a:	05db      	lsls	r3, r3, #23
     43c:	721a      	strb	r2, [r3, #8]
     43e:	2200      	movs	r2, #0
     440:	72da      	strb	r2, [r3, #11]
     442:	4b03      	ldr	r3, [pc, #12]	; (450 <FLEX_INT2_IRQHandler+0x20>)
     444:	3204      	adds	r2, #4
     446:	625a      	str	r2, [r3, #36]	; 0x24
     448:	4770      	bx	lr
     44a:	46c0      	nop			; (mov r8, r8)
     44c:	1000000a 	andne	r0, r0, sl
     450:	4004c000 	andmi	ip, r4, r0

00000454 <vcore_init>:
     454:	b538      	push	{r3, r4, r5, lr}
     456:	4c44      	ldr	r4, [pc, #272]	; (568 <vcore_init+0x114>)
     458:	2100      	movs	r1, #0
     45a:	1c20      	adds	r0, r4, #0
     45c:	2215      	movs	r2, #21
     45e:	2310      	movs	r3, #16
     460:	f000 fe6e 	bl	1140 <Chip_IOCON_PinMuxSet>
     464:	1c20      	adds	r0, r4, #0
     466:	2100      	movs	r1, #0
     468:	2207      	movs	r2, #7
     46a:	2310      	movs	r3, #16
     46c:	f000 fe68 	bl	1140 <Chip_IOCON_PinMuxSet>
     470:	1c20      	adds	r0, r4, #0
     472:	2100      	movs	r1, #0
     474:	2206      	movs	r2, #6
     476:	2310      	movs	r3, #16
     478:	f000 fe62 	bl	1140 <Chip_IOCON_PinMuxSet>
     47c:	1c20      	adds	r0, r4, #0
     47e:	2100      	movs	r1, #0
     480:	2209      	movs	r2, #9
     482:	2310      	movs	r3, #16
     484:	f000 fe5c 	bl	1140 <Chip_IOCON_PinMuxSet>
     488:	1c20      	adds	r0, r4, #0
     48a:	2100      	movs	r1, #0
     48c:	2208      	movs	r2, #8
     48e:	2310      	movs	r3, #16
     490:	f000 fe56 	bl	1140 <Chip_IOCON_PinMuxSet>
     494:	1c20      	adds	r0, r4, #0
     496:	2100      	movs	r1, #0
     498:	2202      	movs	r2, #2
     49a:	2310      	movs	r3, #16
     49c:	f000 fe50 	bl	1140 <Chip_IOCON_PinMuxSet>
     4a0:	1c20      	adds	r0, r4, #0
     4a2:	2100      	movs	r1, #0
     4a4:	2203      	movs	r2, #3
     4a6:	2310      	movs	r3, #16
     4a8:	f000 fe4a 	bl	1140 <Chip_IOCON_PinMuxSet>
     4ac:	1c20      	adds	r0, r4, #0
     4ae:	2100      	movs	r1, #0
     4b0:	2211      	movs	r2, #17
     4b2:	2310      	movs	r3, #16
     4b4:	f000 fe44 	bl	1140 <Chip_IOCON_PinMuxSet>
     4b8:	1c20      	adds	r0, r4, #0
     4ba:	2100      	movs	r1, #0
     4bc:	220b      	movs	r2, #11
     4be:	2311      	movs	r3, #17
     4c0:	f000 fe3e 	bl	1140 <Chip_IOCON_PinMuxSet>
     4c4:	23a0      	movs	r3, #160	; 0xa0
     4c6:	2280      	movs	r2, #128	; 0x80
     4c8:	2080      	movs	r0, #128	; 0x80
     4ca:	05db      	lsls	r3, r3, #23
     4cc:	0192      	lsls	r2, r2, #6
     4ce:	5899      	ldr	r1, [r3, r2]
     4d0:	0380      	lsls	r0, r0, #14
     4d2:	4301      	orrs	r1, r0
     4d4:	2080      	movs	r0, #128	; 0x80
     4d6:	5099      	str	r1, [r3, r2]
     4d8:	5899      	ldr	r1, [r3, r2]
     4da:	2408      	movs	r4, #8
     4dc:	4301      	orrs	r1, r0
     4de:	5099      	str	r1, [r3, r2]
     4e0:	5899      	ldr	r1, [r3, r2]
     4e2:	3840      	subs	r0, #64	; 0x40
     4e4:	4301      	orrs	r1, r0
     4e6:	5099      	str	r1, [r3, r2]
     4e8:	5899      	ldr	r1, [r3, r2]
     4ea:	30c1      	adds	r0, #193	; 0xc1
     4ec:	30ff      	adds	r0, #255	; 0xff
     4ee:	4301      	orrs	r1, r0
     4f0:	5099      	str	r1, [r3, r2]
     4f2:	5899      	ldr	r1, [r3, r2]
     4f4:	3801      	subs	r0, #1
     4f6:	38ff      	subs	r0, #255	; 0xff
     4f8:	4301      	orrs	r1, r0
     4fa:	2080      	movs	r0, #128	; 0x80
     4fc:	5099      	str	r1, [r3, r2]
     4fe:	5899      	ldr	r1, [r3, r2]
     500:	0280      	lsls	r0, r0, #10
     502:	4301      	orrs	r1, r0
     504:	2080      	movs	r0, #128	; 0x80
     506:	5099      	str	r1, [r3, r2]
     508:	5899      	ldr	r1, [r3, r2]
     50a:	0100      	lsls	r0, r0, #4
     50c:	4301      	orrs	r1, r0
     50e:	5099      	str	r1, [r3, r2]
     510:	2104      	movs	r1, #4
     512:	2580      	movs	r5, #128	; 0x80
     514:	5898      	ldr	r0, [r3, r2]
     516:	032d      	lsls	r5, r5, #12
     518:	4388      	bics	r0, r1
     51a:	5098      	str	r0, [r3, r2]
     51c:	5898      	ldr	r0, [r3, r2]
     51e:	43a0      	bics	r0, r4
     520:	5098      	str	r0, [r3, r2]
     522:	4a12      	ldr	r2, [pc, #72]	; (56c <vcore_init+0x118>)
     524:	1854      	adds	r4, r2, r1
     526:	6fe0      	ldr	r0, [r4, #124]	; 0x7c
     528:	4328      	orrs	r0, r5
     52a:	67e0      	str	r0, [r4, #124]	; 0x7c
     52c:	24be      	movs	r4, #190	; 0xbe
     52e:	2002      	movs	r0, #2
     530:	2503      	movs	r5, #3
     532:	0064      	lsls	r4, r4, #1
     534:	5110      	str	r0, [r2, r4]
     536:	1864      	adds	r4, r4, r1
     538:	5115      	str	r5, [r2, r4]
     53a:	4a0d      	ldr	r2, [pc, #52]	; (570 <vcore_init+0x11c>)
     53c:	6814      	ldr	r4, [r2, #0]
     53e:	4384      	bics	r4, r0
     540:	6014      	str	r4, [r2, #0]
     542:	6814      	ldr	r4, [r2, #0]
     544:	438c      	bics	r4, r1
     546:	6014      	str	r4, [r2, #0]
     548:	6150      	str	r0, [r2, #20]
     54a:	6151      	str	r1, [r2, #20]
     54c:	4a09      	ldr	r2, [pc, #36]	; (574 <vcore_init+0x120>)
     54e:	6010      	str	r0, [r2, #0]
     550:	6011      	str	r1, [r2, #0]
     552:	2200      	movs	r2, #0
     554:	3903      	subs	r1, #3
     556:	755a      	strb	r2, [r3, #21]
     558:	71da      	strb	r2, [r3, #7]
     55a:	719a      	strb	r2, [r3, #6]
     55c:	7259      	strb	r1, [r3, #9]
     55e:	745a      	strb	r2, [r3, #17]
     560:	7219      	strb	r1, [r3, #8]
     562:	72da      	strb	r2, [r3, #11]
     564:	bd38      	pop	{r3, r4, r5, pc}
     566:	46c0      	nop			; (mov r8, r8)
     568:	40044000 	andmi	r4, r4, r0
     56c:	40048000 	andmi	r8, r4, r0
     570:	4004c000 	andmi	ip, r4, r0
     574:	e000e100 	and	lr, r0, r0, lsl #2

00000578 <set_voltage>:
     578:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
     57a:	4b1e      	ldr	r3, [pc, #120]	; (5f4 <set_voltage+0x7c>)
     57c:	4a1e      	ldr	r2, [pc, #120]	; (5f8 <set_voltage+0x80>)
     57e:	8018      	strh	r0, [r3, #0]
     580:	4b1e      	ldr	r3, [pc, #120]	; (5fc <set_voltage+0x84>)
     582:	4002      	ands	r2, r0
     584:	4018      	ands	r0, r3
     586:	1112      	asrs	r2, r2, #4
     588:	0100      	lsls	r0, r0, #4
     58a:	23a0      	movs	r3, #160	; 0xa0
     58c:	4310      	orrs	r0, r2
     58e:	2200      	movs	r2, #0
     590:	2507      	movs	r5, #7
     592:	05db      	lsls	r3, r3, #23
     594:	b287      	uxth	r7, r0
     596:	719a      	strb	r2, [r3, #6]
     598:	1c3e      	adds	r6, r7, #0
     59a:	2201      	movs	r2, #1
     59c:	23a0      	movs	r3, #160	; 0xa0
     59e:	412e      	asrs	r6, r5
     5a0:	2400      	movs	r4, #0
     5a2:	05db      	lsls	r3, r3, #23
     5a4:	4016      	ands	r6, r2
     5a6:	71dc      	strb	r4, [r3, #7]
     5a8:	755e      	strb	r6, [r3, #21]
     5aa:	71da      	strb	r2, [r3, #7]
     5ac:	3d01      	subs	r5, #1
     5ae:	d2f3      	bcs.n	598 <set_voltage+0x20>
     5b0:	2180      	movs	r1, #128	; 0x80
     5b2:	0109      	lsls	r1, r1, #4
     5b4:	71dc      	strb	r4, [r3, #7]
     5b6:	4039      	ands	r1, r7
     5b8:	719a      	strb	r2, [r3, #6]
     5ba:	719c      	strb	r4, [r3, #6]
     5bc:	42a1      	cmp	r1, r4
     5be:	d004      	beq.n	5ca <set_voltage+0x52>
     5c0:	725c      	strb	r4, [r3, #9]
     5c2:	745a      	strb	r2, [r3, #17]
     5c4:	4b0e      	ldr	r3, [pc, #56]	; (600 <set_voltage+0x88>)
     5c6:	801a      	strh	r2, [r3, #0]
     5c8:	e001      	b.n	5ce <set_voltage+0x56>
     5ca:	725a      	strb	r2, [r3, #9]
     5cc:	7459      	strb	r1, [r3, #17]
     5ce:	23a0      	movs	r3, #160	; 0xa0
     5d0:	2100      	movs	r1, #0
     5d2:	b200      	sxth	r0, r0
     5d4:	05db      	lsls	r3, r3, #23
     5d6:	2201      	movs	r2, #1
     5d8:	4288      	cmp	r0, r1
     5da:	da04      	bge.n	5e6 <set_voltage+0x6e>
     5dc:	7219      	strb	r1, [r3, #8]
     5de:	72da      	strb	r2, [r3, #11]
     5e0:	4b07      	ldr	r3, [pc, #28]	; (600 <set_voltage+0x88>)
     5e2:	805a      	strh	r2, [r3, #2]
     5e4:	e001      	b.n	5ea <set_voltage+0x72>
     5e6:	721a      	strb	r2, [r3, #8]
     5e8:	72d9      	strb	r1, [r3, #11]
     5ea:	2028      	movs	r0, #40	; 0x28
     5ec:	f000 f962 	bl	8b4 <delay>
     5f0:	2000      	movs	r0, #0
     5f2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     5f4:	10000008 	andne	r0, r0, r8
     5f8:	fffff0f0 			; <UNDEFINED> instruction: 0xfffff0f0
     5fc:	00000f0f 	andeq	r0, r0, pc, lsl #30
     600:	1000000a 	andne	r0, r0, sl

00000604 <get_pg_state>:
     604:	1c03      	adds	r3, r0, #0
     606:	2001      	movs	r0, #1
     608:	4283      	cmp	r3, r0
     60a:	d803      	bhi.n	614 <get_pg_state+0x10>
     60c:	1ac0      	subs	r0, r0, r3
     60e:	4b02      	ldr	r3, [pc, #8]	; (618 <get_pg_state+0x14>)
     610:	0040      	lsls	r0, r0, #1
     612:	5c18      	ldrb	r0, [r3, r0]
     614:	4770      	bx	lr
     616:	46c0      	nop			; (mov r8, r8)
     618:	1000000a 	andne	r0, r0, sl

0000061c <iap_readserialid>:
     61c:	233a      	movs	r3, #58	; 0x3a
     61e:	b530      	push	{r4, r5, lr}
     620:	b08b      	sub	sp, #44	; 0x2c
     622:	9300      	str	r3, [sp, #0]
     624:	1c04      	adds	r4, r0, #0
     626:	a905      	add	r1, sp, #20
     628:	4668      	mov	r0, sp
     62a:	4b17      	ldr	r3, [pc, #92]	; (688 <iap_readserialid+0x6c>)
     62c:	4798      	blx	r3
     62e:	9d05      	ldr	r5, [sp, #20]
     630:	2001      	movs	r0, #1
     632:	2d00      	cmp	r5, #0
     634:	d126      	bne.n	684 <iap_readserialid+0x68>
     636:	9b06      	ldr	r3, [sp, #24]
     638:	1c20      	adds	r0, r4, #0
     63a:	0c1a      	lsrs	r2, r3, #16
     63c:	0619      	lsls	r1, r3, #24
     63e:	b29b      	uxth	r3, r3
     640:	0c09      	lsrs	r1, r1, #16
     642:	0a1b      	lsrs	r3, r3, #8
     644:	430b      	orrs	r3, r1
     646:	0a11      	lsrs	r1, r2, #8
     648:	0612      	lsls	r2, r2, #24
     64a:	0c12      	lsrs	r2, r2, #16
     64c:	430a      	orrs	r2, r1
     64e:	041b      	lsls	r3, r3, #16
     650:	4313      	orrs	r3, r2
     652:	a906      	add	r1, sp, #24
     654:	2204      	movs	r2, #4
     656:	9306      	str	r3, [sp, #24]
     658:	f000 ff4c 	bl	14f4 <memcpy>
     65c:	9b07      	ldr	r3, [sp, #28]
     65e:	1d20      	adds	r0, r4, #4
     660:	0c1a      	lsrs	r2, r3, #16
     662:	0619      	lsls	r1, r3, #24
     664:	b29b      	uxth	r3, r3
     666:	0c09      	lsrs	r1, r1, #16
     668:	0a1b      	lsrs	r3, r3, #8
     66a:	430b      	orrs	r3, r1
     66c:	0a11      	lsrs	r1, r2, #8
     66e:	0612      	lsls	r2, r2, #24
     670:	0c12      	lsrs	r2, r2, #16
     672:	430a      	orrs	r2, r1
     674:	041b      	lsls	r3, r3, #16
     676:	4313      	orrs	r3, r2
     678:	a907      	add	r1, sp, #28
     67a:	2204      	movs	r2, #4
     67c:	9307      	str	r3, [sp, #28]
     67e:	f000 ff39 	bl	14f4 <memcpy>
     682:	1c28      	adds	r0, r5, #0
     684:	b00b      	add	sp, #44	; 0x2c
     686:	bd30      	pop	{r4, r5, pc}
     688:	1fff1ff1 	svcne	0x00ff1ff1

0000068c <led_blink_12v_1f>:
     68c:	21a0      	movs	r1, #160	; 0xa0
     68e:	4b05      	ldr	r3, [pc, #20]	; (6a4 <led_blink_12v_1f+0x18>)
     690:	05c9      	lsls	r1, r1, #23
     692:	781a      	ldrb	r2, [r3, #0]
     694:	2000      	movs	r0, #0
     696:	2a00      	cmp	r2, #0
     698:	d100      	bne.n	69c <led_blink_12v_1f+0x10>
     69a:	2001      	movs	r0, #1
     69c:	43d2      	mvns	r2, r2
     69e:	7048      	strb	r0, [r1, #1]
     6a0:	701a      	strb	r2, [r3, #0]
     6a2:	4770      	bx	lr
     6a4:	1000000e 	andne	r0, r0, lr

000006a8 <led_blink_12v_2t>:
     6a8:	21a0      	movs	r1, #160	; 0xa0
     6aa:	4b05      	ldr	r3, [pc, #20]	; (6c0 <led_blink_12v_2t+0x18>)
     6ac:	05c9      	lsls	r1, r1, #23
     6ae:	781a      	ldrb	r2, [r3, #0]
     6b0:	2000      	movs	r0, #0
     6b2:	2a00      	cmp	r2, #0
     6b4:	d100      	bne.n	6b8 <led_blink_12v_2t+0x10>
     6b6:	2001      	movs	r0, #1
     6b8:	43d2      	mvns	r2, r2
     6ba:	7108      	strb	r0, [r1, #4]
     6bc:	701a      	strb	r2, [r3, #0]
     6be:	4770      	bx	lr
     6c0:	1000000f 	andne	r0, r0, pc

000006c4 <led_blink_12v_2f>:
     6c4:	21a0      	movs	r1, #160	; 0xa0
     6c6:	4b05      	ldr	r3, [pc, #20]	; (6dc <led_blink_12v_2f+0x18>)
     6c8:	05c9      	lsls	r1, r1, #23
     6ca:	781a      	ldrb	r2, [r3, #0]
     6cc:	2000      	movs	r0, #0
     6ce:	2a00      	cmp	r2, #0
     6d0:	d100      	bne.n	6d4 <led_blink_12v_2f+0x10>
     6d2:	2001      	movs	r0, #1
     6d4:	43d2      	mvns	r2, r2
     6d6:	7148      	strb	r0, [r1, #5]
     6d8:	701a      	strb	r2, [r3, #0]
     6da:	4770      	bx	lr
     6dc:	10000014 	andne	r0, r0, r4, lsl r0

000006e0 <led_blink_12v_1t>:
     6e0:	21a0      	movs	r1, #160	; 0xa0
     6e2:	4b05      	ldr	r3, [pc, #20]	; (6f8 <led_blink_12v_1t+0x18>)
     6e4:	05c9      	lsls	r1, r1, #23
     6e6:	781a      	ldrb	r2, [r3, #0]
     6e8:	2000      	movs	r0, #0
     6ea:	2a00      	cmp	r2, #0
     6ec:	d100      	bne.n	6f0 <led_blink_12v_1t+0x10>
     6ee:	2001      	movs	r0, #1
     6f0:	43d2      	mvns	r2, r2
     6f2:	7008      	strb	r0, [r1, #0]
     6f4:	701a      	strb	r2, [r3, #0]
     6f6:	4770      	bx	lr
     6f8:	10000015 	andne	r0, r0, r5, lsl r0

000006fc <led_init>:
     6fc:	2100      	movs	r1, #0
     6fe:	b538      	push	{r3, r4, r5, lr}
     700:	2580      	movs	r5, #128	; 0x80
     702:	4c1d      	ldr	r4, [pc, #116]	; (778 <led_init+0x7c>)
     704:	1c0a      	adds	r2, r1, #0
     706:	1c20      	adds	r0, r4, #0
     708:	2311      	movs	r3, #17
     70a:	f000 fd19 	bl	1140 <Chip_IOCON_PinMuxSet>
     70e:	006d      	lsls	r5, r5, #1
     710:	1c20      	adds	r0, r4, #0
     712:	2100      	movs	r1, #0
     714:	2201      	movs	r2, #1
     716:	2310      	movs	r3, #16
     718:	f000 fd12 	bl	1140 <Chip_IOCON_PinMuxSet>
     71c:	1c20      	adds	r0, r4, #0
     71e:	1c2b      	adds	r3, r5, #0
     720:	2100      	movs	r1, #0
     722:	2204      	movs	r2, #4
     724:	f000 fd0c 	bl	1140 <Chip_IOCON_PinMuxSet>
     728:	1c20      	adds	r0, r4, #0
     72a:	1c2b      	adds	r3, r5, #0
     72c:	2100      	movs	r1, #0
     72e:	2205      	movs	r2, #5
     730:	f000 fd06 	bl	1140 <Chip_IOCON_PinMuxSet>
     734:	24a0      	movs	r4, #160	; 0xa0
     736:	2380      	movs	r3, #128	; 0x80
     738:	2102      	movs	r1, #2
     73a:	05e4      	lsls	r4, r4, #23
     73c:	019b      	lsls	r3, r3, #6
     73e:	58e2      	ldr	r2, [r4, r3]
     740:	3dff      	subs	r5, #255	; 0xff
     742:	432a      	orrs	r2, r5
     744:	50e2      	str	r2, [r4, r3]
     746:	58e2      	ldr	r2, [r4, r3]
     748:	20fa      	movs	r0, #250	; 0xfa
     74a:	430a      	orrs	r2, r1
     74c:	50e2      	str	r2, [r4, r3]
     74e:	58e2      	ldr	r2, [r4, r3]
     750:	310e      	adds	r1, #14
     752:	430a      	orrs	r2, r1
     754:	50e2      	str	r2, [r4, r3]
     756:	58e2      	ldr	r2, [r4, r3]
     758:	3110      	adds	r1, #16
     75a:	430a      	orrs	r2, r1
     75c:	50e2      	str	r2, [r4, r3]
     75e:	2300      	movs	r3, #0
     760:	0080      	lsls	r0, r0, #2
     762:	7023      	strb	r3, [r4, #0]
     764:	7063      	strb	r3, [r4, #1]
     766:	7123      	strb	r3, [r4, #4]
     768:	7163      	strb	r3, [r4, #5]
     76a:	f000 f8a3 	bl	8b4 <delay>
     76e:	7025      	strb	r5, [r4, #0]
     770:	7065      	strb	r5, [r4, #1]
     772:	7125      	strb	r5, [r4, #4]
     774:	7165      	strb	r5, [r4, #5]
     776:	bd38      	pop	{r3, r4, r5, pc}
     778:	40044000 	andmi	r4, r4, r0

0000077c <set_led_state>:
     77c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
     77e:	ba45      	rev16	r5, r0
     780:	b2ad      	uxth	r5, r5
     782:	4e40      	ldr	r6, [pc, #256]	; (884 <set_led_state+0x108>)
     784:	b2eb      	uxtb	r3, r5
     786:	8033      	strh	r3, [r6, #0]
     788:	4c3f      	ldr	r4, [pc, #252]	; (888 <set_led_state+0x10c>)
     78a:	2302      	movs	r3, #2
     78c:	072a      	lsls	r2, r5, #28
     78e:	d509      	bpl.n	7a4 <set_led_state+0x28>
     790:	21fa      	movs	r1, #250	; 0xfa
     792:	6822      	ldr	r2, [r4, #0]
     794:	2003      	movs	r0, #3
     796:	4313      	orrs	r3, r2
     798:	0049      	lsls	r1, r1, #1
     79a:	4a3c      	ldr	r2, [pc, #240]	; (88c <set_led_state+0x110>)
     79c:	6023      	str	r3, [r4, #0]
     79e:	f000 fb3f 	bl	e20 <timer_set>
     7a2:	e009      	b.n	7b8 <set_led_state+0x3c>
     7a4:	6822      	ldr	r2, [r4, #0]
     7a6:	2003      	movs	r0, #3
     7a8:	439a      	bics	r2, r3
     7aa:	6022      	str	r2, [r4, #0]
     7ac:	f000 fb48 	bl	e40 <timer_kill>
     7b0:	23a0      	movs	r3, #160	; 0xa0
     7b2:	2201      	movs	r2, #1
     7b4:	05db      	lsls	r3, r3, #23
     7b6:	705a      	strb	r2, [r3, #1]
     7b8:	8833      	ldrh	r3, [r6, #0]
     7ba:	2701      	movs	r7, #1
     7bc:	075b      	lsls	r3, r3, #29
     7be:	d509      	bpl.n	7d4 <set_led_state+0x58>
     7c0:	21fa      	movs	r1, #250	; 0xfa
     7c2:	6823      	ldr	r3, [r4, #0]
     7c4:	2002      	movs	r0, #2
     7c6:	431f      	orrs	r7, r3
     7c8:	0049      	lsls	r1, r1, #1
     7ca:	4a31      	ldr	r2, [pc, #196]	; (890 <set_led_state+0x114>)
     7cc:	6027      	str	r7, [r4, #0]
     7ce:	f000 fb27 	bl	e20 <timer_set>
     7d2:	e008      	b.n	7e6 <set_led_state+0x6a>
     7d4:	6823      	ldr	r3, [r4, #0]
     7d6:	2002      	movs	r0, #2
     7d8:	43bb      	bics	r3, r7
     7da:	6023      	str	r3, [r4, #0]
     7dc:	f000 fb30 	bl	e40 <timer_kill>
     7e0:	23a0      	movs	r3, #160	; 0xa0
     7e2:	05db      	lsls	r3, r3, #23
     7e4:	701f      	strb	r7, [r3, #0]
     7e6:	23a0      	movs	r3, #160	; 0xa0
     7e8:	8831      	ldrh	r1, [r6, #0]
     7ea:	05db      	lsls	r3, r3, #23
     7ec:	2201      	movs	r2, #1
     7ee:	0788      	lsls	r0, r1, #30
     7f0:	d502      	bpl.n	7f8 <set_led_state+0x7c>
     7f2:	2000      	movs	r0, #0
     7f4:	7058      	strb	r0, [r3, #1]
     7f6:	e000      	b.n	7fa <set_led_state+0x7e>
     7f8:	705a      	strb	r2, [r3, #1]
     7fa:	4211      	tst	r1, r2
     7fc:	d001      	beq.n	802 <set_led_state+0x86>
     7fe:	2200      	movs	r2, #0
     800:	e000      	b.n	804 <set_led_state+0x88>
     802:	2201      	movs	r2, #1
     804:	701a      	strb	r2, [r3, #0]
     806:	2308      	movs	r3, #8
     808:	0a2d      	lsrs	r5, r5, #8
     80a:	8075      	strh	r5, [r6, #2]
     80c:	6822      	ldr	r2, [r4, #0]
     80e:	421d      	tst	r5, r3
     810:	d008      	beq.n	824 <set_led_state+0xa8>
     812:	21fa      	movs	r1, #250	; 0xfa
     814:	4313      	orrs	r3, r2
     816:	2005      	movs	r0, #5
     818:	0049      	lsls	r1, r1, #1
     81a:	4a1e      	ldr	r2, [pc, #120]	; (894 <set_led_state+0x118>)
     81c:	6023      	str	r3, [r4, #0]
     81e:	f000 faff 	bl	e20 <timer_set>
     822:	e008      	b.n	836 <set_led_state+0xba>
     824:	439a      	bics	r2, r3
     826:	2005      	movs	r0, #5
     828:	6022      	str	r2, [r4, #0]
     82a:	f000 fb09 	bl	e40 <timer_kill>
     82e:	23a0      	movs	r3, #160	; 0xa0
     830:	2201      	movs	r2, #1
     832:	05db      	lsls	r3, r3, #23
     834:	715a      	strb	r2, [r3, #5]
     836:	2004      	movs	r0, #4
     838:	8873      	ldrh	r3, [r6, #2]
     83a:	4203      	tst	r3, r0
     83c:	d008      	beq.n	850 <set_led_state+0xd4>
     83e:	21fa      	movs	r1, #250	; 0xfa
     840:	6823      	ldr	r3, [r4, #0]
     842:	0049      	lsls	r1, r1, #1
     844:	4303      	orrs	r3, r0
     846:	4a14      	ldr	r2, [pc, #80]	; (898 <set_led_state+0x11c>)
     848:	6023      	str	r3, [r4, #0]
     84a:	f000 fae9 	bl	e20 <timer_set>
     84e:	e008      	b.n	862 <set_led_state+0xe6>
     850:	6823      	ldr	r3, [r4, #0]
     852:	4383      	bics	r3, r0
     854:	6023      	str	r3, [r4, #0]
     856:	f000 faf3 	bl	e40 <timer_kill>
     85a:	23a0      	movs	r3, #160	; 0xa0
     85c:	2201      	movs	r2, #1
     85e:	05db      	lsls	r3, r3, #23
     860:	711a      	strb	r2, [r3, #4]
     862:	23a0      	movs	r3, #160	; 0xa0
     864:	8871      	ldrh	r1, [r6, #2]
     866:	05db      	lsls	r3, r3, #23
     868:	2201      	movs	r2, #1
     86a:	0788      	lsls	r0, r1, #30
     86c:	d502      	bpl.n	874 <set_led_state+0xf8>
     86e:	2000      	movs	r0, #0
     870:	7158      	strb	r0, [r3, #5]
     872:	e000      	b.n	876 <set_led_state+0xfa>
     874:	715a      	strb	r2, [r3, #5]
     876:	4211      	tst	r1, r2
     878:	d001      	beq.n	87e <set_led_state+0x102>
     87a:	2200      	movs	r2, #0
     87c:	e000      	b.n	880 <set_led_state+0x104>
     87e:	2201      	movs	r2, #1
     880:	711a      	strb	r2, [r3, #4]
     882:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
     884:	10000010 	andne	r0, r0, r0, lsl r0
     888:	10000018 	andne	r0, r0, r8, lsl r0
     88c:	0000068d 	andeq	r0, r0, sp, lsl #13
     890:	000006e1 	andeq	r0, r0, r1, ror #13
     894:	000006c5 	andeq	r0, r0, r5, asr #13
     898:	000006a9 	andeq	r0, r0, r9, lsr #13

0000089c <get_led_state>:
     89c:	2300      	movs	r3, #0
     89e:	2801      	cmp	r0, #1
     8a0:	d804      	bhi.n	8ac <get_led_state+0x10>
     8a2:	3301      	adds	r3, #1
     8a4:	1a18      	subs	r0, r3, r0
     8a6:	4098      	lsls	r0, r3
     8a8:	4b01      	ldr	r3, [pc, #4]	; (8b0 <get_led_state+0x14>)
     8aa:	5ac3      	ldrh	r3, [r0, r3]
     8ac:	1c18      	adds	r0, r3, #0
     8ae:	4770      	bx	lr
     8b0:	10000010 	andne	r0, r0, r0, lsl r0

000008b4 <delay>:
     8b4:	2800      	cmp	r0, #0
     8b6:	d007      	beq.n	8c8 <delay+0x14>
     8b8:	2396      	movs	r3, #150	; 0x96
     8ba:	3801      	subs	r0, #1
     8bc:	015b      	lsls	r3, r3, #5
     8be:	46c0      	nop			; (mov r8, r8)
     8c0:	3b01      	subs	r3, #1
     8c2:	2b00      	cmp	r3, #0
     8c4:	d1fb      	bne.n	8be <delay+0xa>
     8c6:	e7f5      	b.n	8b4 <delay>
     8c8:	4770      	bx	lr
	...

000008cc <WDT_IRQHandler>:
     8cc:	2104      	movs	r1, #4
     8ce:	4804      	ldr	r0, [pc, #16]	; (8e0 <WDT_IRQHandler+0x14>)
     8d0:	b508      	push	{r3, lr}
     8d2:	6803      	ldr	r3, [r0, #0]
     8d4:	420b      	tst	r3, r1
     8d6:	d001      	beq.n	8dc <WDT_IRQHandler+0x10>
     8d8:	f000 fc38 	bl	114c <Chip_WWDT_ClearStatusFlag>
     8dc:	bd08      	pop	{r3, pc}
     8de:	46c0      	nop			; (mov r8, r8)
     8e0:	40004000 	andmi	r4, r0, r0

000008e4 <main>:
     8e4:	b5f0      	push	{r4, r5, r6, r7, lr}
     8e6:	b08b      	sub	sp, #44	; 0x2c
     8e8:	f000 fac2 	bl	e70 <Board_Init>
     8ec:	f000 fc20 	bl	1130 <SystemCoreClockUpdate>
     8f0:	f000 fa5c 	bl	dac <timer_init>
     8f4:	f7ff ff02 	bl	6fc <led_init>
     8f8:	f7ff fd34 	bl	364 <adc_init>
     8fc:	f000 f98a 	bl	c14 <uart_init>
     900:	f7ff fda8 	bl	454 <vcore_init>
     904:	2000      	movs	r0, #0
     906:	49b4      	ldr	r1, [pc, #720]	; (bd8 <main+0x2f4>)
     908:	1c02      	adds	r2, r0, #0
     90a:	f000 fa89 	bl	e20 <timer_set>
     90e:	21fa      	movs	r1, #250	; 0xfa
     910:	2001      	movs	r0, #1
     912:	0089      	lsls	r1, r1, #2
     914:	2200      	movs	r2, #0
     916:	f000 fa83 	bl	e20 <timer_set>
     91a:	2400      	movs	r4, #0
     91c:	2c01      	cmp	r4, #1
     91e:	d100      	bne.n	922 <main+0x3e>
     920:	e0d6      	b.n	ad0 <main+0x1ec>
     922:	f000 f9d1 	bl	cc8 <uart_rxrb_cnt>
     926:	2827      	cmp	r0, #39	; 0x27
     928:	d800      	bhi.n	92c <main+0x48>
     92a:	e0cc      	b.n	ac6 <main+0x1e2>
     92c:	4dab      	ldr	r5, [pc, #684]	; (bdc <main+0x2f8>)
     92e:	2100      	movs	r1, #0
     930:	2228      	movs	r2, #40	; 0x28
     932:	1c28      	adds	r0, r5, #0
     934:	f000 fde2 	bl	14fc <memset>
     938:	1c28      	adds	r0, r5, #0
     93a:	2128      	movs	r1, #40	; 0x28
     93c:	f000 f9cc 	bl	cd8 <uart_read>
     940:	2400      	movs	r4, #0
     942:	1e06      	subs	r6, r0, #0
     944:	2e28      	cmp	r6, #40	; 0x28
     946:	d000      	beq.n	94a <main+0x66>
     948:	e0ca      	b.n	ae0 <main+0x1fc>
     94a:	1deb      	adds	r3, r5, #7
     94c:	7fdf      	ldrb	r7, [r3, #31]
     94e:	1c2b      	adds	r3, r5, #0
     950:	3308      	adds	r3, #8
     952:	7fdb      	ldrb	r3, [r3, #31]
     954:	023f      	lsls	r7, r7, #8
     956:	1da8      	adds	r0, r5, #6
     958:	2120      	movs	r1, #32
     95a:	431f      	orrs	r7, r3
     95c:	f7ff fcea 	bl	334 <crc16>
     960:	4287      	cmp	r7, r0
     962:	d000      	beq.n	966 <main+0x82>
     964:	e0af      	b.n	ac6 <main+0x1e2>
     966:	1c20      	adds	r0, r4, #0
     968:	499b      	ldr	r1, [pc, #620]	; (bd8 <main+0x2f4>)
     96a:	1c22      	adds	r2, r4, #0
     96c:	f000 fa58 	bl	e20 <timer_set>
     970:	78ab      	ldrb	r3, [r5, #2]
     972:	2b22      	cmp	r3, #34	; 0x22
     974:	d100      	bne.n	978 <main+0x94>
     976:	e07f      	b.n	a78 <main+0x194>
     978:	d82e      	bhi.n	9d8 <main+0xf4>
     97a:	2b10      	cmp	r3, #16
     97c:	d000      	beq.n	980 <main+0x9c>
     97e:	e0a2      	b.n	ac6 <main+0x1e2>
     980:	4d97      	ldr	r5, [pc, #604]	; (be0 <main+0x2fc>)
     982:	1c21      	adds	r1, r4, #0
     984:	1c32      	adds	r2, r6, #0
     986:	1c28      	adds	r0, r5, #0
     988:	f000 fdb8 	bl	14fc <memset>
     98c:	1daf      	adds	r7, r5, #6
     98e:	4895      	ldr	r0, [pc, #596]	; (be4 <main+0x300>)
     990:	f7ff fe44 	bl	61c <iap_readserialid>
     994:	4993      	ldr	r1, [pc, #588]	; (be4 <main+0x300>)
     996:	2208      	movs	r2, #8
     998:	1c38      	adds	r0, r7, #0
     99a:	f000 fdab 	bl	14f4 <memcpy>
     99e:	1c28      	adds	r0, r5, #0
     9a0:	220f      	movs	r2, #15
     9a2:	4991      	ldr	r1, [pc, #580]	; (be8 <main+0x304>)
     9a4:	300e      	adds	r0, #14
     9a6:	f000 fda5 	bl	14f4 <memcpy>
     9aa:	2343      	movs	r3, #67	; 0x43
     9ac:	702b      	strb	r3, [r5, #0]
     9ae:	330b      	adds	r3, #11
     9b0:	706b      	strb	r3, [r5, #1]
     9b2:	3b0e      	subs	r3, #14
     9b4:	70ab      	strb	r3, [r5, #2]
     9b6:	3b3f      	subs	r3, #63	; 0x3f
     9b8:	712b      	strb	r3, [r5, #4]
     9ba:	716b      	strb	r3, [r5, #5]
     9bc:	2120      	movs	r1, #32
     9be:	70ec      	strb	r4, [r5, #3]
     9c0:	1c38      	adds	r0, r7, #0
     9c2:	f7ff fcb7 	bl	334 <crc16>
     9c6:	1deb      	adds	r3, r5, #7
     9c8:	0a02      	lsrs	r2, r0, #8
     9ca:	77da      	strb	r2, [r3, #31]
     9cc:	1c2b      	adds	r3, r5, #0
     9ce:	3308      	adds	r3, #8
     9d0:	77d8      	strb	r0, [r3, #31]
     9d2:	1c31      	adds	r1, r6, #0
     9d4:	1c28      	adds	r0, r5, #0
     9d6:	e04c      	b.n	a72 <main+0x18e>
     9d8:	2b24      	cmp	r3, #36	; 0x24
     9da:	d054      	beq.n	a86 <main+0x1a2>
     9dc:	2b30      	cmp	r3, #48	; 0x30
     9de:	d172      	bne.n	ac6 <main+0x1e2>
     9e0:	4d7f      	ldr	r5, [pc, #508]	; (be0 <main+0x2fc>)
     9e2:	1c32      	adds	r2, r6, #0
     9e4:	1c28      	adds	r0, r5, #0
     9e6:	1c21      	adds	r1, r4, #0
     9e8:	f000 fd88 	bl	14fc <memset>
     9ec:	1c2e      	adds	r6, r5, #0
     9ee:	4b7f      	ldr	r3, [pc, #508]	; (bec <main+0x308>)
     9f0:	5ae2      	ldrh	r2, [r4, r3]
     9f2:	1933      	adds	r3, r6, r4
     9f4:	0a11      	lsrs	r1, r2, #8
     9f6:	3402      	adds	r4, #2
     9f8:	7199      	strb	r1, [r3, #6]
     9fa:	71da      	strb	r2, [r3, #7]
     9fc:	2c0e      	cmp	r4, #14
     9fe:	d1f6      	bne.n	9ee <main+0x10a>
     a00:	2400      	movs	r4, #0
     a02:	2000      	movs	r0, #0
     a04:	f7ff fdfe 	bl	604 <get_pg_state>
     a08:	1c20      	adds	r0, r4, #0
     a0a:	752c      	strb	r4, [r5, #20]
     a0c:	f7ff fdfa 	bl	604 <get_pg_state>
     a10:	7568      	strb	r0, [r5, #21]
     a12:	2001      	movs	r0, #1
     a14:	f7ff fdf6 	bl	604 <get_pg_state>
     a18:	2001      	movs	r0, #1
     a1a:	75ac      	strb	r4, [r5, #22]
     a1c:	f7ff fdf2 	bl	604 <get_pg_state>
     a20:	75e8      	strb	r0, [r5, #23]
     a22:	1c20      	adds	r0, r4, #0
     a24:	f7ff ff3a 	bl	89c <get_led_state>
     a28:	0a00      	lsrs	r0, r0, #8
     a2a:	7628      	strb	r0, [r5, #24]
     a2c:	1c20      	adds	r0, r4, #0
     a2e:	f7ff ff35 	bl	89c <get_led_state>
     a32:	7668      	strb	r0, [r5, #25]
     a34:	2001      	movs	r0, #1
     a36:	f7ff ff31 	bl	89c <get_led_state>
     a3a:	0a00      	lsrs	r0, r0, #8
     a3c:	76a8      	strb	r0, [r5, #26]
     a3e:	2001      	movs	r0, #1
     a40:	f7ff ff2c 	bl	89c <get_led_state>
     a44:	2343      	movs	r3, #67	; 0x43
     a46:	702b      	strb	r3, [r5, #0]
     a48:	330b      	adds	r3, #11
     a4a:	706b      	strb	r3, [r5, #1]
     a4c:	3b06      	subs	r3, #6
     a4e:	70ab      	strb	r3, [r5, #2]
     a50:	3b47      	subs	r3, #71	; 0x47
     a52:	76e8      	strb	r0, [r5, #27]
     a54:	712b      	strb	r3, [r5, #4]
     a56:	716b      	strb	r3, [r5, #5]
     a58:	2120      	movs	r1, #32
     a5a:	70ec      	strb	r4, [r5, #3]
     a5c:	1db0      	adds	r0, r6, #6
     a5e:	f7ff fc69 	bl	334 <crc16>
     a62:	1df3      	adds	r3, r6, #7
     a64:	0a02      	lsrs	r2, r0, #8
     a66:	77da      	strb	r2, [r3, #31]
     a68:	1c33      	adds	r3, r6, #0
     a6a:	3308      	adds	r3, #8
     a6c:	77d8      	strb	r0, [r3, #31]
     a6e:	2128      	movs	r1, #40	; 0x28
     a70:	1c30      	adds	r0, r6, #0
     a72:	f000 f965 	bl	d40 <uart_write>
     a76:	e026      	b.n	ac6 <main+0x1e2>
     a78:	79a8      	ldrb	r0, [r5, #6]
     a7a:	79eb      	ldrb	r3, [r5, #7]
     a7c:	0200      	lsls	r0, r0, #8
     a7e:	4318      	orrs	r0, r3
     a80:	f7ff fd7a 	bl	578 <set_voltage>
     a84:	e01f      	b.n	ac6 <main+0x1e2>
     a86:	78eb      	ldrb	r3, [r5, #3]
     a88:	2b00      	cmp	r3, #0
     a8a:	d106      	bne.n	a9a <main+0x1b6>
     a8c:	79a8      	ldrb	r0, [r5, #6]
     a8e:	79eb      	ldrb	r3, [r5, #7]
     a90:	0200      	lsls	r0, r0, #8
     a92:	4318      	orrs	r0, r3
     a94:	f7ff fe72 	bl	77c <set_led_state>
     a98:	e015      	b.n	ac6 <main+0x1e2>
     a9a:	2b01      	cmp	r3, #1
     a9c:	d113      	bne.n	ac6 <main+0x1e2>
     a9e:	79a8      	ldrb	r0, [r5, #6]
     aa0:	79eb      	ldrb	r3, [r5, #7]
     aa2:	0600      	lsls	r0, r0, #24
     aa4:	041b      	lsls	r3, r3, #16
     aa6:	4318      	orrs	r0, r3
     aa8:	7a6b      	ldrb	r3, [r5, #9]
     aaa:	4318      	orrs	r0, r3
     aac:	7a2b      	ldrb	r3, [r5, #8]
     aae:	021b      	lsls	r3, r3, #8
     ab0:	4318      	orrs	r0, r3
     ab2:	f000 fe84 	bl	17be <__aeabi_i2d>
     ab6:	4b4e      	ldr	r3, [pc, #312]	; (bf0 <main+0x30c>)
     ab8:	4a4e      	ldr	r2, [pc, #312]	; (bf4 <main+0x310>)
     aba:	f000 fd65 	bl	1588 <__aeabi_dmul>
     abe:	f000 fe1f 	bl	1700 <__aeabi_d2f>
     ac2:	4b4d      	ldr	r3, [pc, #308]	; (bf8 <main+0x314>)
     ac4:	6018      	str	r0, [r3, #0]
     ac6:	2000      	movs	r0, #0
     ac8:	f000 f9c6 	bl	e58 <timer_istimeout>
     acc:	1c04      	adds	r4, r0, #0
     ace:	e007      	b.n	ae0 <main+0x1fc>
     ad0:	f000 f8fa 	bl	cc8 <uart_rxrb_cnt>
     ad4:	2400      	movs	r4, #0
     ad6:	2327      	movs	r3, #39	; 0x27
     ad8:	4283      	cmp	r3, r0
     ada:	4164      	adcs	r4, r4
     adc:	b2e4      	uxtb	r4, r4
     ade:	bf30      	wfi
     ae0:	2001      	movs	r0, #1
     ae2:	f000 f9b9 	bl	e58 <timer_istimeout>
     ae6:	2800      	cmp	r0, #0
     ae8:	d100      	bne.n	aec <main+0x208>
     aea:	e717      	b.n	91c <main+0x38>
     aec:	4e43      	ldr	r6, [pc, #268]	; (bfc <main+0x318>)
     aee:	4d44      	ldr	r5, [pc, #272]	; (c00 <main+0x31c>)
     af0:	8831      	ldrh	r1, [r6, #0]
     af2:	2003      	movs	r0, #3
     af4:	0049      	lsls	r1, r1, #1
     af6:	1869      	adds	r1, r5, r1
     af8:	f7ff fc64 	bl	3c4 <adc_read>
     afc:	8831      	ldrh	r1, [r6, #0]
     afe:	2006      	movs	r0, #6
     b00:	3103      	adds	r1, #3
     b02:	0049      	lsls	r1, r1, #1
     b04:	1869      	adds	r1, r5, r1
     b06:	f7ff fc5d 	bl	3c4 <adc_read>
     b0a:	8831      	ldrh	r1, [r6, #0]
     b0c:	2005      	movs	r0, #5
     b0e:	3106      	adds	r1, #6
     b10:	0049      	lsls	r1, r1, #1
     b12:	1869      	adds	r1, r5, r1
     b14:	f7ff fc56 	bl	3c4 <adc_read>
     b18:	8831      	ldrh	r1, [r6, #0]
     b1a:	2005      	movs	r0, #5
     b1c:	3109      	adds	r1, #9
     b1e:	0049      	lsls	r1, r1, #1
     b20:	1869      	adds	r1, r5, r1
     b22:	f7ff fc4f 	bl	3c4 <adc_read>
     b26:	8831      	ldrh	r1, [r6, #0]
     b28:	2001      	movs	r0, #1
     b2a:	310c      	adds	r1, #12
     b2c:	0049      	lsls	r1, r1, #1
     b2e:	1869      	adds	r1, r5, r1
     b30:	f7ff fc48 	bl	3c4 <adc_read>
     b34:	8831      	ldrh	r1, [r6, #0]
     b36:	2002      	movs	r0, #2
     b38:	310f      	adds	r1, #15
     b3a:	0049      	lsls	r1, r1, #1
     b3c:	1869      	adds	r1, r5, r1
     b3e:	f7ff fc41 	bl	3c4 <adc_read>
     b42:	8831      	ldrh	r1, [r6, #0]
     b44:	2007      	movs	r0, #7
     b46:	3112      	adds	r1, #18
     b48:	0049      	lsls	r1, r1, #1
     b4a:	1869      	adds	r1, r5, r1
     b4c:	f7ff fc3a 	bl	3c4 <adc_read>
     b50:	8833      	ldrh	r3, [r6, #0]
     b52:	1c28      	adds	r0, r5, #0
     b54:	3301      	adds	r3, #1
     b56:	b29b      	uxth	r3, r3
     b58:	2b02      	cmp	r3, #2
     b5a:	d900      	bls.n	b5e <main+0x27a>
     b5c:	2300      	movs	r3, #0
     b5e:	2200      	movs	r2, #0
     b60:	8033      	strh	r3, [r6, #0]
     b62:	2300      	movs	r3, #0
     b64:	ad03      	add	r5, sp, #12
     b66:	5153      	str	r3, [r2, r5]
     b68:	3204      	adds	r2, #4
     b6a:	2a1c      	cmp	r2, #28
     b6c:	d1f9      	bne.n	b62 <main+0x27e>
     b6e:	2200      	movs	r2, #0
     b70:	2106      	movs	r1, #6
     b72:	4351      	muls	r1, r2
     b74:	0097      	lsls	r7, r2, #2
     b76:	18c6      	adds	r6, r0, r3
     b78:	5a71      	ldrh	r1, [r6, r1]
     b7a:	59ee      	ldr	r6, [r5, r7]
     b7c:	3201      	adds	r2, #1
     b7e:	1989      	adds	r1, r1, r6
     b80:	51e9      	str	r1, [r5, r7]
     b82:	2a07      	cmp	r2, #7
     b84:	d1f4      	bne.n	b70 <main+0x28c>
     b86:	3302      	adds	r3, #2
     b88:	2b06      	cmp	r3, #6
     b8a:	d1f0      	bne.n	b6e <main+0x28a>
     b8c:	2600      	movs	r6, #0
     b8e:	4b1a      	ldr	r3, [pc, #104]	; (bf8 <main+0x314>)
     b90:	681b      	ldr	r3, [r3, #0]
     b92:	9301      	str	r3, [sp, #4]
     b94:	0073      	lsls	r3, r6, #1
     b96:	58e8      	ldr	r0, [r5, r3]
     b98:	2103      	movs	r1, #3
     b9a:	f000 fcba 	bl	1512 <__aeabi_uidiv>
     b9e:	f000 febd 	bl	191c <__aeabi_ui2f>
     ba2:	9901      	ldr	r1, [sp, #4]
     ba4:	f000 fe16 	bl	17d4 <__aeabi_fmul>
     ba8:	f000 fe74 	bl	1894 <__aeabi_f2uiz>
     bac:	4f0f      	ldr	r7, [pc, #60]	; (bec <main+0x308>)
     bae:	53f0      	strh	r0, [r6, r7]
     bb0:	3602      	adds	r6, #2
     bb2:	2e0c      	cmp	r6, #12
     bb4:	d1ee      	bne.n	b94 <main+0x2b0>
     bb6:	2103      	movs	r1, #3
     bb8:	69a8      	ldr	r0, [r5, #24]
     bba:	f000 fcaa 	bl	1512 <__aeabi_uidiv>
     bbe:	f000 fead 	bl	191c <__aeabi_ui2f>
     bc2:	f000 fe67 	bl	1894 <__aeabi_f2uiz>
     bc6:	21fa      	movs	r1, #250	; 0xfa
     bc8:	81b8      	strh	r0, [r7, #12]
     bca:	0089      	lsls	r1, r1, #2
     bcc:	2001      	movs	r0, #1
     bce:	2200      	movs	r2, #0
     bd0:	f000 f926 	bl	e20 <timer_set>
     bd4:	e6a2      	b.n	91c <main+0x38>
     bd6:	46c0      	nop			; (mov r8, r8)
     bd8:	00000bb8 			; <UNDEFINED> instruction: 0x00000bb8
     bdc:	10000076 	andne	r0, r0, r6, ror r0
     be0:	10000024 	andne	r0, r0, r4, lsr #32
     be4:	1000001c 	andne	r0, r0, ip, lsl r0
     be8:	000019ac 	andeq	r1, r0, ip, lsr #19
     bec:	1000009e 	mulne	r0, lr, r0
     bf0:	3f50624d 	svccc	0x0050624d
     bf4:	d2f1a9fc 	rscsle	sl, r1, #252, 18	; 0x3f0000
     bf8:	10000000 	andne	r0, r0, r0
     bfc:	100000ac 	andne	r0, r0, ip, lsr #1
     c00:	1000004c 	andne	r0, r0, ip, asr #32

00000c04 <SystemInit>:
     c04:	b508      	push	{r3, lr}
     c06:	2000      	movs	r0, #0
     c08:	f000 f938 	bl	e7c <System_OscSelect>
     c0c:	f000 f93c 	bl	e88 <Board_SystemInit>
     c10:	bd08      	pop	{r3, pc}
	...

00000c14 <uart_init>:
     c14:	b510      	push	{r4, lr}
     c16:	4c1d      	ldr	r4, [pc, #116]	; (c8c <uart_init+0x78>)
     c18:	2100      	movs	r1, #0
     c1a:	1c20      	adds	r0, r4, #0
     c1c:	2212      	movs	r2, #18
     c1e:	2301      	movs	r3, #1
     c20:	f000 fa8e 	bl	1140 <Chip_IOCON_PinMuxSet>
     c24:	1c20      	adds	r0, r4, #0
     c26:	4c1a      	ldr	r4, [pc, #104]	; (c90 <uart_init+0x7c>)
     c28:	2213      	movs	r2, #19
     c2a:	2301      	movs	r3, #1
     c2c:	2100      	movs	r1, #0
     c2e:	f000 fa87 	bl	1140 <Chip_IOCON_PinMuxSet>
     c32:	1c20      	adds	r0, r4, #0
     c34:	f000 fbae 	bl	1394 <Chip_UART_Init>
     c38:	21e1      	movs	r1, #225	; 0xe1
     c3a:	1c20      	adds	r0, r4, #0
     c3c:	0249      	lsls	r1, r1, #9
     c3e:	f000 fc1b 	bl	1478 <Chip_UART_SetBaudFDR>
     c42:	2303      	movs	r3, #3
     c44:	60e3      	str	r3, [r4, #12]
     c46:	337e      	adds	r3, #126	; 0x7e
     c48:	60a3      	str	r3, [r4, #8]
     c4a:	3b01      	subs	r3, #1
     c4c:	6323      	str	r3, [r4, #48]	; 0x30
     c4e:	4911      	ldr	r1, [pc, #68]	; (c94 <uart_init+0x80>)
     c50:	2201      	movs	r2, #1
     c52:	3320      	adds	r3, #32
     c54:	4810      	ldr	r0, [pc, #64]	; (c98 <uart_init+0x84>)
     c56:	f000 fab1 	bl	11bc <RingBuffer_Init>
     c5a:	4910      	ldr	r1, [pc, #64]	; (c9c <uart_init+0x88>)
     c5c:	2201      	movs	r2, #1
     c5e:	23a0      	movs	r3, #160	; 0xa0
     c60:	480f      	ldr	r0, [pc, #60]	; (ca0 <uart_init+0x8c>)
     c62:	f000 faab 	bl	11bc <RingBuffer_Init>
     c66:	2205      	movs	r2, #5
     c68:	21c5      	movs	r1, #197	; 0xc5
     c6a:	6863      	ldr	r3, [r4, #4]
     c6c:	0089      	lsls	r1, r1, #2
     c6e:	4313      	orrs	r3, r2
     c70:	4a0c      	ldr	r2, [pc, #48]	; (ca4 <uart_init+0x90>)
     c72:	6063      	str	r3, [r4, #4]
     c74:	5850      	ldr	r0, [r2, r1]
     c76:	4b0c      	ldr	r3, [pc, #48]	; (ca8 <uart_init+0x94>)
     c78:	4003      	ands	r3, r0
     c7a:	2080      	movs	r0, #128	; 0x80
     c7c:	01c0      	lsls	r0, r0, #7
     c7e:	4303      	orrs	r3, r0
     c80:	5053      	str	r3, [r2, r1]
     c82:	2380      	movs	r3, #128	; 0x80
     c84:	039b      	lsls	r3, r3, #14
     c86:	6013      	str	r3, [r2, #0]
     c88:	bd10      	pop	{r4, pc}
     c8a:	46c0      	nop			; (mov r8, r8)
     c8c:	40044000 	andmi	r4, r4, r0
     c90:	40008000 	andmi	r8, r0, r0
     c94:	100000ae 	andne	r0, r0, lr, lsr #1
     c98:	10000150 	andne	r0, r0, r0, asr r1
     c9c:	10000178 	andne	r0, r0, r8, ror r1
     ca0:	10000164 	andne	r0, r0, r4, ror #2
     ca4:	e000e100 	and	lr, r0, r0, lsl #2
     ca8:	ffff00ff 			; <UNDEFINED> instruction: 0xffff00ff

00000cac <UART_IRQHandler>:
     cac:	b508      	push	{r3, lr}
     cae:	4803      	ldr	r0, [pc, #12]	; (cbc <UART_IRQHandler+0x10>)
     cb0:	4903      	ldr	r1, [pc, #12]	; (cc0 <UART_IRQHandler+0x14>)
     cb2:	4a04      	ldr	r2, [pc, #16]	; (cc4 <UART_IRQHandler+0x18>)
     cb4:	f000 fbc9 	bl	144a <Chip_UART_IRQRBHandler>
     cb8:	bd08      	pop	{r3, pc}
     cba:	46c0      	nop			; (mov r8, r8)
     cbc:	40008000 	andmi	r8, r0, r0
     cc0:	10000150 	andne	r0, r0, r0, asr r1
     cc4:	10000164 	andne	r0, r0, r4, ror #2

00000cc8 <uart_rxrb_cnt>:
     cc8:	4a02      	ldr	r2, [pc, #8]	; (cd4 <uart_rxrb_cnt+0xc>)
     cca:	68d3      	ldr	r3, [r2, #12]
     ccc:	6910      	ldr	r0, [r2, #16]
     cce:	1a18      	subs	r0, r3, r0
     cd0:	4770      	bx	lr
     cd2:	46c0      	nop			; (mov r8, r8)
     cd4:	10000150 	andne	r0, r0, r0, asr r1

00000cd8 <uart_read>:
     cd8:	b5f0      	push	{r4, r5, r6, r7, lr}
     cda:	b085      	sub	sp, #20
     cdc:	ab02      	add	r3, sp, #8
     cde:	1d9d      	adds	r5, r3, #6
     ce0:	2300      	movs	r3, #0
     ce2:	aa02      	add	r2, sp, #8
     ce4:	4e14      	ldr	r6, [pc, #80]	; (d38 <uart_read+0x60>)
     ce6:	1dd7      	adds	r7, r2, #7
     ce8:	9101      	str	r1, [sp, #4]
     cea:	702b      	strb	r3, [r5, #0]
     cec:	703b      	strb	r3, [r7, #0]
     cee:	1c04      	adds	r4, r0, #0
     cf0:	3301      	adds	r3, #1
     cf2:	4812      	ldr	r0, [pc, #72]	; (d3c <uart_read+0x64>)
     cf4:	1c31      	adds	r1, r6, #0
     cf6:	1c2a      	adds	r2, r5, #0
     cf8:	f000 fba0 	bl	143c <Chip_UART_ReadRB>
     cfc:	782b      	ldrb	r3, [r5, #0]
     cfe:	2b43      	cmp	r3, #67	; 0x43
     d00:	d001      	beq.n	d06 <uart_read+0x2e>
     d02:	2000      	movs	r0, #0
     d04:	e016      	b.n	d34 <uart_read+0x5c>
     d06:	2301      	movs	r3, #1
     d08:	480c      	ldr	r0, [pc, #48]	; (d3c <uart_read+0x64>)
     d0a:	1c31      	adds	r1, r6, #0
     d0c:	1c3a      	adds	r2, r7, #0
     d0e:	f000 fb95 	bl	143c <Chip_UART_ReadRB>
     d12:	783b      	ldrb	r3, [r7, #0]
     d14:	2b4e      	cmp	r3, #78	; 0x4e
     d16:	d1f4      	bne.n	d02 <uart_read+0x2a>
     d18:	1e20      	subs	r0, r4, #0
     d1a:	d00a      	beq.n	d32 <uart_read+0x5a>
     d1c:	782a      	ldrb	r2, [r5, #0]
     d1e:	7063      	strb	r3, [r4, #1]
     d20:	9b01      	ldr	r3, [sp, #4]
     d22:	7022      	strb	r2, [r4, #0]
     d24:	3b02      	subs	r3, #2
     d26:	1ca2      	adds	r2, r4, #2
     d28:	4804      	ldr	r0, [pc, #16]	; (d3c <uart_read+0x64>)
     d2a:	1c31      	adds	r1, r6, #0
     d2c:	f000 fb86 	bl	143c <Chip_UART_ReadRB>
     d30:	b280      	uxth	r0, r0
     d32:	3002      	adds	r0, #2
     d34:	b005      	add	sp, #20
     d36:	bdf0      	pop	{r4, r5, r6, r7, pc}
     d38:	10000150 	andne	r0, r0, r0, asr r1
     d3c:	40008000 	andmi	r8, r0, r0

00000d40 <uart_write>:
     d40:	b508      	push	{r3, lr}
     d42:	1e02      	subs	r2, r0, #0
     d44:	d004      	beq.n	d50 <uart_write+0x10>
     d46:	1c0b      	adds	r3, r1, #0
     d48:	4802      	ldr	r0, [pc, #8]	; (d54 <uart_write+0x14>)
     d4a:	4903      	ldr	r1, [pc, #12]	; (d58 <uart_write+0x18>)
     d4c:	f000 fb57 	bl	13fe <Chip_UART_SendRB>
     d50:	bd08      	pop	{r3, pc}
     d52:	46c0      	nop			; (mov r8, r8)
     d54:	40008000 	andmi	r8, r0, r0
     d58:	10000164 	andne	r0, r0, r4, ror #2

00000d5c <TIMER32_0_IRQHandler>:
     d5c:	2202      	movs	r2, #2
     d5e:	b538      	push	{r3, r4, r5, lr}
     d60:	4b0f      	ldr	r3, [pc, #60]	; (da0 <TIMER32_0_IRQHandler+0x44>)
     d62:	6819      	ldr	r1, [r3, #0]
     d64:	4211      	tst	r1, r2
     d66:	d019      	beq.n	d9c <TIMER32_0_IRQHandler+0x40>
     d68:	4c0e      	ldr	r4, [pc, #56]	; (da4 <TIMER32_0_IRQHandler+0x48>)
     d6a:	4d0f      	ldr	r5, [pc, #60]	; (da8 <TIMER32_0_IRQHandler+0x4c>)
     d6c:	601a      	str	r2, [r3, #0]
     d6e:	1f23      	subs	r3, r4, #4
     d70:	781b      	ldrb	r3, [r3, #0]
     d72:	2b00      	cmp	r3, #0
     d74:	d00f      	beq.n	d96 <TIMER32_0_IRQHandler+0x3a>
     d76:	6823      	ldr	r3, [r4, #0]
     d78:	2b00      	cmp	r3, #0
     d7a:	d00c      	beq.n	d96 <TIMER32_0_IRQHandler+0x3a>
     d7c:	3b01      	subs	r3, #1
     d7e:	6023      	str	r3, [r4, #0]
     d80:	2b00      	cmp	r3, #0
     d82:	d108      	bne.n	d96 <TIMER32_0_IRQHandler+0x3a>
     d84:	68a3      	ldr	r3, [r4, #8]
     d86:	2b00      	cmp	r3, #0
     d88:	d001      	beq.n	d8e <TIMER32_0_IRQHandler+0x32>
     d8a:	4798      	blx	r3
     d8c:	e001      	b.n	d92 <TIMER32_0_IRQHandler+0x36>
     d8e:	2301      	movs	r3, #1
     d90:	7323      	strb	r3, [r4, #12]
     d92:	6863      	ldr	r3, [r4, #4]
     d94:	6023      	str	r3, [r4, #0]
     d96:	3414      	adds	r4, #20
     d98:	42ac      	cmp	r4, r5
     d9a:	d1e8      	bne.n	d6e <TIMER32_0_IRQHandler+0x12>
     d9c:	bd38      	pop	{r3, r4, r5, pc}
     d9e:	46c0      	nop			; (mov r8, r8)
     da0:	40014000 	andmi	r4, r1, r0
     da4:	1000021c 	andne	r0, r0, ip, lsl r2
     da8:	100002bc 			; <UNDEFINED> instruction: 0x100002bc

00000dac <timer_init>:
     dac:	b538      	push	{r3, r4, r5, lr}
     dae:	4918      	ldr	r1, [pc, #96]	; (e10 <timer_init+0x64>)
     db0:	4b18      	ldr	r3, [pc, #96]	; (e14 <timer_init+0x68>)
     db2:	2200      	movs	r2, #0
     db4:	1f18      	subs	r0, r3, #4
     db6:	7002      	strb	r2, [r0, #0]
     db8:	601a      	str	r2, [r3, #0]
     dba:	605a      	str	r2, [r3, #4]
     dbc:	609a      	str	r2, [r3, #8]
     dbe:	731a      	strb	r2, [r3, #12]
     dc0:	3314      	adds	r3, #20
     dc2:	428b      	cmp	r3, r1
     dc4:	d1f5      	bne.n	db2 <timer_init+0x6>
     dc6:	4c14      	ldr	r4, [pc, #80]	; (e18 <timer_init+0x6c>)
     dc8:	1c20      	adds	r0, r4, #0
     dca:	f000 f9cd 	bl	1168 <Chip_TIMER_Init>
     dce:	f000 f9a5 	bl	111c <Chip_Clock_GetSystemClockRate>
     dd2:	1c05      	adds	r5, r0, #0
     dd4:	1c20      	adds	r0, r4, #0
     dd6:	f000 f9e5 	bl	11a4 <Chip_TIMER_Reset>
     dda:	2208      	movs	r2, #8
     ddc:	21fa      	movs	r1, #250	; 0xfa
     dde:	6963      	ldr	r3, [r4, #20]
     de0:	1c28      	adds	r0, r5, #0
     de2:	4313      	orrs	r3, r2
     de4:	6163      	str	r3, [r4, #20]
     de6:	0089      	lsls	r1, r1, #2
     de8:	f000 fb93 	bl	1512 <__aeabi_uidiv>
     dec:	2210      	movs	r2, #16
     dee:	61e0      	str	r0, [r4, #28]
     df0:	6963      	ldr	r3, [r4, #20]
     df2:	21c0      	movs	r1, #192	; 0xc0
     df4:	4313      	orrs	r3, r2
     df6:	2280      	movs	r2, #128	; 0x80
     df8:	6163      	str	r3, [r4, #20]
     dfa:	4b08      	ldr	r3, [pc, #32]	; (e1c <timer_init+0x70>)
     dfc:	02d2      	lsls	r2, r2, #11
     dfe:	0049      	lsls	r1, r1, #1
     e00:	505a      	str	r2, [r3, r1]
     e02:	601a      	str	r2, [r3, #0]
     e04:	2201      	movs	r2, #1
     e06:	6863      	ldr	r3, [r4, #4]
     e08:	4313      	orrs	r3, r2
     e0a:	6063      	str	r3, [r4, #4]
     e0c:	bd38      	pop	{r3, r4, r5, pc}
     e0e:	46c0      	nop			; (mov r8, r8)
     e10:	100002bc 			; <UNDEFINED> instruction: 0x100002bc
     e14:	1000021c 	andne	r0, r0, ip, lsl r2
     e18:	40014000 	andmi	r4, r1, r0
     e1c:	e000e100 	and	lr, r0, r0, lsl #2

00000e20 <timer_set>:
     e20:	2314      	movs	r3, #20
     e22:	4358      	muls	r0, r3
     e24:	b510      	push	{r4, lr}
     e26:	4c05      	ldr	r4, [pc, #20]	; (e3c <timer_set+0x1c>)
     e28:	3b13      	subs	r3, #19
     e2a:	5503      	strb	r3, [r0, r4]
     e2c:	2300      	movs	r3, #0
     e2e:	1820      	adds	r0, r4, r0
     e30:	6041      	str	r1, [r0, #4]
     e32:	6081      	str	r1, [r0, #8]
     e34:	60c2      	str	r2, [r0, #12]
     e36:	7403      	strb	r3, [r0, #16]
     e38:	bd10      	pop	{r4, pc}
     e3a:	46c0      	nop			; (mov r8, r8)
     e3c:	10000218 	andne	r0, r0, r8, lsl r2

00000e40 <timer_kill>:
     e40:	2314      	movs	r3, #20
     e42:	4358      	muls	r0, r3
     e44:	4a03      	ldr	r2, [pc, #12]	; (e54 <timer_kill+0x14>)
     e46:	5c83      	ldrb	r3, [r0, r2]
     e48:	2b00      	cmp	r3, #0
     e4a:	d001      	beq.n	e50 <timer_kill+0x10>
     e4c:	2300      	movs	r3, #0
     e4e:	5483      	strb	r3, [r0, r2]
     e50:	4770      	bx	lr
     e52:	46c0      	nop			; (mov r8, r8)
     e54:	10000218 	andne	r0, r0, r8, lsl r2

00000e58 <timer_istimeout>:
     e58:	2214      	movs	r2, #20
     e5a:	1c13      	adds	r3, r2, #0
     e5c:	4343      	muls	r3, r0
     e5e:	4903      	ldr	r1, [pc, #12]	; (e6c <timer_istimeout+0x14>)
     e60:	5c58      	ldrb	r0, [r3, r1]
     e62:	2800      	cmp	r0, #0
     e64:	d001      	beq.n	e6a <timer_istimeout+0x12>
     e66:	18cb      	adds	r3, r1, r3
     e68:	7c18      	ldrb	r0, [r3, #16]
     e6a:	4770      	bx	lr
     e6c:	10000218 	andne	r0, r0, r8, lsl r2

00000e70 <Board_Init>:
     e70:	20a0      	movs	r0, #160	; 0xa0
     e72:	b508      	push	{r3, lr}
     e74:	05c0      	lsls	r0, r0, #23
     e76:	f000 fa63 	bl	1340 <Chip_GPIO_Init>
     e7a:	bd08      	pop	{r3, pc}

00000e7c <System_OscSelect>:
     e7c:	4b01      	ldr	r3, [pc, #4]	; (e84 <System_OscSelect+0x8>)
     e7e:	6018      	str	r0, [r3, #0]
     e80:	4770      	bx	lr
     e82:	46c0      	nop			; (mov r8, r8)
     e84:	10000004 	andne	r0, r0, r4

00000e88 <Board_SystemInit>:
     e88:	b573      	push	{r0, r1, r4, r5, r6, lr}
     e8a:	2020      	movs	r0, #32
     e8c:	f000 fa70 	bl	1370 <Chip_SYSCTL_PowerUp>
     e90:	2300      	movs	r3, #0
     e92:	9301      	str	r3, [sp, #4]
     e94:	9b01      	ldr	r3, [sp, #4]
     e96:	2bff      	cmp	r3, #255	; 0xff
     e98:	dc02      	bgt.n	ea0 <Board_SystemInit+0x18>
     e9a:	9b01      	ldr	r3, [sp, #4]
     e9c:	3301      	adds	r3, #1
     e9e:	e7f8      	b.n	e92 <Board_SystemInit+0xa>
     ea0:	4d1e      	ldr	r5, [pc, #120]	; (f1c <Board_SystemInit+0x94>)
     ea2:	4c1f      	ldr	r4, [pc, #124]	; (f20 <Board_SystemInit+0x98>)
     ea4:	7828      	ldrb	r0, [r5, #0]
     ea6:	f000 f8cd 	bl	1044 <Chip_Clock_SetSystemPLLSource>
     eaa:	2080      	movs	r0, #128	; 0x80
     eac:	f000 fa50 	bl	1350 <Chip_SYSCTL_PowerDown>
     eb0:	2323      	movs	r3, #35	; 0x23
     eb2:	2080      	movs	r0, #128	; 0x80
     eb4:	60a3      	str	r3, [r4, #8]
     eb6:	f000 fa5b 	bl	1370 <Chip_SYSCTL_PowerUp>
     eba:	2301      	movs	r3, #1
     ebc:	68e2      	ldr	r2, [r4, #12]
     ebe:	4e18      	ldr	r6, [pc, #96]	; (f20 <Board_SystemInit+0x98>)
     ec0:	421a      	tst	r2, r3
     ec2:	d0fa      	beq.n	eba <Board_SystemInit+0x32>
     ec4:	2003      	movs	r0, #3
     ec6:	2102      	movs	r1, #2
     ec8:	4a16      	ldr	r2, [pc, #88]	; (f24 <Board_SystemInit+0x9c>)
     eca:	67b3      	str	r3, [r6, #120]	; 0x78
     ecc:	6913      	ldr	r3, [r2, #16]
     ece:	4383      	bics	r3, r0
     ed0:	430b      	orrs	r3, r1
     ed2:	6113      	str	r3, [r2, #16]
     ed4:	f000 f8ca 	bl	106c <Chip_Clock_SetMainClockSource>
     ed8:	6828      	ldr	r0, [r5, #0]
     eda:	b2c0      	uxtb	r0, r0
     edc:	f000 f8bc 	bl	1058 <Chip_Clock_SetUSBPLLSource>
     ee0:	2323      	movs	r3, #35	; 0x23
     ee2:	2080      	movs	r0, #128	; 0x80
     ee4:	6133      	str	r3, [r6, #16]
     ee6:	0040      	lsls	r0, r0, #1
     ee8:	f000 fa42 	bl	1370 <Chip_SYSCTL_PowerUp>
     eec:	6963      	ldr	r3, [r4, #20]
     eee:	07db      	lsls	r3, r3, #31
     ef0:	d5fc      	bpl.n	eec <Board_SystemInit+0x64>
     ef2:	2180      	movs	r1, #128	; 0x80
     ef4:	2400      	movs	r4, #0
     ef6:	4a0c      	ldr	r2, [pc, #48]	; (f28 <Board_SystemInit+0xa0>)
     ef8:	0249      	lsls	r1, r1, #9
     efa:	6fd3      	ldr	r3, [r2, #124]	; 0x7c
     efc:	430b      	orrs	r3, r1
     efe:	67d3      	str	r3, [r2, #124]	; 0x7c
     f00:	4a0a      	ldr	r2, [pc, #40]	; (f2c <Board_SystemInit+0xa4>)
     f02:	00a3      	lsls	r3, r4, #2
     f04:	5c99      	ldrb	r1, [r3, r2]
     f06:	18d3      	adds	r3, r2, r3
     f08:	785a      	ldrb	r2, [r3, #1]
     f0a:	4809      	ldr	r0, [pc, #36]	; (f30 <Board_SystemInit+0xa8>)
     f0c:	885b      	ldrh	r3, [r3, #2]
     f0e:	3401      	adds	r4, #1
     f10:	f000 f916 	bl	1140 <Chip_IOCON_PinMuxSet>
     f14:	2c09      	cmp	r4, #9
     f16:	d1f3      	bne.n	f00 <Board_SystemInit+0x78>
     f18:	bd73      	pop	{r0, r1, r4, r5, r6, pc}
     f1a:	46c0      	nop			; (mov r8, r8)
     f1c:	10000004 	andne	r0, r0, r4
     f20:	40048000 	andmi	r8, r4, r0
     f24:	4003c000 	andmi	ip, r3, r0
     f28:	40048004 	andmi	r8, r4, r4
     f2c:	000019c0 	andeq	r1, r0, r0, asr #19
     f30:	40044000 	andmi	r4, r4, r0

00000f34 <setStartMode>:
     f34:	6802      	ldr	r2, [r0, #0]
     f36:	4b03      	ldr	r3, [pc, #12]	; (f44 <setStartMode+0x10>)
     f38:	0609      	lsls	r1, r1, #24
     f3a:	4013      	ands	r3, r2
     f3c:	4319      	orrs	r1, r3
     f3e:	6001      	str	r1, [r0, #0]
     f40:	4770      	bx	lr
     f42:	46c0      	nop			; (mov r8, r8)
     f44:	f8ffffff 			; <UNDEFINED> instruction: 0xf8ffffff

00000f48 <Chip_ADC_Init>:
     f48:	b538      	push	{r3, r4, r5, lr}
     f4a:	1c04      	adds	r4, r0, #0
     f4c:	2010      	movs	r0, #16
     f4e:	1c0d      	adds	r5, r1, #0
     f50:	f000 fa0e 	bl	1370 <Chip_SYSCTL_PowerUp>
     f54:	2180      	movs	r1, #128	; 0x80
     f56:	4a10      	ldr	r2, [pc, #64]	; (f98 <Chip_ADC_Init+0x50>)
     f58:	0189      	lsls	r1, r1, #6
     f5a:	6fd3      	ldr	r3, [r2, #124]	; 0x7c
     f5c:	430b      	orrs	r3, r1
     f5e:	67d3      	str	r3, [r2, #124]	; 0x7c
     f60:	2300      	movs	r3, #0
     f62:	4a0e      	ldr	r2, [pc, #56]	; (f9c <Chip_ADC_Init+0x54>)
     f64:	60e3      	str	r3, [r4, #12]
     f66:	602a      	str	r2, [r5, #0]
     f68:	712b      	strb	r3, [r5, #4]
     f6a:	716b      	strb	r3, [r5, #5]
     f6c:	f000 f8d6 	bl	111c <Chip_Clock_GetSystemClockRate>
     f70:	2307      	movs	r3, #7
     f72:	792d      	ldrb	r5, [r5, #4]
     f74:	0040      	lsls	r0, r0, #1
     f76:	401d      	ands	r5, r3
     f78:	2380      	movs	r3, #128	; 0x80
     f7a:	046d      	lsls	r5, r5, #17
     f7c:	039b      	lsls	r3, r3, #14
     f7e:	431d      	orrs	r5, r3
     f80:	4b07      	ldr	r3, [pc, #28]	; (fa0 <Chip_ADC_Init+0x58>)
     f82:	4908      	ldr	r1, [pc, #32]	; (fa4 <Chip_ADC_Init+0x5c>)
     f84:	18c0      	adds	r0, r0, r3
     f86:	f000 fac4 	bl	1512 <__aeabi_uidiv>
     f8a:	3801      	subs	r0, #1
     f8c:	b2c0      	uxtb	r0, r0
     f8e:	0200      	lsls	r0, r0, #8
     f90:	4328      	orrs	r0, r5
     f92:	6020      	str	r0, [r4, #0]
     f94:	bd38      	pop	{r3, r4, r5, pc}
     f96:	46c0      	nop			; (mov r8, r8)
     f98:	40048004 	andmi	r8, r4, r4
     f9c:	00061a80 	andeq	r1, r6, r0, lsl #21
     fa0:	00432380 	subeq	r2, r3, r0, lsl #7
     fa4:	00864700 	addeq	r4, r6, r0, lsl #14

00000fa8 <Chip_ADC_ReadValue>:
     fa8:	3104      	adds	r1, #4
     faa:	0089      	lsls	r1, r1, #2
     fac:	580b      	ldr	r3, [r1, r0]
     fae:	2000      	movs	r0, #0
     fb0:	4283      	cmp	r3, r0
     fb2:	da03      	bge.n	fbc <Chip_ADC_ReadValue+0x14>
     fb4:	041b      	lsls	r3, r3, #16
     fb6:	0d9b      	lsrs	r3, r3, #22
     fb8:	8013      	strh	r3, [r2, #0]
     fba:	3001      	adds	r0, #1
     fbc:	4770      	bx	lr

00000fbe <Chip_ADC_ReadStatus>:
     fbe:	2a01      	cmp	r2, #1
     fc0:	d00e      	beq.n	fe0 <Chip_ADC_ReadStatus+0x22>
     fc2:	2a00      	cmp	r2, #0
     fc4:	d007      	beq.n	fd6 <Chip_ADC_ReadStatus+0x18>
     fc6:	2a02      	cmp	r2, #2
     fc8:	d111      	bne.n	fee <Chip_ADC_ReadStatus+0x30>
     fca:	6b00      	ldr	r0, [r0, #48]	; 0x30
     fcc:	0c00      	lsrs	r0, r0, #16
     fce:	1e41      	subs	r1, r0, #1
     fd0:	4188      	sbcs	r0, r1
     fd2:	b2c0      	uxtb	r0, r0
     fd4:	e00c      	b.n	ff0 <Chip_ADC_ReadStatus+0x32>
     fd6:	6b00      	ldr	r0, [r0, #48]	; 0x30
     fd8:	2301      	movs	r3, #1
     fda:	40c8      	lsrs	r0, r1
     fdc:	4018      	ands	r0, r3
     fde:	e007      	b.n	ff0 <Chip_ADC_ReadStatus+0x32>
     fe0:	6b00      	ldr	r0, [r0, #48]	; 0x30
     fe2:	3108      	adds	r1, #8
     fe4:	b2c9      	uxtb	r1, r1
     fe6:	40c8      	lsrs	r0, r1
     fe8:	4002      	ands	r2, r0
     fea:	b2d0      	uxtb	r0, r2
     fec:	e000      	b.n	ff0 <Chip_ADC_ReadStatus+0x32>
     fee:	2000      	movs	r0, #0
     ff0:	4770      	bx	lr
	...

00000ff4 <Chip_ADC_SetStartMode>:
     ff4:	b508      	push	{r3, lr}
     ff6:	2901      	cmp	r1, #1
     ff8:	d90a      	bls.n	1010 <Chip_ADC_SetStartMode+0x1c>
     ffa:	2a00      	cmp	r2, #0
     ffc:	d004      	beq.n	1008 <Chip_ADC_SetStartMode+0x14>
     ffe:	2280      	movs	r2, #128	; 0x80
    1000:	6803      	ldr	r3, [r0, #0]
    1002:	0512      	lsls	r2, r2, #20
    1004:	4313      	orrs	r3, r2
    1006:	e002      	b.n	100e <Chip_ADC_SetStartMode+0x1a>
    1008:	6802      	ldr	r2, [r0, #0]
    100a:	4b03      	ldr	r3, [pc, #12]	; (1018 <Chip_ADC_SetStartMode+0x24>)
    100c:	4013      	ands	r3, r2
    100e:	6003      	str	r3, [r0, #0]
    1010:	f7ff ff90 	bl	f34 <setStartMode>
    1014:	bd08      	pop	{r3, pc}
    1016:	46c0      	nop			; (mov r8, r8)
    1018:	f7ffffff 			; <UNDEFINED> instruction: 0xf7ffffff

0000101c <Chip_ADC_EnableChannel>:
    101c:	2a01      	cmp	r2, #1
    101e:	d104      	bne.n	102a <Chip_ADC_EnableChannel+0xe>
    1020:	408a      	lsls	r2, r1
    1022:	6803      	ldr	r3, [r0, #0]
    1024:	431a      	orrs	r2, r3
    1026:	6002      	str	r2, [r0, #0]
    1028:	e008      	b.n	103c <Chip_ADC_EnableChannel+0x20>
    102a:	6802      	ldr	r2, [r0, #0]
    102c:	4b04      	ldr	r3, [pc, #16]	; (1040 <Chip_ADC_EnableChannel+0x24>)
    102e:	4013      	ands	r3, r2
    1030:	2201      	movs	r2, #1
    1032:	408a      	lsls	r2, r1
    1034:	6003      	str	r3, [r0, #0]
    1036:	6803      	ldr	r3, [r0, #0]
    1038:	4393      	bics	r3, r2
    103a:	6003      	str	r3, [r0, #0]
    103c:	4770      	bx	lr
    103e:	46c0      	nop			; (mov r8, r8)
    1040:	f8ffffff 			; <UNDEFINED> instruction: 0xf8ffffff

00001044 <Chip_Clock_SetSystemPLLSource>:
    1044:	2200      	movs	r2, #0
    1046:	4b03      	ldr	r3, [pc, #12]	; (1054 <Chip_Clock_SetSystemPLLSource+0x10>)
    1048:	6418      	str	r0, [r3, #64]	; 0x40
    104a:	645a      	str	r2, [r3, #68]	; 0x44
    104c:	3201      	adds	r2, #1
    104e:	645a      	str	r2, [r3, #68]	; 0x44
    1050:	4770      	bx	lr
    1052:	46c0      	nop			; (mov r8, r8)
    1054:	40048000 	andmi	r8, r4, r0

00001058 <Chip_Clock_SetUSBPLLSource>:
    1058:	2200      	movs	r2, #0
    105a:	4b03      	ldr	r3, [pc, #12]	; (1068 <Chip_Clock_SetUSBPLLSource+0x10>)
    105c:	6498      	str	r0, [r3, #72]	; 0x48
    105e:	64da      	str	r2, [r3, #76]	; 0x4c
    1060:	3201      	adds	r2, #1
    1062:	64da      	str	r2, [r3, #76]	; 0x4c
    1064:	4770      	bx	lr
    1066:	46c0      	nop			; (mov r8, r8)
    1068:	40048000 	andmi	r8, r4, r0

0000106c <Chip_Clock_SetMainClockSource>:
    106c:	2200      	movs	r2, #0
    106e:	4b03      	ldr	r3, [pc, #12]	; (107c <Chip_Clock_SetMainClockSource+0x10>)
    1070:	6718      	str	r0, [r3, #112]	; 0x70
    1072:	675a      	str	r2, [r3, #116]	; 0x74
    1074:	3201      	adds	r2, #1
    1076:	675a      	str	r2, [r3, #116]	; 0x74
    1078:	4770      	bx	lr
    107a:	46c0      	nop			; (mov r8, r8)
    107c:	40048000 	andmi	r8, r4, r0

00001080 <Chip_Clock_GetWDTOSCRate>:
    1080:	b508      	push	{r3, lr}
    1082:	4b07      	ldr	r3, [pc, #28]	; (10a0 <Chip_Clock_GetWDTOSCRate+0x20>)
    1084:	6a59      	ldr	r1, [r3, #36]	; 0x24
    1086:	231f      	movs	r3, #31
    1088:	05ca      	lsls	r2, r1, #23
    108a:	0f12      	lsrs	r2, r2, #28
    108c:	4019      	ands	r1, r3
    108e:	4b05      	ldr	r3, [pc, #20]	; (10a4 <Chip_Clock_GetWDTOSCRate+0x24>)
    1090:	0092      	lsls	r2, r2, #2
    1092:	3101      	adds	r1, #1
    1094:	0049      	lsls	r1, r1, #1
    1096:	58d0      	ldr	r0, [r2, r3]
    1098:	f000 fa3b 	bl	1512 <__aeabi_uidiv>
    109c:	bd08      	pop	{r3, pc}
    109e:	46c0      	nop			; (mov r8, r8)
    10a0:	40048000 	andmi	r8, r4, r0
    10a4:	000019e4 	andeq	r1, r0, r4, ror #19

000010a8 <Chip_Clock_GetSystemPLLInClockRate>:
    10a8:	4b06      	ldr	r3, [pc, #24]	; (10c4 <Chip_Clock_GetSystemPLLInClockRate+0x1c>)
    10aa:	6c1a      	ldr	r2, [r3, #64]	; 0x40
    10ac:	2303      	movs	r3, #3
    10ae:	4013      	ands	r3, r2
    10b0:	d005      	beq.n	10be <Chip_Clock_GetSystemPLLInClockRate+0x16>
    10b2:	2000      	movs	r0, #0
    10b4:	2b01      	cmp	r3, #1
    10b6:	d103      	bne.n	10c0 <Chip_Clock_GetSystemPLLInClockRate+0x18>
    10b8:	4b03      	ldr	r3, [pc, #12]	; (10c8 <Chip_Clock_GetSystemPLLInClockRate+0x20>)
    10ba:	6818      	ldr	r0, [r3, #0]
    10bc:	e000      	b.n	10c0 <Chip_Clock_GetSystemPLLInClockRate+0x18>
    10be:	4803      	ldr	r0, [pc, #12]	; (10cc <Chip_Clock_GetSystemPLLInClockRate+0x24>)
    10c0:	4770      	bx	lr
    10c2:	46c0      	nop			; (mov r8, r8)
    10c4:	40048000 	andmi	r8, r4, r0
    10c8:	000019bc 			; <UNDEFINED> instruction: 0x000019bc
    10cc:	00b71b00 	adcseq	r1, r7, r0, lsl #22

000010d0 <Chip_Clock_GetSystemPLLOutClockRate>:
    10d0:	4b04      	ldr	r3, [pc, #16]	; (10e4 <Chip_Clock_GetSystemPLLOutClockRate+0x14>)
    10d2:	b510      	push	{r4, lr}
    10d4:	689c      	ldr	r4, [r3, #8]
    10d6:	f7ff ffe7 	bl	10a8 <Chip_Clock_GetSystemPLLInClockRate>
    10da:	231f      	movs	r3, #31
    10dc:	4023      	ands	r3, r4
    10de:	3301      	adds	r3, #1
    10e0:	4358      	muls	r0, r3
    10e2:	bd10      	pop	{r4, pc}
    10e4:	40048000 	andmi	r8, r4, r0

000010e8 <Chip_Clock_GetMainClockRate>:
    10e8:	b508      	push	{r3, lr}
    10ea:	4b0a      	ldr	r3, [pc, #40]	; (1114 <Chip_Clock_GetMainClockRate+0x2c>)
    10ec:	6f1a      	ldr	r2, [r3, #112]	; 0x70
    10ee:	2303      	movs	r3, #3
    10f0:	4013      	ands	r3, r2
    10f2:	2b02      	cmp	r3, #2
    10f4:	d006      	beq.n	1104 <Chip_Clock_GetMainClockRate+0x1c>
    10f6:	2b03      	cmp	r3, #3
    10f8:	d007      	beq.n	110a <Chip_Clock_GetMainClockRate+0x22>
    10fa:	2b01      	cmp	r3, #1
    10fc:	d108      	bne.n	1110 <Chip_Clock_GetMainClockRate+0x28>
    10fe:	f7ff ffd3 	bl	10a8 <Chip_Clock_GetSystemPLLInClockRate>
    1102:	e006      	b.n	1112 <Chip_Clock_GetMainClockRate+0x2a>
    1104:	f7ff ffbc 	bl	1080 <Chip_Clock_GetWDTOSCRate>
    1108:	e003      	b.n	1112 <Chip_Clock_GetMainClockRate+0x2a>
    110a:	f7ff ffe1 	bl	10d0 <Chip_Clock_GetSystemPLLOutClockRate>
    110e:	e000      	b.n	1112 <Chip_Clock_GetMainClockRate+0x2a>
    1110:	4801      	ldr	r0, [pc, #4]	; (1118 <Chip_Clock_GetMainClockRate+0x30>)
    1112:	bd08      	pop	{r3, pc}
    1114:	40048000 	andmi	r8, r4, r0
    1118:	00b71b00 	adcseq	r1, r7, r0, lsl #22

0000111c <Chip_Clock_GetSystemClockRate>:
    111c:	b508      	push	{r3, lr}
    111e:	f7ff ffe3 	bl	10e8 <Chip_Clock_GetMainClockRate>
    1122:	4b02      	ldr	r3, [pc, #8]	; (112c <Chip_Clock_GetSystemClockRate+0x10>)
    1124:	6f99      	ldr	r1, [r3, #120]	; 0x78
    1126:	f000 f9f4 	bl	1512 <__aeabi_uidiv>
    112a:	bd08      	pop	{r3, pc}
    112c:	40048000 	andmi	r8, r4, r0

00001130 <SystemCoreClockUpdate>:
    1130:	b508      	push	{r3, lr}
    1132:	f7ff fff3 	bl	111c <Chip_Clock_GetSystemClockRate>
    1136:	4b01      	ldr	r3, [pc, #4]	; (113c <SystemCoreClockUpdate+0xc>)
    1138:	6018      	str	r0, [r3, #0]
    113a:	bd08      	pop	{r3, pc}
    113c:	100002b8 			; <UNDEFINED> instruction: 0x100002b8

00001140 <Chip_IOCON_PinMuxSet>:
    1140:	2900      	cmp	r1, #0
    1142:	d000      	beq.n	1146 <Chip_IOCON_PinMuxSet+0x6>
    1144:	3218      	adds	r2, #24
    1146:	0092      	lsls	r2, r2, #2
    1148:	5013      	str	r3, [r2, r0]
    114a:	4770      	bx	lr

0000114c <Chip_WWDT_ClearStatusFlag>:
    114c:	074b      	lsls	r3, r1, #29
    114e:	d503      	bpl.n	1158 <Chip_WWDT_ClearStatusFlag+0xc>
    1150:	231b      	movs	r3, #27
    1152:	6802      	ldr	r2, [r0, #0]
    1154:	4013      	ands	r3, r2
    1156:	6003      	str	r3, [r0, #0]
    1158:	2208      	movs	r2, #8
    115a:	4211      	tst	r1, r2
    115c:	d002      	beq.n	1164 <Chip_WWDT_ClearStatusFlag+0x18>
    115e:	6803      	ldr	r3, [r0, #0]
    1160:	4313      	orrs	r3, r2
    1162:	6003      	str	r3, [r0, #0]
    1164:	4770      	bx	lr
	...

00001168 <Chip_TIMER_Init>:
    1168:	4a0a      	ldr	r2, [pc, #40]	; (1194 <Chip_TIMER_Init+0x2c>)
    116a:	230a      	movs	r3, #10
    116c:	4290      	cmp	r0, r2
    116e:	d009      	beq.n	1184 <Chip_TIMER_Init+0x1c>
    1170:	4a09      	ldr	r2, [pc, #36]	; (1198 <Chip_TIMER_Init+0x30>)
    1172:	3b03      	subs	r3, #3
    1174:	4290      	cmp	r0, r2
    1176:	d005      	beq.n	1184 <Chip_TIMER_Init+0x1c>
    1178:	4b08      	ldr	r3, [pc, #32]	; (119c <Chip_TIMER_Init+0x34>)
    117a:	18c0      	adds	r0, r0, r3
    117c:	4243      	negs	r3, r0
    117e:	4143      	adcs	r3, r0
    1180:	2009      	movs	r0, #9
    1182:	1ac3      	subs	r3, r0, r3
    1184:	2001      	movs	r0, #1
    1186:	4098      	lsls	r0, r3
    1188:	1c03      	adds	r3, r0, #0
    118a:	4905      	ldr	r1, [pc, #20]	; (11a0 <Chip_TIMER_Init+0x38>)
    118c:	6fca      	ldr	r2, [r1, #124]	; 0x7c
    118e:	4313      	orrs	r3, r2
    1190:	67cb      	str	r3, [r1, #124]	; 0x7c
    1192:	4770      	bx	lr
    1194:	40018000 	andmi	r8, r1, r0
    1198:	4000c000 	andmi	ip, r0, r0
    119c:	bfff0000 	svclt	0x00ff0000
    11a0:	40048004 	andmi	r8, r4, r4

000011a4 <Chip_TIMER_Reset>:
    11a4:	2200      	movs	r2, #0
    11a6:	6843      	ldr	r3, [r0, #4]
    11a8:	6042      	str	r2, [r0, #4]
    11aa:	3201      	adds	r2, #1
    11ac:	6082      	str	r2, [r0, #8]
    11ae:	3201      	adds	r2, #1
    11b0:	6042      	str	r2, [r0, #4]
    11b2:	6882      	ldr	r2, [r0, #8]
    11b4:	2a00      	cmp	r2, #0
    11b6:	d1fc      	bne.n	11b2 <Chip_TIMER_Reset+0xe>
    11b8:	6043      	str	r3, [r0, #4]
    11ba:	4770      	bx	lr

000011bc <RingBuffer_Init>:
    11bc:	6043      	str	r3, [r0, #4]
    11be:	2300      	movs	r3, #0
    11c0:	6001      	str	r1, [r0, #0]
    11c2:	6082      	str	r2, [r0, #8]
    11c4:	6103      	str	r3, [r0, #16]
    11c6:	60c3      	str	r3, [r0, #12]
    11c8:	2001      	movs	r0, #1
    11ca:	4770      	bx	lr

000011cc <RingBuffer_Insert>:
    11cc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    11ce:	1c04      	adds	r4, r0, #0
    11d0:	68c3      	ldr	r3, [r0, #12]
    11d2:	6807      	ldr	r7, [r0, #0]
    11d4:	6862      	ldr	r2, [r4, #4]
    11d6:	6900      	ldr	r0, [r0, #16]
    11d8:	1a1b      	subs	r3, r3, r0
    11da:	2000      	movs	r0, #0
    11dc:	4293      	cmp	r3, r2
    11de:	da0f      	bge.n	1200 <RingBuffer_Insert+0x34>
    11e0:	1c0d      	adds	r5, r1, #0
    11e2:	68e0      	ldr	r0, [r4, #12]
    11e4:	1c11      	adds	r1, r2, #0
    11e6:	f000 f994 	bl	1512 <__aeabi_uidiv>
    11ea:	68a6      	ldr	r6, [r4, #8]
    11ec:	4371      	muls	r1, r6
    11ee:	1c32      	adds	r2, r6, #0
    11f0:	1878      	adds	r0, r7, r1
    11f2:	1c29      	adds	r1, r5, #0
    11f4:	f000 f97e 	bl	14f4 <memcpy>
    11f8:	2001      	movs	r0, #1
    11fa:	68e3      	ldr	r3, [r4, #12]
    11fc:	3301      	adds	r3, #1
    11fe:	60e3      	str	r3, [r4, #12]
    1200:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00001202 <RingBuffer_InsertMult>:
    1202:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    1204:	6803      	ldr	r3, [r0, #0]
    1206:	6846      	ldr	r6, [r0, #4]
    1208:	9301      	str	r3, [sp, #4]
    120a:	68c3      	ldr	r3, [r0, #12]
    120c:	6904      	ldr	r4, [r0, #16]
    120e:	1b1c      	subs	r4, r3, r4
    1210:	2300      	movs	r3, #0
    1212:	42b4      	cmp	r4, r6
    1214:	da36      	bge.n	1284 <RingBuffer_InsertMult+0x82>
    1216:	68c3      	ldr	r3, [r0, #12]
    1218:	6907      	ldr	r7, [r0, #16]
    121a:	9100      	str	r1, [sp, #0]
    121c:	1c04      	adds	r4, r0, #0
    121e:	1c31      	adds	r1, r6, #0
    1220:	68c0      	ldr	r0, [r0, #12]
    1222:	1bdf      	subs	r7, r3, r7
    1224:	1c15      	adds	r5, r2, #0
    1226:	f000 f974 	bl	1512 <__aeabi_uidiv>
    122a:	1bf7      	subs	r7, r6, r7
    122c:	187b      	adds	r3, r7, r1
    122e:	1c38      	adds	r0, r7, #0
    1230:	42b3      	cmp	r3, r6
    1232:	d300      	bcc.n	1236 <RingBuffer_InsertMult+0x34>
    1234:	1a70      	subs	r0, r6, r1
    1236:	1a3f      	subs	r7, r7, r0
    1238:	1e06      	subs	r6, r0, #0
    123a:	42ae      	cmp	r6, r5
    123c:	dd00      	ble.n	1240 <RingBuffer_InsertMult+0x3e>
    123e:	1c2e      	adds	r6, r5, #0
    1240:	1bad      	subs	r5, r5, r6
    1242:	42bd      	cmp	r5, r7
    1244:	dd00      	ble.n	1248 <RingBuffer_InsertMult+0x46>
    1246:	1c3d      	adds	r5, r7, #0
    1248:	68a2      	ldr	r2, [r4, #8]
    124a:	9b01      	ldr	r3, [sp, #4]
    124c:	4351      	muls	r1, r2
    124e:	4372      	muls	r2, r6
    1250:	1858      	adds	r0, r3, r1
    1252:	9900      	ldr	r1, [sp, #0]
    1254:	f000 f94e 	bl	14f4 <memcpy>
    1258:	68e3      	ldr	r3, [r4, #12]
    125a:	6861      	ldr	r1, [r4, #4]
    125c:	18f0      	adds	r0, r6, r3
    125e:	60e0      	str	r0, [r4, #12]
    1260:	f000 f957 	bl	1512 <__aeabi_uidiv>
    1264:	68a7      	ldr	r7, [r4, #8]
    1266:	6823      	ldr	r3, [r4, #0]
    1268:	4379      	muls	r1, r7
    126a:	1858      	adds	r0, r3, r1
    126c:	1c39      	adds	r1, r7, #0
    126e:	1c3a      	adds	r2, r7, #0
    1270:	4371      	muls	r1, r6
    1272:	9b00      	ldr	r3, [sp, #0]
    1274:	436a      	muls	r2, r5
    1276:	1859      	adds	r1, r3, r1
    1278:	f000 f93c 	bl	14f4 <memcpy>
    127c:	68e3      	ldr	r3, [r4, #12]
    127e:	195b      	adds	r3, r3, r5
    1280:	60e3      	str	r3, [r4, #12]
    1282:	1973      	adds	r3, r6, r5
    1284:	1c18      	adds	r0, r3, #0
    1286:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001288 <RingBuffer_Pop>:
    1288:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    128a:	68c2      	ldr	r2, [r0, #12]
    128c:	6903      	ldr	r3, [r0, #16]
    128e:	1c04      	adds	r4, r0, #0
    1290:	6807      	ldr	r7, [r0, #0]
    1292:	2000      	movs	r0, #0
    1294:	429a      	cmp	r2, r3
    1296:	d00f      	beq.n	12b8 <RingBuffer_Pop+0x30>
    1298:	1c0d      	adds	r5, r1, #0
    129a:	6920      	ldr	r0, [r4, #16]
    129c:	6861      	ldr	r1, [r4, #4]
    129e:	f000 f938 	bl	1512 <__aeabi_uidiv>
    12a2:	68a6      	ldr	r6, [r4, #8]
    12a4:	1c28      	adds	r0, r5, #0
    12a6:	4371      	muls	r1, r6
    12a8:	1c32      	adds	r2, r6, #0
    12aa:	1879      	adds	r1, r7, r1
    12ac:	f000 f922 	bl	14f4 <memcpy>
    12b0:	2001      	movs	r0, #1
    12b2:	6923      	ldr	r3, [r4, #16]
    12b4:	3301      	adds	r3, #1
    12b6:	6123      	str	r3, [r4, #16]
    12b8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

000012ba <RingBuffer_PopMult>:
    12ba:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    12bc:	6803      	ldr	r3, [r0, #0]
    12be:	68c4      	ldr	r4, [r0, #12]
    12c0:	9301      	str	r3, [sp, #4]
    12c2:	6903      	ldr	r3, [r0, #16]
    12c4:	2600      	movs	r6, #0
    12c6:	429c      	cmp	r4, r3
    12c8:	d038      	beq.n	133c <RingBuffer_PopMult+0x82>
    12ca:	6846      	ldr	r6, [r0, #4]
    12cc:	68c7      	ldr	r7, [r0, #12]
    12ce:	6903      	ldr	r3, [r0, #16]
    12d0:	9100      	str	r1, [sp, #0]
    12d2:	1c04      	adds	r4, r0, #0
    12d4:	1c31      	adds	r1, r6, #0
    12d6:	6900      	ldr	r0, [r0, #16]
    12d8:	1aff      	subs	r7, r7, r3
    12da:	1c15      	adds	r5, r2, #0
    12dc:	f000 f919 	bl	1512 <__aeabi_uidiv>
    12e0:	187b      	adds	r3, r7, r1
    12e2:	1c38      	adds	r0, r7, #0
    12e4:	42b3      	cmp	r3, r6
    12e6:	d300      	bcc.n	12ea <RingBuffer_PopMult+0x30>
    12e8:	1a70      	subs	r0, r6, r1
    12ea:	1a3f      	subs	r7, r7, r0
    12ec:	1e06      	subs	r6, r0, #0
    12ee:	42ae      	cmp	r6, r5
    12f0:	dd00      	ble.n	12f4 <RingBuffer_PopMult+0x3a>
    12f2:	1c2e      	adds	r6, r5, #0
    12f4:	1bad      	subs	r5, r5, r6
    12f6:	42bd      	cmp	r5, r7
    12f8:	dd00      	ble.n	12fc <RingBuffer_PopMult+0x42>
    12fa:	1c3d      	adds	r5, r7, #0
    12fc:	68a2      	ldr	r2, [r4, #8]
    12fe:	9b01      	ldr	r3, [sp, #4]
    1300:	4351      	muls	r1, r2
    1302:	9800      	ldr	r0, [sp, #0]
    1304:	4372      	muls	r2, r6
    1306:	1859      	adds	r1, r3, r1
    1308:	f000 f8f4 	bl	14f4 <memcpy>
    130c:	68a7      	ldr	r7, [r4, #8]
    130e:	6923      	ldr	r3, [r4, #16]
    1310:	1c39      	adds	r1, r7, #0
    1312:	4371      	muls	r1, r6
    1314:	18f0      	adds	r0, r6, r3
    1316:	9b00      	ldr	r3, [sp, #0]
    1318:	6120      	str	r0, [r4, #16]
    131a:	185b      	adds	r3, r3, r1
    131c:	6861      	ldr	r1, [r4, #4]
    131e:	9300      	str	r3, [sp, #0]
    1320:	f000 f8f7 	bl	1512 <__aeabi_uidiv>
    1324:	1c3a      	adds	r2, r7, #0
    1326:	4379      	muls	r1, r7
    1328:	6823      	ldr	r3, [r4, #0]
    132a:	436a      	muls	r2, r5
    132c:	1859      	adds	r1, r3, r1
    132e:	9800      	ldr	r0, [sp, #0]
    1330:	f000 f8e0 	bl	14f4 <memcpy>
    1334:	6923      	ldr	r3, [r4, #16]
    1336:	1976      	adds	r6, r6, r5
    1338:	195b      	adds	r3, r3, r5
    133a:	6123      	str	r3, [r4, #16]
    133c:	1c30      	adds	r0, r6, #0
    133e:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

00001340 <Chip_GPIO_Init>:
    1340:	2140      	movs	r1, #64	; 0x40
    1342:	4a02      	ldr	r2, [pc, #8]	; (134c <Chip_GPIO_Init+0xc>)
    1344:	6fd3      	ldr	r3, [r2, #124]	; 0x7c
    1346:	430b      	orrs	r3, r1
    1348:	67d3      	str	r3, [r2, #124]	; 0x7c
    134a:	4770      	bx	lr
    134c:	40048004 	andmi	r8, r4, r4

00001350 <Chip_SYSCTL_PowerDown>:
    1350:	228e      	movs	r2, #142	; 0x8e
    1352:	4905      	ldr	r1, [pc, #20]	; (1368 <Chip_SYSCTL_PowerDown+0x18>)
    1354:	0092      	lsls	r2, r2, #2
    1356:	588b      	ldr	r3, [r1, r2]
    1358:	4318      	orrs	r0, r3
    135a:	4b04      	ldr	r3, [pc, #16]	; (136c <Chip_SYSCTL_PowerDown+0x1c>)
    135c:	4018      	ands	r0, r3
    135e:	23e8      	movs	r3, #232	; 0xe8
    1360:	021b      	lsls	r3, r3, #8
    1362:	4318      	orrs	r0, r3
    1364:	5088      	str	r0, [r1, r2]
    1366:	4770      	bx	lr
    1368:	40048000 	andmi	r8, r4, r0
    136c:	000005ff 	strdeq	r0, [r0], -pc	; <UNPREDICTABLE>

00001370 <Chip_SYSCTL_PowerUp>:
    1370:	218e      	movs	r1, #142	; 0x8e
    1372:	b510      	push	{r4, lr}
    1374:	4c05      	ldr	r4, [pc, #20]	; (138c <Chip_SYSCTL_PowerUp+0x1c>)
    1376:	0089      	lsls	r1, r1, #2
    1378:	5863      	ldr	r3, [r4, r1]
    137a:	4a05      	ldr	r2, [pc, #20]	; (1390 <Chip_SYSCTL_PowerUp+0x20>)
    137c:	4013      	ands	r3, r2
    137e:	4002      	ands	r2, r0
    1380:	4393      	bics	r3, r2
    1382:	22e8      	movs	r2, #232	; 0xe8
    1384:	0212      	lsls	r2, r2, #8
    1386:	4313      	orrs	r3, r2
    1388:	5063      	str	r3, [r4, r1]
    138a:	bd10      	pop	{r4, pc}
    138c:	40048000 	andmi	r8, r4, r0
    1390:	000005ff 	strdeq	r0, [r0], -pc	; <UNPREDICTABLE>

00001394 <Chip_UART_Init>:
    1394:	b510      	push	{r4, lr}
    1396:	2480      	movs	r4, #128	; 0x80
    1398:	4b07      	ldr	r3, [pc, #28]	; (13b8 <Chip_UART_Init+0x24>)
    139a:	0164      	lsls	r4, r4, #5
    139c:	1d19      	adds	r1, r3, #4
    139e:	6fca      	ldr	r2, [r1, #124]	; 0x7c
    13a0:	3398      	adds	r3, #152	; 0x98
    13a2:	4322      	orrs	r2, r4
    13a4:	67ca      	str	r2, [r1, #124]	; 0x7c
    13a6:	2201      	movs	r2, #1
    13a8:	601a      	str	r2, [r3, #0]
    13aa:	2307      	movs	r3, #7
    13ac:	6083      	str	r3, [r0, #8]
    13ae:	3b04      	subs	r3, #4
    13b0:	60c3      	str	r3, [r0, #12]
    13b2:	330d      	adds	r3, #13
    13b4:	6283      	str	r3, [r0, #40]	; 0x28
    13b6:	bd10      	pop	{r4, pc}
    13b8:	40048000 	andmi	r8, r4, r0

000013bc <Chip_UART_RXIntHandlerRB>:
    13bc:	b537      	push	{r0, r1, r2, r4, r5, lr}
    13be:	1c04      	adds	r4, r0, #0
    13c0:	1c0d      	adds	r5, r1, #0
    13c2:	6963      	ldr	r3, [r4, #20]
    13c4:	07db      	lsls	r3, r3, #31
    13c6:	d507      	bpl.n	13d8 <Chip_UART_RXIntHandlerRB+0x1c>
    13c8:	466a      	mov	r2, sp
    13ca:	6823      	ldr	r3, [r4, #0]
    13cc:	1dd1      	adds	r1, r2, #7
    13ce:	1c28      	adds	r0, r5, #0
    13d0:	700b      	strb	r3, [r1, #0]
    13d2:	f7ff fefb 	bl	11cc <RingBuffer_Insert>
    13d6:	e7f4      	b.n	13c2 <Chip_UART_RXIntHandlerRB+0x6>
    13d8:	bd37      	pop	{r0, r1, r2, r4, r5, pc}

000013da <Chip_UART_TXIntHandlerRB>:
    13da:	b573      	push	{r0, r1, r4, r5, r6, lr}
    13dc:	1c05      	adds	r5, r0, #0
    13de:	1c0e      	adds	r6, r1, #0
    13e0:	696b      	ldr	r3, [r5, #20]
    13e2:	069b      	lsls	r3, r3, #26
    13e4:	d50a      	bpl.n	13fc <Chip_UART_TXIntHandlerRB+0x22>
    13e6:	466b      	mov	r3, sp
    13e8:	1ddc      	adds	r4, r3, #7
    13ea:	1c30      	adds	r0, r6, #0
    13ec:	1c21      	adds	r1, r4, #0
    13ee:	f7ff ff4b 	bl	1288 <RingBuffer_Pop>
    13f2:	2800      	cmp	r0, #0
    13f4:	d002      	beq.n	13fc <Chip_UART_TXIntHandlerRB+0x22>
    13f6:	7823      	ldrb	r3, [r4, #0]
    13f8:	602b      	str	r3, [r5, #0]
    13fa:	e7f1      	b.n	13e0 <Chip_UART_TXIntHandlerRB+0x6>
    13fc:	bd73      	pop	{r0, r1, r4, r5, r6, pc}

000013fe <Chip_UART_SendRB>:
    13fe:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    1400:	1c16      	adds	r6, r2, #0
    1402:	2202      	movs	r2, #2
    1404:	9301      	str	r3, [sp, #4]
    1406:	6843      	ldr	r3, [r0, #4]
    1408:	1c05      	adds	r5, r0, #0
    140a:	4393      	bics	r3, r2
    140c:	1c0f      	adds	r7, r1, #0
    140e:	6043      	str	r3, [r0, #4]
    1410:	9a01      	ldr	r2, [sp, #4]
    1412:	1c08      	adds	r0, r1, #0
    1414:	1c31      	adds	r1, r6, #0
    1416:	f7ff fef4 	bl	1202 <RingBuffer_InsertMult>
    141a:	1c04      	adds	r4, r0, #0
    141c:	1c39      	adds	r1, r7, #0
    141e:	1c28      	adds	r0, r5, #0
    1420:	f7ff ffdb 	bl	13da <Chip_UART_TXIntHandlerRB>
    1424:	9b01      	ldr	r3, [sp, #4]
    1426:	1931      	adds	r1, r6, r4
    1428:	1b1a      	subs	r2, r3, r4
    142a:	1c38      	adds	r0, r7, #0
    142c:	f7ff fee9 	bl	1202 <RingBuffer_InsertMult>
    1430:	2202      	movs	r2, #2
    1432:	686b      	ldr	r3, [r5, #4]
    1434:	1900      	adds	r0, r0, r4
    1436:	4313      	orrs	r3, r2
    1438:	606b      	str	r3, [r5, #4]
    143a:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

0000143c <Chip_UART_ReadRB>:
    143c:	b508      	push	{r3, lr}
    143e:	1c08      	adds	r0, r1, #0
    1440:	1c11      	adds	r1, r2, #0
    1442:	1c1a      	adds	r2, r3, #0
    1444:	f7ff ff39 	bl	12ba <RingBuffer_PopMult>
    1448:	bd08      	pop	{r3, pc}

0000144a <Chip_UART_IRQRBHandler>:
    144a:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    144c:	2602      	movs	r6, #2
    144e:	6843      	ldr	r3, [r0, #4]
    1450:	1c04      	adds	r4, r0, #0
    1452:	1c0d      	adds	r5, r1, #0
    1454:	1c17      	adds	r7, r2, #0
    1456:	4233      	tst	r3, r6
    1458:	d009      	beq.n	146e <Chip_UART_IRQRBHandler+0x24>
    145a:	1c11      	adds	r1, r2, #0
    145c:	f7ff ffbd 	bl	13da <Chip_UART_TXIntHandlerRB>
    1460:	68fa      	ldr	r2, [r7, #12]
    1462:	693b      	ldr	r3, [r7, #16]
    1464:	429a      	cmp	r2, r3
    1466:	d102      	bne.n	146e <Chip_UART_IRQRBHandler+0x24>
    1468:	6863      	ldr	r3, [r4, #4]
    146a:	43b3      	bics	r3, r6
    146c:	6063      	str	r3, [r4, #4]
    146e:	1c29      	adds	r1, r5, #0
    1470:	1c20      	adds	r0, r4, #0
    1472:	f7ff ffa3 	bl	13bc <Chip_UART_RXIntHandlerRB>
    1476:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00001478 <Chip_UART_SetBaudFDR>:
    1478:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    147a:	010d      	lsls	r5, r1, #4
    147c:	1c06      	adds	r6, r0, #0
    147e:	f7ff fe33 	bl	10e8 <Chip_Clock_GetMainClockRate>
    1482:	1c29      	adds	r1, r5, #0
    1484:	1c07      	adds	r7, r0, #0
    1486:	f000 f844 	bl	1512 <__aeabi_uidiv>
    148a:	2000      	movs	r0, #0
    148c:	1e0c      	subs	r4, r1, #0
    148e:	4284      	cmp	r4, r0
    1490:	d006      	beq.n	14a0 <Chip_UART_SetBaudFDR+0x28>
    1492:	1c28      	adds	r0, r5, #0
    1494:	f000 f83d 	bl	1512 <__aeabi_uidiv>
    1498:	2400      	movs	r4, #0
    149a:	230c      	movs	r3, #12
    149c:	4283      	cmp	r3, r0
    149e:	4164      	adcs	r4, r4
    14a0:	230f      	movs	r3, #15
    14a2:	4018      	ands	r0, r3
    14a4:	9001      	str	r0, [sp, #4]
    14a6:	1c28      	adds	r0, r5, #0
    14a8:	9901      	ldr	r1, [sp, #4]
    14aa:	4360      	muls	r0, r4
    14ac:	f000 f831 	bl	1512 <__aeabi_uidiv>
    14b0:	1941      	adds	r1, r0, r5
    14b2:	1c38      	adds	r0, r7, #0
    14b4:	f000 f82d 	bl	1512 <__aeabi_uidiv>
    14b8:	2280      	movs	r2, #128	; 0x80
    14ba:	68f3      	ldr	r3, [r6, #12]
    14bc:	1c01      	adds	r1, r0, #0
    14be:	4313      	orrs	r3, r2
    14c0:	60f3      	str	r3, [r6, #12]
    14c2:	23ff      	movs	r3, #255	; 0xff
    14c4:	1c05      	adds	r5, r0, #0
    14c6:	4019      	ands	r1, r3
    14c8:	6031      	str	r1, [r6, #0]
    14ca:	0a01      	lsrs	r1, r0, #8
    14cc:	400b      	ands	r3, r1
    14ce:	6073      	str	r3, [r6, #4]
    14d0:	68f3      	ldr	r3, [r6, #12]
    14d2:	0120      	lsls	r0, r4, #4
    14d4:	4393      	bics	r3, r2
    14d6:	60f3      	str	r3, [r6, #12]
    14d8:	9b01      	ldr	r3, [sp, #4]
    14da:	9901      	ldr	r1, [sp, #4]
    14dc:	011b      	lsls	r3, r3, #4
    14de:	4323      	orrs	r3, r4
    14e0:	62b3      	str	r3, [r6, #40]	; 0x28
    14e2:	4368      	muls	r0, r5
    14e4:	f000 f815 	bl	1512 <__aeabi_uidiv>
    14e8:	012d      	lsls	r5, r5, #4
    14ea:	1941      	adds	r1, r0, r5
    14ec:	1c38      	adds	r0, r7, #0
    14ee:	f000 f810 	bl	1512 <__aeabi_uidiv>
    14f2:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}

000014f4 <memcpy>:
    14f4:	b508      	push	{r3, lr}
    14f6:	f000 fa2e 	bl	1956 <__aeabi_memcpy>
    14fa:	bd08      	pop	{r3, pc}

000014fc <memset>:
    14fc:	b508      	push	{r3, lr}
    14fe:	f000 fa40 	bl	1982 <__aeabi_lowlevel_memset>
    1502:	bd08      	pop	{r3, pc}

00001504 <__weak_main>:
    1504:	b508      	push	{r3, lr}
    1506:	f7ff f9ed 	bl	8e4 <main>
    150a:	bd08      	pop	{r3, pc}

0000150c <__aeabi_idiv>:
    150c:	0003      	movs	r3, r0
    150e:	430b      	orrs	r3, r1
    1510:	d421      	bmi.n	1556 <idiv_negative>

00001512 <__aeabi_uidiv>:
    1512:	2900      	cmp	r1, #0
    1514:	d031      	beq.n	157a <idiv_divzero>
    1516:	2201      	movs	r2, #1
    1518:	07d2      	lsls	r2, r2, #31
    151a:	0903      	lsrs	r3, r0, #4
    151c:	e001      	b.n	1522 <div_search4a>

0000151e <div_search4>:
    151e:	0109      	lsls	r1, r1, #4
    1520:	0912      	lsrs	r2, r2, #4

00001522 <div_search4a>:
    1522:	4299      	cmp	r1, r3
    1524:	d9fb      	bls.n	151e <div_search4>
    1526:	0843      	lsrs	r3, r0, #1
    1528:	e001      	b.n	152e <div_search1a>

0000152a <div_search1>:
    152a:	0049      	lsls	r1, r1, #1
    152c:	0852      	lsrs	r2, r2, #1

0000152e <div_search1a>:
    152e:	4299      	cmp	r1, r3
    1530:	d9fb      	bls.n	152a <div_search1>
    1532:	e000      	b.n	1536 <div_loop1a>

00001534 <div_loop1>:
    1534:	0849      	lsrs	r1, r1, #1

00001536 <div_loop1a>:
    1536:	1a40      	subs	r0, r0, r1
    1538:	d307      	bcc.n	154a <div1>

0000153a <div2>:
    153a:	4152      	adcs	r2, r2
    153c:	d3fa      	bcc.n	1534 <div_loop1>
    153e:	4601      	mov	r1, r0
    1540:	4610      	mov	r0, r2
    1542:	4770      	bx	lr

00001544 <div_loop2>:
    1544:	0849      	lsrs	r1, r1, #1
    1546:	1840      	adds	r0, r0, r1
    1548:	d2f7      	bcs.n	153a <div2>

0000154a <div1>:
    154a:	1892      	adds	r2, r2, r2
    154c:	d3fa      	bcc.n	1544 <div_loop2>
    154e:	1840      	adds	r0, r0, r1
    1550:	4601      	mov	r1, r0
    1552:	4610      	mov	r0, r2
    1554:	4770      	bx	lr

00001556 <idiv_negative>:
    1556:	0fcb      	lsrs	r3, r1, #31
    1558:	d000      	beq.n	155c <idiv_neg1>
    155a:	4249      	negs	r1, r1

0000155c <idiv_neg1>:
    155c:	1002      	asrs	r2, r0, #32
    155e:	d500      	bpl.n	1562 <idiv_neg2>
    1560:	4240      	negs	r0, r0

00001562 <idiv_neg2>:
    1562:	4053      	eors	r3, r2
    1564:	b508      	push	{r3, lr}
    1566:	f7ff ffd4 	bl	1512 <__aeabi_uidiv>
    156a:	bc0c      	pop	{r2, r3}

0000156c <idiv_sign>:
    156c:	1052      	asrs	r2, r2, #1
    156e:	d300      	bcc.n	1572 <idiv_sign1>
    1570:	4240      	negs	r0, r0

00001572 <idiv_sign1>:
    1572:	2a00      	cmp	r2, #0
    1574:	d500      	bpl.n	1578 <idiv_ret>
    1576:	4249      	negs	r1, r1

00001578 <idiv_ret>:
    1578:	4718      	bx	r3

0000157a <idiv_divzero>:
    157a:	46f4      	mov	ip, lr
    157c:	2000      	movs	r0, #0
    157e:	f000 f801 	bl	1584 <__aeabi_idiv0>
    1582:	4760      	bx	ip

00001584 <__aeabi_idiv0>:
    1584:	4770      	bx	lr
	...

00001588 <__aeabi_dmul>:
    1588:	b5f0      	push	{r4, r5, r6, r7, lr}
    158a:	1c07      	adds	r7, r0, #0
    158c:	1c08      	adds	r0, r1, #0
    158e:	004d      	lsls	r5, r1, #1
    1590:	b087      	sub	sp, #28
    1592:	0d6d      	lsrs	r5, r5, #21
    1594:	4058      	eors	r0, r3
    1596:	2d00      	cmp	r5, #0
    1598:	d07d      	beq.n	1696 <__aeabi_dmul+0x10e>
    159a:	4c50      	ldr	r4, [pc, #320]	; (16dc <__aeabi_dmul+0x154>)
    159c:	42a5      	cmp	r5, r4
    159e:	d07a      	beq.n	1696 <__aeabi_dmul+0x10e>
    15a0:	005e      	lsls	r6, r3, #1
    15a2:	0d76      	lsrs	r6, r6, #21
    15a4:	d077      	beq.n	1696 <__aeabi_dmul+0x10e>
    15a6:	42a6      	cmp	r6, r4
    15a8:	d075      	beq.n	1696 <__aeabi_dmul+0x10e>
    15aa:	1c14      	adds	r4, r2, #0
    15ac:	1972      	adds	r2, r6, r5
    15ae:	2580      	movs	r5, #128	; 0x80
    15b0:	0309      	lsls	r1, r1, #12
    15b2:	2680      	movs	r6, #128	; 0x80
    15b4:	0b09      	lsrs	r1, r1, #12
    15b6:	036d      	lsls	r5, r5, #13
    15b8:	430d      	orrs	r5, r1
    15ba:	2100      	movs	r1, #0
    15bc:	0fc0      	lsrs	r0, r0, #31
    15be:	9201      	str	r2, [sp, #4]
    15c0:	07c2      	lsls	r2, r0, #31
    15c2:	9200      	str	r2, [sp, #0]
    15c4:	02db      	lsls	r3, r3, #11
    15c6:	0d62      	lsrs	r2, r4, #21
    15c8:	4313      	orrs	r3, r2
    15ca:	0636      	lsls	r6, r6, #24
    15cc:	431e      	orrs	r6, r3
    15ce:	1c2a      	adds	r2, r5, #0
    15d0:	1c30      	adds	r0, r6, #0
    15d2:	1c0b      	adds	r3, r1, #0
    15d4:	f000 f9a8 	bl	1928 <__aeabi_lmul>
    15d8:	9002      	str	r0, [sp, #8]
    15da:	9103      	str	r1, [sp, #12]
    15dc:	2100      	movs	r1, #0
    15de:	02e4      	lsls	r4, r4, #11
    15e0:	1c22      	adds	r2, r4, #0
    15e2:	1c28      	adds	r0, r5, #0
    15e4:	1c0b      	adds	r3, r1, #0
    15e6:	f000 f99f 	bl	1928 <__aeabi_lmul>
    15ea:	9105      	str	r1, [sp, #20]
    15ec:	2100      	movs	r1, #0
    15ee:	1c3a      	adds	r2, r7, #0
    15f0:	9004      	str	r0, [sp, #16]
    15f2:	1c0b      	adds	r3, r1, #0
    15f4:	1c30      	adds	r0, r6, #0
    15f6:	f000 f997 	bl	1928 <__aeabi_lmul>
    15fa:	1c0e      	adds	r6, r1, #0
    15fc:	2100      	movs	r1, #0
    15fe:	1c3a      	adds	r2, r7, #0
    1600:	1c05      	adds	r5, r0, #0
    1602:	1c0b      	adds	r3, r1, #0
    1604:	1c20      	adds	r0, r4, #0
    1606:	f000 f98f 	bl	1928 <__aeabi_lmul>
    160a:	4684      	mov	ip, r0
    160c:	1c08      	adds	r0, r1, #0
    160e:	2100      	movs	r1, #0
    1610:	1c0b      	adds	r3, r1, #0
    1612:	9a04      	ldr	r2, [sp, #16]
    1614:	1c0f      	adds	r7, r1, #0
    1616:	1812      	adds	r2, r2, r0
    1618:	414b      	adcs	r3, r1
    161a:	1952      	adds	r2, r2, r5
    161c:	4173      	adcs	r3, r6
    161e:	1c1e      	adds	r6, r3, #0
    1620:	1c0b      	adds	r3, r1, #0
    1622:	9802      	ldr	r0, [sp, #8]
    1624:	9903      	ldr	r1, [sp, #12]
    1626:	1c14      	adds	r4, r2, #0
    1628:	9a05      	ldr	r2, [sp, #20]
    162a:	1992      	adds	r2, r2, r6
    162c:	417b      	adcs	r3, r7
    162e:	1812      	adds	r2, r2, r0
    1630:	414b      	adcs	r3, r1
    1632:	4661      	mov	r1, ip
    1634:	0888      	lsrs	r0, r1, #2
    1636:	4304      	orrs	r4, r0
    1638:	9901      	ldr	r1, [sp, #4]
    163a:	4829      	ldr	r0, [pc, #164]	; (16e0 <__aeabi_dmul+0x158>)
    163c:	1809      	adds	r1, r1, r0
    163e:	4829      	ldr	r0, [pc, #164]	; (16e4 <__aeabi_dmul+0x15c>)
    1640:	4298      	cmp	r0, r3
    1642:	d30c      	bcc.n	165e <__aeabi_dmul+0xd6>
    1644:	1c16      	adds	r6, r2, #0
    1646:	1c1f      	adds	r7, r3, #0
    1648:	18b6      	adds	r6, r6, r2
    164a:	415f      	adcs	r7, r3
    164c:	4826      	ldr	r0, [pc, #152]	; (16e8 <__aeabi_dmul+0x160>)
    164e:	1c3b      	adds	r3, r7, #0
    1650:	4684      	mov	ip, r0
    1652:	0fe0      	lsrs	r0, r4, #31
    1654:	4330      	orrs	r0, r6
    1656:	1c02      	adds	r2, r0, #0
    1658:	9901      	ldr	r1, [sp, #4]
    165a:	0064      	lsls	r4, r4, #1
    165c:	4461      	add	r1, ip
    165e:	2700      	movs	r7, #0
    1660:	0fe6      	lsrs	r6, r4, #31
    1662:	1992      	adds	r2, r2, r6
    1664:	417b      	adcs	r3, r7
    1666:	2080      	movs	r0, #128	; 0x80
    1668:	1c15      	adds	r5, r2, #0
    166a:	0600      	lsls	r0, r0, #24
    166c:	4284      	cmp	r4, r0
    166e:	d101      	bne.n	1674 <__aeabi_dmul+0xec>
    1670:	2001      	movs	r0, #1
    1672:	4385      	bics	r5, r0
    1674:	481d      	ldr	r0, [pc, #116]	; (16ec <__aeabi_dmul+0x164>)
    1676:	4281      	cmp	r1, r0
    1678:	d805      	bhi.n	1686 <__aeabi_dmul+0xfe>
    167a:	050a      	lsls	r2, r1, #20
    167c:	9900      	ldr	r1, [sp, #0]
    167e:	1c28      	adds	r0, r5, #0
    1680:	4319      	orrs	r1, r3
    1682:	1851      	adds	r1, r2, r1
    1684:	e027      	b.n	16d6 <__aeabi_dmul+0x14e>
    1686:	9b00      	ldr	r3, [sp, #0]
    1688:	2900      	cmp	r1, #0
    168a:	db02      	blt.n	1692 <__aeabi_dmul+0x10a>
    168c:	4b18      	ldr	r3, [pc, #96]	; (16f0 <__aeabi_dmul+0x168>)
    168e:	9a00      	ldr	r2, [sp, #0]
    1690:	4313      	orrs	r3, r2
    1692:	2000      	movs	r0, #0
    1694:	e01e      	b.n	16d4 <__aeabi_dmul+0x14c>
    1696:	0fc2      	lsrs	r2, r0, #31
    1698:	4816      	ldr	r0, [pc, #88]	; (16f4 <__aeabi_dmul+0x16c>)
    169a:	07d2      	lsls	r2, r2, #31
    169c:	0049      	lsls	r1, r1, #1
    169e:	4281      	cmp	r1, r0
    16a0:	d805      	bhi.n	16ae <__aeabi_dmul+0x126>
    16a2:	005c      	lsls	r4, r3, #1
    16a4:	4284      	cmp	r4, r0
    16a6:	d805      	bhi.n	16b4 <__aeabi_dmul+0x12c>
    16a8:	2000      	movs	r0, #0
    16aa:	1c11      	adds	r1, r2, #0
    16ac:	e013      	b.n	16d6 <__aeabi_dmul+0x14e>
    16ae:	4812      	ldr	r0, [pc, #72]	; (16f8 <__aeabi_dmul+0x170>)
    16b0:	4281      	cmp	r1, r0
    16b2:	d103      	bne.n	16bc <__aeabi_dmul+0x134>
    16b4:	4810      	ldr	r0, [pc, #64]	; (16f8 <__aeabi_dmul+0x170>)
    16b6:	005b      	lsls	r3, r3, #1
    16b8:	4283      	cmp	r3, r0
    16ba:	d901      	bls.n	16c0 <__aeabi_dmul+0x138>
    16bc:	2000      	movs	r0, #0
    16be:	e005      	b.n	16cc <__aeabi_dmul+0x144>
    16c0:	0d49      	lsrs	r1, r1, #21
    16c2:	2000      	movs	r0, #0
    16c4:	2900      	cmp	r1, #0
    16c6:	d001      	beq.n	16cc <__aeabi_dmul+0x144>
    16c8:	0d5b      	lsrs	r3, r3, #21
    16ca:	d101      	bne.n	16d0 <__aeabi_dmul+0x148>
    16cc:	490b      	ldr	r1, [pc, #44]	; (16fc <__aeabi_dmul+0x174>)
    16ce:	e002      	b.n	16d6 <__aeabi_dmul+0x14e>
    16d0:	4b07      	ldr	r3, [pc, #28]	; (16f0 <__aeabi_dmul+0x168>)
    16d2:	4313      	orrs	r3, r2
    16d4:	1c19      	adds	r1, r3, #0
    16d6:	b007      	add	sp, #28
    16d8:	bdf0      	pop	{r4, r5, r6, r7, pc}
    16da:	46c0      	nop			; (mov r8, r8)
    16dc:	000007ff 	strdeq	r0, [r0], -pc	; <UNPREDICTABLE>
    16e0:	fffffc01 			; <UNDEFINED> instruction: 0xfffffc01
    16e4:	000fffff 	strdeq	pc, [pc], -pc	; <UNPREDICTABLE>
    16e8:	fffffc00 			; <UNDEFINED> instruction: 0xfffffc00
    16ec:	000007fd 	strdeq	r0, [r0], -sp
    16f0:	7ff00000 	svcvc	0x00f00000	; IMB
    16f4:	ffdfffff 			; <UNDEFINED> instruction: 0xffdfffff
    16f8:	ffe00000 			; <UNDEFINED> instruction: 0xffe00000
    16fc:	7ff80000 	svcvc	0x00f80000

00001700 <__aeabi_d2f>:
    1700:	b530      	push	{r4, r5, lr}
    1702:	1c02      	adds	r2, r0, #0
    1704:	4c12      	ldr	r4, [pc, #72]	; (1750 <__aeabi_d2f+0x50>)
    1706:	0fc8      	lsrs	r0, r1, #31
    1708:	0049      	lsls	r1, r1, #1
    170a:	07c3      	lsls	r3, r0, #31
    170c:	4d11      	ldr	r5, [pc, #68]	; (1754 <__aeabi_d2f+0x54>)
    170e:	0848      	lsrs	r0, r1, #1
    1710:	1904      	adds	r4, r0, r4
    1712:	42ac      	cmp	r4, r5
    1714:	d80f      	bhi.n	1736 <__aeabi_d2f+0x36>
    1716:	24c8      	movs	r4, #200	; 0xc8
    1718:	0624      	lsls	r4, r4, #24
    171a:	1900      	adds	r0, r0, r4
    171c:	00d1      	lsls	r1, r2, #3
    171e:	00c0      	lsls	r0, r0, #3
    1720:	0f52      	lsrs	r2, r2, #29
    1722:	4302      	orrs	r2, r0
    1724:	0fc8      	lsrs	r0, r1, #31
    1726:	1810      	adds	r0, r2, r0
    1728:	2280      	movs	r2, #128	; 0x80
    172a:	0612      	lsls	r2, r2, #24
    172c:	4291      	cmp	r1, r2
    172e:	d10a      	bne.n	1746 <__aeabi_d2f+0x46>
    1730:	2201      	movs	r2, #1
    1732:	4390      	bics	r0, r2
    1734:	e007      	b.n	1746 <__aeabi_d2f+0x46>
    1736:	1c18      	adds	r0, r3, #0
    1738:	2c00      	cmp	r4, #0
    173a:	db07      	blt.n	174c <__aeabi_d2f+0x4c>
    173c:	4a06      	ldr	r2, [pc, #24]	; (1758 <__aeabi_d2f+0x58>)
    173e:	4291      	cmp	r1, r2
    1740:	d803      	bhi.n	174a <__aeabi_d2f+0x4a>
    1742:	20ff      	movs	r0, #255	; 0xff
    1744:	05c0      	lsls	r0, r0, #23
    1746:	4318      	orrs	r0, r3
    1748:	e000      	b.n	174c <__aeabi_d2f+0x4c>
    174a:	4804      	ldr	r0, [pc, #16]	; (175c <__aeabi_d2f+0x5c>)
    174c:	bd30      	pop	{r4, r5, pc}
    174e:	46c0      	nop			; (mov r8, r8)
    1750:	c7f00000 	ldrbgt	r0, [r0, r0]!
    1754:	0fdfffff 	svceq	0x00dfffff
    1758:	ffe00000 			; <UNDEFINED> instruction: 0xffe00000
    175c:	7fc00000 	svcvc	0x00c00000

00001760 <__bhs_ui2d>:
    1760:	b510      	push	{r4, lr}
    1762:	2800      	cmp	r0, #0
    1764:	d102      	bne.n	176c <__bhs_ui2d+0xc>
    1766:	1c03      	adds	r3, r0, #0
    1768:	1c02      	adds	r2, r0, #0
    176a:	e025      	b.n	17b8 <__bhs_ui2d+0x58>
    176c:	0c03      	lsrs	r3, r0, #16
    176e:	d101      	bne.n	1774 <__bhs_ui2d+0x14>
    1770:	0400      	lsls	r0, r0, #16
    1772:	e002      	b.n	177a <__bhs_ui2d+0x1a>
    1774:	2380      	movs	r3, #128	; 0x80
    1776:	045b      	lsls	r3, r3, #17
    1778:	18c9      	adds	r1, r1, r3
    177a:	0e03      	lsrs	r3, r0, #24
    177c:	d101      	bne.n	1782 <__bhs_ui2d+0x22>
    177e:	0200      	lsls	r0, r0, #8
    1780:	e002      	b.n	1788 <__bhs_ui2d+0x28>
    1782:	2380      	movs	r3, #128	; 0x80
    1784:	041b      	lsls	r3, r3, #16
    1786:	18c9      	adds	r1, r1, r3
    1788:	0f03      	lsrs	r3, r0, #28
    178a:	d101      	bne.n	1790 <__bhs_ui2d+0x30>
    178c:	0100      	lsls	r0, r0, #4
    178e:	e002      	b.n	1796 <__bhs_ui2d+0x36>
    1790:	2380      	movs	r3, #128	; 0x80
    1792:	03db      	lsls	r3, r3, #15
    1794:	18c9      	adds	r1, r1, r3
    1796:	0f83      	lsrs	r3, r0, #30
    1798:	d101      	bne.n	179e <__bhs_ui2d+0x3e>
    179a:	0080      	lsls	r0, r0, #2
    179c:	e002      	b.n	17a4 <__bhs_ui2d+0x44>
    179e:	2380      	movs	r3, #128	; 0x80
    17a0:	039b      	lsls	r3, r3, #14
    17a2:	18c9      	adds	r1, r1, r3
    17a4:	2800      	cmp	r0, #0
    17a6:	db01      	blt.n	17ac <__bhs_ui2d+0x4c>
    17a8:	0040      	lsls	r0, r0, #1
    17aa:	e002      	b.n	17b2 <__bhs_ui2d+0x52>
    17ac:	2380      	movs	r3, #128	; 0x80
    17ae:	035b      	lsls	r3, r3, #13
    17b0:	18c9      	adds	r1, r1, r3
    17b2:	12c4      	asrs	r4, r0, #11
    17b4:	1863      	adds	r3, r4, r1
    17b6:	0542      	lsls	r2, r0, #21
    17b8:	1c10      	adds	r0, r2, #0
    17ba:	1c19      	adds	r1, r3, #0
    17bc:	bd10      	pop	{r4, pc}

000017be <__aeabi_i2d>:
    17be:	0fc1      	lsrs	r1, r0, #31
    17c0:	b508      	push	{r3, lr}
    17c2:	07c9      	lsls	r1, r1, #31
    17c4:	d000      	beq.n	17c8 <__aeabi_i2d+0xa>
    17c6:	4240      	negs	r0, r0
    17c8:	2380      	movs	r3, #128	; 0x80
    17ca:	05db      	lsls	r3, r3, #23
    17cc:	18c9      	adds	r1, r1, r3
    17ce:	f7ff ffc7 	bl	1760 <__bhs_ui2d>
    17d2:	bd08      	pop	{r3, pc}

000017d4 <__aeabi_fmul>:
    17d4:	b570      	push	{r4, r5, r6, lr}
    17d6:	0dc5      	lsrs	r5, r0, #23
    17d8:	23ff      	movs	r3, #255	; 0xff
    17da:	1c2a      	adds	r2, r5, #0
    17dc:	1c0c      	adds	r4, r1, #0
    17de:	401a      	ands	r2, r3
    17e0:	4044      	eors	r4, r0
    17e2:	2a00      	cmp	r2, #0
    17e4:	d033      	beq.n	184e <__aeabi_fmul+0x7a>
    17e6:	429a      	cmp	r2, r3
    17e8:	d031      	beq.n	184e <__aeabi_fmul+0x7a>
    17ea:	0dcd      	lsrs	r5, r1, #23
    17ec:	401d      	ands	r5, r3
    17ee:	d02e      	beq.n	184e <__aeabi_fmul+0x7a>
    17f0:	429d      	cmp	r5, r3
    17f2:	d02c      	beq.n	184e <__aeabi_fmul+0x7a>
    17f4:	1955      	adds	r5, r2, r5
    17f6:	2280      	movs	r2, #128	; 0x80
    17f8:	0209      	lsls	r1, r1, #8
    17fa:	0612      	lsls	r2, r2, #24
    17fc:	0200      	lsls	r0, r0, #8
    17fe:	4310      	orrs	r0, r2
    1800:	430a      	orrs	r2, r1
    1802:	2100      	movs	r1, #0
    1804:	1c0b      	adds	r3, r1, #0
    1806:	f000 f88f 	bl	1928 <__aeabi_lmul>
    180a:	1e0e      	subs	r6, r1, #0
    180c:	da01      	bge.n	1812 <__aeabi_fmul+0x3e>
    180e:	3d7f      	subs	r5, #127	; 0x7f
    1810:	e001      	b.n	1816 <__aeabi_fmul+0x42>
    1812:	3d80      	subs	r5, #128	; 0x80
    1814:	004e      	lsls	r6, r1, #1
    1816:	0fe4      	lsrs	r4, r4, #31
    1818:	0a33      	lsrs	r3, r6, #8
    181a:	07e4      	lsls	r4, r4, #31
    181c:	05ea      	lsls	r2, r5, #23
    181e:	4323      	orrs	r3, r4
    1820:	189b      	adds	r3, r3, r2
    1822:	2280      	movs	r2, #128	; 0x80
    1824:	0636      	lsls	r6, r6, #24
    1826:	0612      	lsls	r2, r2, #24
    1828:	4296      	cmp	r6, r2
    182a:	d004      	beq.n	1836 <__aeabi_fmul+0x62>
    182c:	2dfd      	cmp	r5, #253	; 0xfd
    182e:	d802      	bhi.n	1836 <__aeabi_fmul+0x62>
    1830:	0ff6      	lsrs	r6, r6, #31
    1832:	1998      	adds	r0, r3, r6
    1834:	e029      	b.n	188a <__aeabi_fmul+0xb6>
    1836:	3301      	adds	r3, #1
    1838:	2800      	cmp	r0, #0
    183a:	d101      	bne.n	1840 <__aeabi_fmul+0x6c>
    183c:	2201      	movs	r2, #1
    183e:	4393      	bics	r3, r2
    1840:	1c18      	adds	r0, r3, #0
    1842:	2dfd      	cmp	r5, #253	; 0xfd
    1844:	d921      	bls.n	188a <__aeabi_fmul+0xb6>
    1846:	1c20      	adds	r0, r4, #0
    1848:	2d00      	cmp	r5, #0
    184a:	da19      	bge.n	1880 <__aeabi_fmul+0xac>
    184c:	e01d      	b.n	188a <__aeabi_fmul+0xb6>
    184e:	4b0f      	ldr	r3, [pc, #60]	; (188c <__aeabi_fmul+0xb8>)
    1850:	0040      	lsls	r0, r0, #1
    1852:	4298      	cmp	r0, r3
    1854:	d805      	bhi.n	1862 <__aeabi_fmul+0x8e>
    1856:	004a      	lsls	r2, r1, #1
    1858:	429a      	cmp	r2, r3
    185a:	d806      	bhi.n	186a <__aeabi_fmul+0x96>
    185c:	0fe0      	lsrs	r0, r4, #31
    185e:	07c0      	lsls	r0, r0, #31
    1860:	e013      	b.n	188a <__aeabi_fmul+0xb6>
    1862:	23ff      	movs	r3, #255	; 0xff
    1864:	061b      	lsls	r3, r3, #24
    1866:	4298      	cmp	r0, r3
    1868:	d10e      	bne.n	1888 <__aeabi_fmul+0xb4>
    186a:	23ff      	movs	r3, #255	; 0xff
    186c:	0049      	lsls	r1, r1, #1
    186e:	061b      	lsls	r3, r3, #24
    1870:	4299      	cmp	r1, r3
    1872:	d809      	bhi.n	1888 <__aeabi_fmul+0xb4>
    1874:	0e00      	lsrs	r0, r0, #24
    1876:	d007      	beq.n	1888 <__aeabi_fmul+0xb4>
    1878:	0e09      	lsrs	r1, r1, #24
    187a:	d005      	beq.n	1888 <__aeabi_fmul+0xb4>
    187c:	0fe4      	lsrs	r4, r4, #31
    187e:	07e4      	lsls	r4, r4, #31
    1880:	20ff      	movs	r0, #255	; 0xff
    1882:	05c0      	lsls	r0, r0, #23
    1884:	4320      	orrs	r0, r4
    1886:	e000      	b.n	188a <__aeabi_fmul+0xb6>
    1888:	4801      	ldr	r0, [pc, #4]	; (1890 <__aeabi_fmul+0xbc>)
    188a:	bd70      	pop	{r4, r5, r6, pc}
    188c:	feffffff 	mrc2	15, 7, pc, cr15, cr15, {7}
    1890:	7fc00000 	svcvc	0x00c00000

00001894 <__aeabi_f2uiz>:
    1894:	b510      	push	{r4, lr}
    1896:	2480      	movs	r4, #128	; 0x80
    1898:	239e      	movs	r3, #158	; 0x9e
    189a:	0dc1      	lsrs	r1, r0, #23
    189c:	0202      	lsls	r2, r0, #8
    189e:	0624      	lsls	r4, r4, #24
    18a0:	4322      	orrs	r2, r4
    18a2:	1a5b      	subs	r3, r3, r1
    18a4:	d402      	bmi.n	18ac <__aeabi_f2uiz+0x18>
    18a6:	40da      	lsrs	r2, r3
    18a8:	1c10      	adds	r0, r2, #0
    18aa:	e006      	b.n	18ba <__aeabi_f2uiz+0x26>
    18ac:	29fe      	cmp	r1, #254	; 0xfe
    18ae:	d902      	bls.n	18b6 <__aeabi_f2uiz+0x22>
    18b0:	2000      	movs	r0, #0
    18b2:	42a2      	cmp	r2, r4
    18b4:	d101      	bne.n	18ba <__aeabi_f2uiz+0x26>
    18b6:	0a09      	lsrs	r1, r1, #8
    18b8:	1e48      	subs	r0, r1, #1
    18ba:	bd10      	pop	{r4, pc}

000018bc <__bhs_ui2f>:
    18bc:	2800      	cmp	r0, #0
    18be:	d02b      	beq.n	1918 <__bhs_ui2f+0x5c>
    18c0:	0c03      	lsrs	r3, r0, #16
    18c2:	d101      	bne.n	18c8 <__bhs_ui2f+0xc>
    18c4:	0400      	lsls	r0, r0, #16
    18c6:	e002      	b.n	18ce <__bhs_ui2f+0x12>
    18c8:	2380      	movs	r3, #128	; 0x80
    18ca:	051b      	lsls	r3, r3, #20
    18cc:	18c9      	adds	r1, r1, r3
    18ce:	0e03      	lsrs	r3, r0, #24
    18d0:	d101      	bne.n	18d6 <__bhs_ui2f+0x1a>
    18d2:	0200      	lsls	r0, r0, #8
    18d4:	e002      	b.n	18dc <__bhs_ui2f+0x20>
    18d6:	2380      	movs	r3, #128	; 0x80
    18d8:	04db      	lsls	r3, r3, #19
    18da:	18c9      	adds	r1, r1, r3
    18dc:	0f03      	lsrs	r3, r0, #28
    18de:	d101      	bne.n	18e4 <__bhs_ui2f+0x28>
    18e0:	0100      	lsls	r0, r0, #4
    18e2:	e002      	b.n	18ea <__bhs_ui2f+0x2e>
    18e4:	2380      	movs	r3, #128	; 0x80
    18e6:	049b      	lsls	r3, r3, #18
    18e8:	18c9      	adds	r1, r1, r3
    18ea:	0f83      	lsrs	r3, r0, #30
    18ec:	d101      	bne.n	18f2 <__bhs_ui2f+0x36>
    18ee:	0080      	lsls	r0, r0, #2
    18f0:	e002      	b.n	18f8 <__bhs_ui2f+0x3c>
    18f2:	2380      	movs	r3, #128	; 0x80
    18f4:	045b      	lsls	r3, r3, #17
    18f6:	18c9      	adds	r1, r1, r3
    18f8:	2800      	cmp	r0, #0
    18fa:	db01      	blt.n	1900 <__bhs_ui2f+0x44>
    18fc:	0040      	lsls	r0, r0, #1
    18fe:	e002      	b.n	1906 <__bhs_ui2f+0x4a>
    1900:	2380      	movs	r3, #128	; 0x80
    1902:	041b      	lsls	r3, r3, #16
    1904:	18c9      	adds	r1, r1, r3
    1906:	3080      	adds	r0, #128	; 0x80
    1908:	1203      	asrs	r3, r0, #8
    190a:	1859      	adds	r1, r3, r1
    190c:	0600      	lsls	r0, r0, #24
    190e:	d101      	bne.n	1914 <__bhs_ui2f+0x58>
    1910:	2301      	movs	r3, #1
    1912:	4399      	bics	r1, r3
    1914:	1c08      	adds	r0, r1, #0
    1916:	e000      	b.n	191a <__bhs_ui2f+0x5e>
    1918:	2000      	movs	r0, #0
    191a:	4770      	bx	lr

0000191c <__aeabi_ui2f>:
    191c:	2180      	movs	r1, #128	; 0x80
    191e:	b508      	push	{r3, lr}
    1920:	05c9      	lsls	r1, r1, #23
    1922:	f7ff ffcb 	bl	18bc <__bhs_ui2f>
    1926:	bd08      	pop	{r3, pc}

00001928 <__aeabi_lmul>:
    1928:	b510      	push	{r4, lr}
    192a:	4343      	muls	r3, r0
    192c:	4351      	muls	r1, r2
    192e:	18c9      	adds	r1, r1, r3
    1930:	0c04      	lsrs	r4, r0, #16
    1932:	0c13      	lsrs	r3, r2, #16
    1934:	435c      	muls	r4, r3
    1936:	1909      	adds	r1, r1, r4
    1938:	b292      	uxth	r2, r2
    193a:	0c04      	lsrs	r4, r0, #16
    193c:	4354      	muls	r4, r2
    193e:	b280      	uxth	r0, r0
    1940:	4343      	muls	r3, r0
    1942:	4350      	muls	r0, r2
    1944:	0422      	lsls	r2, r4, #16
    1946:	0c24      	lsrs	r4, r4, #16
    1948:	1880      	adds	r0, r0, r2
    194a:	4161      	adcs	r1, r4
    194c:	041a      	lsls	r2, r3, #16
    194e:	0c1b      	lsrs	r3, r3, #16
    1950:	1880      	adds	r0, r0, r2
    1952:	4159      	adcs	r1, r3
    1954:	bd10      	pop	{r4, pc}

00001956 <__aeabi_memcpy>:
    1956:	4684      	mov	ip, r0
    1958:	0783      	lsls	r3, r0, #30
    195a:	d108      	bne.n	196e <copy1_start>
    195c:	078b      	lsls	r3, r1, #30
    195e:	d106      	bne.n	196e <copy1_start>
    1960:	1f13      	subs	r3, r2, #4
    1962:	d304      	bcc.n	196e <copy1_start>

00001964 <copy4>:
    1964:	c904      	ldmia	r1!, {r2}
    1966:	c004      	stmia	r0!, {r2}
    1968:	3b04      	subs	r3, #4
    196a:	d2fb      	bcs.n	1964 <copy4>
    196c:	1d1a      	adds	r2, r3, #4

0000196e <copy1_start>:
    196e:	4252      	negs	r2, r2
    1970:	d005      	beq.n	197e <copy1_ret>
    1972:	1a89      	subs	r1, r1, r2
    1974:	1a80      	subs	r0, r0, r2

00001976 <copy1>:
    1976:	5c8b      	ldrb	r3, [r1, r2]
    1978:	5483      	strb	r3, [r0, r2]
    197a:	3201      	adds	r2, #1
    197c:	d1fb      	bne.n	1976 <copy1>

0000197e <copy1_ret>:
    197e:	4660      	mov	r0, ip
    1980:	4770      	bx	lr

00001982 <__aeabi_lowlevel_memset>:
    1982:	4684      	mov	ip, r0
    1984:	3a04      	subs	r2, #4
    1986:	d309      	bcc.n	199c <memset1>
    1988:	0783      	lsls	r3, r0, #30
    198a:	d107      	bne.n	199c <memset1>
    198c:	0609      	lsls	r1, r1, #24
    198e:	0a0b      	lsrs	r3, r1, #8
    1990:	4319      	orrs	r1, r3
    1992:	0c0b      	lsrs	r3, r1, #16
    1994:	4319      	orrs	r1, r3

00001996 <memset4>:
    1996:	3a04      	subs	r2, #4
    1998:	c002      	stmia	r0!, {r1}
    199a:	d2fc      	bcs.n	1996 <memset4>

0000199c <memset1>:
    199c:	3204      	adds	r2, #4
    199e:	d003      	beq.n	19a8 <memset1_ret>

000019a0 <memset1a>:
    19a0:	7001      	strb	r1, [r0, #0]
    19a2:	3001      	adds	r0, #1
    19a4:	3a01      	subs	r2, #1
    19a6:	d1fb      	bne.n	19a0 <memset1a>

000019a8 <memset1_ret>:
    19a8:	4660      	mov	r0, ip
    19aa:	4770      	bx	lr
    19ac:	36314337 			; <UNDEFINED> instruction: 0x36314337
    19b0:	392d3131 	pushcc	{r0, r4, r5, r8, ip, sp}
    19b4:	31366635 	teqcc	r6, r5, lsr r6
    19b8:	00306332 	eorseq	r6, r0, r2, lsr r3

000019bc <OscRateIn>:
    19bc:	00b71b00 	adcseq	r1, r7, r0, lsl #22

000019c0 <pinmuxing>:
    19c0:	00010100 	andeq	r0, r1, r0, lsl #2
    19c4:	00010200 	andeq	r0, r1, r0, lsl #4
    19c8:	00010300 	andeq	r0, r1, r0, lsl #6
    19cc:	00010400 	andeq	r0, r1, r0, lsl #8
    19d0:	00010500 	andeq	r0, r1, r0, lsl #10
    19d4:	00010600 	andeq	r0, r1, r0, lsl #12
    19d8:	01010b00 	tsteq	r1, r0, lsl #22
    19dc:	00011200 	andeq	r1, r1, r0, lsl #4
    19e0:	00011300 	andeq	r1, r1, r0, lsl #6

000019e4 <wdtOSCRate>:
    19e4:	00000000 	andeq	r0, r0, r0
    19e8:	000927c0 	andeq	r2, r9, r0, asr #15
    19ec:	00100590 	mulseq	r0, r0, r5
    19f0:	00155cc0 	andseq	r5, r5, r0, asr #25
    19f4:	001ab3f0 			; <UNDEFINED> instruction: 0x001ab3f0
    19f8:	00200b20 	eoreq	r0, r0, r0, lsr #22
    19fc:	00249f00 	eoreq	r9, r4, r0, lsl #30
    1a00:	002932e0 	eoreq	r3, r9, r0, ror #5
    1a04:	002dc6c0 	eoreq	ip, sp, r0, asr #13
    1a08:	00319750 	eorseq	r9, r1, r0, asr r7
    1a0c:	003567e0 	eorseq	r6, r5, r0, ror #15
    1a10:	00393870 	eorseq	r3, r9, r0, ror r8
    1a14:	003d0900 	eorseq	r0, sp, r0, lsl #18
    1a18:	00401640 	subeq	r1, r0, r0, asr #12
    1a1c:	00432380 	subeq	r2, r3, r0, lsl #7
    1a20:	004630c0 	subeq	r3, r6, r0, asr #1

Disassembly of section .data:

10000000 <_data>:
10000000:	3f800000 	svccc	0x00800000

10000004 <system_osc_select>:
10000004:	00000001 	andeq	r0, r0, r1

Disassembly of section .bss:

10000008 <_bss>:
	...

1000000a <g_pg_state>:
1000000a:	00000000 	andeq	r0, r0, r0

1000000e <open_12v_1f.5945>:
	...

1000000f <open_12v_2t.5949>:
	...

10000010 <led_state>:
10000010:	00000000 	andeq	r0, r0, r0

10000014 <open_12v_2f.5953>:
	...

10000015 <open_12v_1t.5941>:
10000015:	00000000 	andeq	r0, r0, r0

10000018 <led_blink_flag>:
10000018:	00000000 	andeq	r0, r0, r0

1000001c <g_dna>:
	...

10000024 <g_ackpkg>:
	...

1000004c <g_adc_buf>:
	...

10000076 <g_reqpkg>:
	...

1000009e <g_adc_val>:
	...

100000ac <adc_cnt.6094>:
	...

100000ae <uart_rxdata>:
	...

10000150 <uart_rxrb>:
	...

10000164 <uart_txrb>:
	...

10000178 <uart_txdata>:
	...

10000218 <tmrlist>:
	...

100002b8 <SystemCoreClock>:
100002b8:	00000000 	andeq	r0, r0, r0

Disassembly of section .comment:

00000000 <.comment>:
   0:	3a434347 	bcc	10d0d24 <__top_MFlash32+0x10c8d24>
   4:	4e472820 	cdpmi	8, 4, cr2, cr7, cr0, {1}
   8:	6f542055 	svcvs	0x00542055
   c:	20736c6f 	rsbscs	r6, r3, pc, ror #24
  10:	20726f66 	rsbscs	r6, r2, r6, ror #30
  14:	204d5241 	subcs	r5, sp, r1, asr #4
  18:	65626d45 	strbvs	r6, [r2, #-3397]!	; 0xd45
  1c:	64656464 	strbtvs	r6, [r5], #-1124	; 0x464
  20:	6f725020 	svcvs	0x00725020
  24:	73736563 	cmnvc	r3, #415236096	; 0x18c00000
  28:	2973726f 	ldmdbcs	r3!, {r0, r1, r2, r3, r5, r6, r9, ip, sp, lr}^
  2c:	392e3420 	stmdbcc	lr!, {r5, sl, ip, sp}
  30:	3220332e 	eorcc	r3, r0, #-1207959552	; 0xb8000000
  34:	30353130 	eorscc	r3, r5, r0, lsr r1
  38:	20393235 	eorscs	r3, r9, r5, lsr r2
  3c:	6c657228 	sfmvs	f7, 2, [r5], #-160	; 0xffffff60
  40:	65736165 	ldrbvs	r6, [r3, #-357]!	; 0x165
  44:	415b2029 	cmpmi	fp, r9, lsr #32
  48:	652f4d52 	strvs	r4, [pc, #-3410]!	; fffff2fe <_vStackTop+0xefffe2fe>
  4c:	6465626d 	strbtvs	r6, [r5], #-621	; 0x26d
  50:	2d646564 	cfstr64cs	mvdx6, [r4, #-400]!	; 0xfffffe70
  54:	2d395f34 	ldccs	15, cr5, [r9, #-208]!	; 0xffffff30
  58:	6e617262 	cdpvs	2, 6, cr7, cr1, cr2, {3}
  5c:	72206863 	eorvc	r6, r0, #6488064	; 0x630000
  60:	73697665 	cmnvc	r9, #105906176	; 0x6500000
  64:	206e6f69 	rsbcs	r6, lr, r9, ror #30
  68:	32343232 	eorscc	r3, r4, #536870915	; 0x20000003
  6c:	005d3838 	subseq	r3, sp, r8, lsr r8

Disassembly of section .ARM.attributes:

00000000 <.ARM.attributes>:
   0:	00002e41 	andeq	r2, r0, r1, asr #28
   4:	61656100 	cmnvs	r5, r0, lsl #2
   8:	01006962 	tsteq	r0, r2, ror #18
   c:	00000024 	andeq	r0, r0, r4, lsr #32
  10:	726f4305 	rsbvc	r4, pc, #335544320	; 0x14000000
  14:	2d786574 	cfldr64cs	mvdx6, [r8, #-464]!	; 0xfffffe30
  18:	0600304d 	streq	r3, [r0], -sp, asr #32
  1c:	094d070c 	stmdbeq	sp, {r2, r3, r8, r9, sl}^
  20:	14041201 	strne	r1, [r4], #-513	; 0x201
  24:	17011501 	strne	r1, [r1, -r1, lsl #10]
  28:	1a011803 	bne	4603c <__top_MFlash32+0x3e03c>
  2c:	Address 0x0000002c is out of bounds.

